FAN7085_GF085 High Side Gate Driver with Recharge FET Features Description • Qualified to AEC Q100 The FAN7085_GF085 is a high-side gate drive IC with reset input and built-in recharge FET. It is designed for high voltage and high speed driving of MOSFET or IGBT, which operates up to 300V. Fairchild's high-voltage process and common-mode noise cancellation technique provide stable operation in the high side driver under high-dV/dt noise circumstances. Logic input is compatible with standard CMOS outputs. The UVLO circuits prevent from malfunction when VCC and VBS are lower than the specified threshold voltage. It is available with space saving SOIC-8 Package. Minimum source and sink current capability of output driver is 250mA and 250mA. Built-in recharge FET to refresh bootstrap circuit is very useful for circuit topology requiring switches on low and high side of load. • Floating channel designed for bootstrap operation fully operational up to 300V. • Tolerance to negative transient voltage on VS pin • dv/dt immune. • Gate drive supply range from 4.5V to 20V • Under-voltage lockout • CMOS Schmitt-triggered inputs with pull-down and pull-up • High side output out of phase with input (Inverted input) • Reset input SOIC-8 • Internal recharge FET for bootstrap refresh Typical Applications • Diesel and gasoline injectors/valves • MOSFET-and IGBT high side driver applications For Fairchild’s definition of “green” Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html Ordering Information Device Package Operating Temp. SOIC-8 -40 C ~ 125 C FAN7085MX_GF085 SOIC-8 -40 C ~ 125 C FAN7085M_GF085 X : Tape & Reel type ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 1 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET September 2012 VB Under Voltage Reset VB to VS Pulse Filter Flip Flop Brake before make HO Under Voltage Reset VCC to GND RESET- VS Level Shifter ON Logic Pulse Filter IN- Delay Level Shifter OFF Recharge Path VCC GND Pin Assignments 1 2 3 4 VCC VB IN- HO GND NC RESET- VS 8 7 6 5 Pin Definitions Pin Number Pin Name I/O Pin Function Description 1 VCC P Driver supply voltage, typically 5V 2 IN- I Driver control signal input (Negative Logic) 3 GND P Ground 4 RESET- I Driver enable input signal (Negative Logic) 5 VS P High side floating offset for MOSFET Source connection 6 NC - No connection (No Bond wire) 7 HO A High side drive output for MOSFET Gate connection 8 VB P Driver output stage supply ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 2 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET Block Diagrams Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to GND. Parameter Symbol Min. Max. Unit High side floating supply voltage VBS -0.3 25 V High side driver output stage voltage VB -5 325 V Vs -25 300 V High side floating output voltage VHO VS-0.3 VB+0.3 V Supply voltage VCC -0.3 25 V VIN -0.3 Vcc+0.3 V VRES -0.3 Vcc+0.3 V Neg. transient: 0.5 ms, external MOSFET off High side floating supply offset voltage Neg. transient 0.2 us Input voltage for INInput voltage for RESET1) Pd 0.625 W Thermal resistance, junction to ambient 1) Rthja 200 C/W Electrostatic discharge voltage (Human Body Model) VESD 1.5K Charge device model VCDM 500 Junction Temperature Tj Storage Temperature TS Power Dissipation V V -55 150 C 150 C Note: 1) The thermal resistance and power dissipation rating are measured bellow conditions; JESD51-2: Integrated Circuit Thermal Test Method Environmental Conditions - Natural condition(StillAir) JESD51-3: Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Package Recommended Operating Conditions For proper operation the device should be used within the recommended conditions.-40°C <= Ta <= 125°C Parameter Symbol Min. Max. Unit VB VS+4.5 VS+20 V VS -3 300 V VS -25 300 V High side floating output voltage VHO Vs VB V Allowable offset voltage Slew Rate 1) dv/dt - 50 V/ns Supply voltage for logic part VCC 4.5 20 V Input voltage for IN- VIN 0 Vcc V VRESET 0 High side floating supply voltage(DC) Transient:-10V@ 0.2 us High side floating supply offset voltage(DC) @VBS=7V High side floating supply offset voltage(Transient) 0.2us @VBS<25V Input voltage for RESETSwitching frequency 2) Fs Vcc V 200K Hz Minimum low input width 3) tIN(low,min) 1000 - ns Minimum high input width 3) tIN(high,min) 60 - ns Minimum operating voltage of VB related to GND Ambient temperature V B(MIN)4) Ta 4 - V -40 125 C Note: 1) Guaranteed by design. 2) Duty = 0.5, VBS >=7V 3) Guaranteed by design. Pulse widths below the specified values, may be ignored. Output will either follow the input signal or will ignore it. No false output state is guaranteed when minimum input width is smaller than tin 4) Guaranteed by design ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 3 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET Absolute Maximum Ratings Unless otherwise specified, -40°C <= Ta <= 125°C, VCC = 5V, VBS = 7V, VS = 0V, VRESET = 5V, RL = 50, CL = 2.5nF. Parameter Symbol Conditions Min. Typ. Max. Unit VCC and VBS supply under voltage positive going threshold VCCUV+ VBSUV+ Vcc and VBS rising from 0V - 3.7 4.3 V VCC and VBS supply under voltage negative going threshold VCCUVVBSUV- Vcc and VBS dropping from 5V 2.8 3.4 - V VCC and VBS under voltage hysteresis VCCUVH VBSUVH - 0.02 0.3 - V tduvcc tduvbs VCC: 6.5V->2.4V or 2.4V->6.5V VBS: 6.5V->2.4V or 2.4V->6.5V 0.5 0.5 20 20 us us ILK VB=VS=300V - - 200 uA - - VCC and VBS Supply Characteristics Under voltage lockout response time Offset supply leakage current Quiescent Vcc supply current IQCC Vcc=20V 500 uA Quiescent VBS supply current IQBS1 Static mode, VBS=7V, VIN=0 or 5V 100 uA Quiescent VBS supply current IQBS2 Static mode, VBS=16V, VIN=0 or 5V 200 uA VBS drop due to output turn-on (Design guaranty) VBS VBS=7V, Cbs=1uF, tdIG-IN =3uS, tTEST=100uS 210 mV Input Characteristics High logic level input voltage for IN- VIH 0.6VCC - - V Low logic level input voltage for IN- VIL - - 0.28VCC V Low logic level input bias current for IN- IIN- VIN=0 5 25 60 uA High logic level input bias current for IN- IIN+ VIN=5V - - 5 uA Full up resistance at IN RIN 83 200 1000 High logic level input voltage for RESET- VRH 0.6Vcc - - V 0.28Vcc V 5 25 60 uA 5 uA 83 200 1000 - - 0.1 V Low logic level input voltage for RESET- VRL High logic level input current for RESET- IRES+ VRESET=5V Low logic level input bias current for RESET- IRES- VRESET=0 Full down resistance at RESET- RRES Output characteristics High level output voltage, VB - VHO VOH Low level output voltage, VHO-GND VOL IO=0 - - 0.1 V Peak output source current IO+ VIN=5V 250 450 - mA IO- VIN=0 250 Peak output sink current Equivalent output resistance IO=0 450 - mA ROP 15.5 28 RON 15.5 28 7.9 9.8 us 0.2 0.4 us 1.2 V Recharge Characteristics Recharge TR turn-on propagation delay Ton_rech Recharge TR turn-off propagation delay Toff_rech Recharge TR on-state voltage drop VRECH Is=1mA, VIN=5V @125C High side turn-off to recharge gate turn-on DTHOFF Vcc=5V, VS=7V 4 7.8 9.8 us Recharge gate turn-off to high side turn-on DTHON Vcc=5V, VS=7V 0.1 0.4 0.7 us 4 Dead Time Characteristics Note: The input parameter are referenced to GND. The VO and IO parameters are referenced to GND. ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 4 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET Statics Electrical Characteristics Unless otherwise specified, -40°C <= Ta <= 125°C, VCC = 5V, VBS = 7V, VS = 0V, VRESET = 5V, RL = 50, CL = 2.5nF. Parameter Symbol Conditions Input-to-output turn-on propagation delay tplh 50% input level to 10% output level, VS = 0V Input-to-output turn-off propagation delay tphl 50% input level to 90% output level VS = 0V RESET-to-output turn-off propagation delay tphl_res RESET-to-output turn-on propagation delay tplh_res tr1 Output rising time Min. Typ. Max. Unit 0.56 1 us - 0.15 0.5 us 50% input level to 90% output level - 0.17 0.5 us 50% input level to 10% output level - 0.56 1 us Tj=25C - 65 200 ns - 400 ns tr2 Output falling time tr3 Tj=25C,VBS=16V 65 200 ns tr4 VBS=16V - 400 ns tf1 Tj=25C 25 200 ns - 300 ns tf2 ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 - tf3 Tj=25C,VBS=16V 25 200 ns tf4 VBS=16V - 300 ns 5 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET Dynamic Electrical Characteristics 1. Logic Tables VCC VBS RESET- IN- Ho RechFET < VCCUVLOX X X X OFF ON X LOW X OFF ON X X X HIGH OFF ON > VCCUVLO+ > VBSUVLO+ HIGH LOW ON OFF > VCCUVLO+ < VBSUVLO- HIGH LOW OFF OFF Notes: X means independent from signal IN-=LOW indicates that the high side NMOS is ON IN-=HIGH indicates that the high side NMOS is OFF RechFET =ON indicates that the recharge MOSFET is ON RechFET =OFF indicates that the recharge MOSFET is OFF ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 6 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET Application Information FAN7085_GF085 High Side Gate Driver with Recharge FET Typical Application Circuit 1. Typical Application Circuit Up to 300V D1 VCC VCC VB IN- HO GND NC RESET- VS R1 C3 R2 C2 Load C1 2. Application Example From Charge Pump Voltage Source D5 5V C2 VCC VB IN- HO GND NC RESET- VS R1 S1 C3 C1 R2 Load D3 R3 From LS Driver C4 S2 D4 R4 GND ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 7 www.fairchildsemi.com 1. Input/Output Timing Diagrams IN- RESET- 90% 90% VS 10% 10% tr VHO tf tphl Recharge tplh Toff_rech Ton_rech Figure.1 Input and Output Timing Diagram and Switching Time Waveform Definition 2. Reset Timing Diagrams IN- RESET- VHO tplh_res tphl_res Figure.2 Reset and Output Timing Diagram ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 8 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET Input-Output Waveforms Ig INIg RESET- VCC VB IN- HO GND NC RESET- VS 50R 1u 2n5 7V VBdrop VB-VS Figure3.b VB Drop Voltage Test Circuit Brake before make Figure3.a VB Drop Voltage Diagram ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 9 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET 3.VB Drop Voltage Diagram This performance graphs based on ambient temperature -40C ~125C 2.6 3.2 VBS=7V, RL=50, CL=2.5nF VBS=7V, RL=50, CL=2.5nF 2.4 2.8 Vinth- (V) Vinth+ (V) 3.0 2.6 2.2 2.0 2.4 Typ. Typ. 2.2 4.4 4.7 5.0 5.3 5.6 5.9 6.2 1.8 4.4 6.5 4.7 5.0 Figure 4a. Positive IN and RESET Threshold vs VCC Supply 1600 Output Source Cureent (mA) Output Sink Cureent (mA) 5.9 6.2 6.5 500 VCC=5V o -40 C 1200 o 125 C 800 400 5 10 15 VCC=5V, VBS=7V Typ. 450 400 350 300 -50 20 0 50 100 150 o VBS(V) Temperature ( C) Figure5a. Output Sink Current vs VBS Supply Figure5b. Output Source Current vs Temperature 650 250 Turn-off Propagation Delay (ns) Turn-on Propagation Delay (ns) 5.6 Figure 4b. Negative IN and RESET Threshold vs VCC Supply 2000 0 5.3 Vsupply (V) Vsupply (V) VCC=5V,VBS=7V, RL=50, CL=2.5nF 620 590 560 Typ. 530 500 -50 0 50 100 o 150 Typ. 0 50 100 150 o Temperature ( C) Figure 6b. Turn-Off Propagation Delay Time vs Temperature Figure 6a. Turn-On Propagation Delay Time vs Temperature FAN7085_GF085 Rev. 1.0.1 200 100 -50 150 Temperature( C) ©2012 Fairchild Semiconductor Corporation VCC=5V,VBS=7V, RL=50, CL=2.5nF 10 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET Performance Graphs RES-to-Output Turn-off Propagation Delay (ns) RES-to-Output Turn-on Propagation Delay (ns) VCC=5V, VBS=7V, RL=50, CL=2.5nF 650 600 550 Typ. 500 -50 0 50 100 150 250 VCC=5V, VBS=7V, RL=50, CL=2.5nF 200 150 Typ. 100 -50 0 Figure 7a. RES to Output Turn-On Propagation Delay vs Temperature 50 Logic "1" RES Input Current (uA) VCC=5V, RL=50, CL=2.5nF Logic "0" Input Current (uA) 150 Figure 7b. RES to Output Turn-Off Propagation Delay vs Temperatur 50 40 Typ. 30 20 10 0 -50 0 50 100 VCC=5V, RL=50, CL=2.5nF 40 30 Typ. 20 10 0 -50 150 0 o 50 100 150 o Temperature ( C) Temperature ( C) Figure 8. Logic “0” IN Input Current vs Temperature Figure 9. Logic “1” RESET Input Current vs Temperature 5.0 5.0 4.5 VBS Supply Voltage(V) 4.5 VBS Supply Voltage(V) 100 Temperature ( C) Temperature ( C) Max. 4.0 Typ. 3.5 3.0 50 o o Min. 0 50 100 Typ. 3.0 Min. 2.0 -50 150 50 100 150 o Temperature( C) Figure 10a. VBS Under Voltage Threshold(+) vs Temperature ©2012 Fairchild Semiconductor Corporation 0 Temperature( C) o FAN7085_GF085 Rev. 1.0.1 3.5 Max. 2.5 2.5 2.0 -50 4.0 Figure 10b. VBS Under Voltage Threshold(-) vs Temperature 11 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET 700 5.0 4.5 Max. VCC Supply Voltage(V) VCC Supply Voltage(V) 4.5 4.0 Typ. 3.5 Min. 3.0 2.5 2.0 -50 0 50 100 4.0 3.5 Max. Typ. 3.0 Min. 2.5 2.0 -50 150 0 50 o Recharge Gate Turn-off Propagation Delay (ns) Recharge Transistor Turn-on Propagation Delay (us) Figure 11b. VCC Under Voltage Threshold(-) vs Temperature 10 VCC=5v, VBS=7, VRL=50, CL=2.5nF Typ. 6 4 -50 0 50 100 300 VBS=7V VCC=5v, VBS=7V, RL=50, CL=2.5nF 260 220 180 Typ. 140 -50 150 0 o Temperature( C) High Side Turn-off to Recharge Gate Turn-on (us) I (mA) 1.4 1.0 Typ. 0.8 1.0 Figure 14. Recharge FET I-V curve FAN7085_GF085 Rev. 1.0.1 10 VCC=5v, VBS=7V, RL=50, CL=2.5nF 8 Typ. 6 4 -50 1.2 0 50 100 150 o Temperature ( C) V (V) ©2012 Fairchild Semiconductor Corporation 150 Figure 12. Recharge FET Turn-off Delay time VCC=5v, VBS=7V, RL=50, CL=2.5nF 0.6 100 o 1.8 0.2 0.4 50 Temperature ( C) Figure 12. Recharge FET Turn-on Delay time 0.6 150 Temperature( C) Figure 11a. VCC Under Voltage Threshold(+) vs Temperature 8 100 o Temperature( C) Figure 15. High Side Turn-off to Recharge FET turn-on VS Temperature 12 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET 5.0 5.00 4.80 A 0.65 3.81 8 5 6.20 5.80 PIN ONE INDICATOR B 1.75 4.00 3.80 1 5.60 4 1.27 (0.33) 0.25 M C B A 1.27 LAND PATTERN RECOMMENDATION 0.25 0.10 SEE DETAIL A 1.75 MAX R0.10 0.10 0.51 0.33 0.50 x 45° 0.25 C OPTION A - BEVEL EDGE GAGE PLANE R0.10 8° 0° 0.90 0.406 0.25 0.19 C OPTION B - NO BEVEL EDGE 0.36 NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13 SEATING PLANE (1.04) DETAIL A SCALE: 2:1 Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. 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Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 13 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET Package Dimensions AccuPower Auto-SPM Build it Now CorePLUS CorePOWER CROSSVOLT CTL™ Current Transfer Logic™ ® EcoSPARK EfficientMax™ EZSW ITCH™* ™* DEUXPEED™ ® Fairchild® ® Fairchild Semiconductor FACT Quiet Series™ ® FACT ® FAST FastvCore FETBench FlashWriter®* FPS F-PFS ® FRFET SM Global Power Resource Green FPS Green FPS e-Series Gmax™ GTO IntelliMAX ISOPLANAR MegaBuck™ MICROCOUPLER MicroFET MicroPak MillerD rive™ MotionMax™ Motion-SPM™ ® OPTOLOGIC ® OPTOPLANAR ® PDP SPM™ Power-SPM ® PowerTrench PowerXS™ Programmable Active Droop ® QFET QS Quiet Series RapidConfigure ™ Saving our world, 1mW /W/kW at a time™ SignalWise™ SmartMax™ SMART START ® SPM STEALTH™ SuperFET SuperSOT-3 SuperSOT-6 SuperSOT-8 SupreMOS™ SyncFET™ Sync-Lock™ ® * The Power Franchise ® TinyBoost TinyBuck TinyCalc ® TinyLogic TINYOPTO TinyPower TinyPWM TinyWire TriFault Detect TRUECURRENT* SerDes UHC® Ultra FRFET UniFET VCX VisualMax XS™ * Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I43 ©2012 Fairchild Semiconductor Corporation FAN7085_GF085 Rev. 1.0.1 14 www.fairchildsemi.com FAN7085_GF085 High Side Gate Driver with Recharge FET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.