STMICROELECTRONICS HCF4097B

HCC/HCF4067B
HCC/HCF4097B
ANALOG MULTIPLEXER/DEMULTIPLEXER
4067B–SINGLE 16-CHANNEL
4097B–DIFFERENTIAL 8-CHANNEL
.
.
.
.
..
.
..
..
LOW ON RESISTANCE: 125Ω (typ.) OVER 15
Vp-p SIGNAL INPUT RANGE FOR
VDD - VSS = 15V
HIGH OFF RESISTANCE: CHANNEL LEAKAGE OF ±10pA (typ.) @ VDD - VSS = 10V
MATCHED SWITCH CHARACTERISTICS:
∆RON = 5Ω (typ.) FOR VDD - VSS = 15V
VERY LOW QUIESCENT POWER DISSIPATION UNDER A DIGITAL CONTROL INPUT
AND SUPPLY CONDITIONS: 0.2µW (typ.) @
VDD -VSS = 10V
BINARY ADDRESS DECODING ON CHIP
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
5V, 10V AND 15V PARAMETRIC RATINGS
o
INPUT CURRENT OF 100nA AT 18V AND 25 C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TENTATIVE STANDARD No 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF B
SERIE CMOS DEVICES”
EY
(Plastic Package)
F
(Ceramic Package)
M1
(Micro Package)
C1
(Chip Carrier)
ORDER CODES :
HCC40XXBF
HCF40XXBM1
HCF40XXBEY
HCF40XXBC1
PIN CONNECTIONS
4067B
September 1988
4097B
1/16
HCC/HCF4067B HCC/HCF4097B
DESCRIPTION
The HCC4067B, HCC4097B (extended temperature range) and HCF4067B, HCF4097B (intermediate temperature range) are monolithic integrated
circuits available in 24-lead dual in line plastic or ceramic package.
The HCC/HCF4067B and HCC/HCF4097B
COS/MOS analog multiplexers/demultiplexers are
digitally controlled analog switches having low ON
impedance, low OFF leakage current and internal
address decoding. in addition, the ON resistance is
relatively constant over the full input-signal range.
The HCC/HCF4067B ia a 16-channel multiplexer
with four binary control inputs A, B, C, D, and an inhibit input, arranged so that any combination of the
inputs selects one switch.
The HCC/HCF4097 is a differential 8-channel multiplexer having three binary control inputs A, B, C, and
an inhibit input. The inputs permit selection of one
FUNCTIONAL DIAGRAM
For 4067B
2/16
For 4097B
HCC/HCF4067B HCC/HCF4097B
LOGIC DIAGRAM
For 4067B
3/16
HCC/HCF4067B HCC/HCF4097B
LOGIC DIAGRAM
For 4097B
4/16
HCC/HCF4067B HCC/HCF4097B
TRUTH TABLES FOR HCC/HCF4067B
TRUTH TABLE FOR HCC/HCF4097B
A
B
C
D
INH
SELECTED
CHANNEL
A
B
C
INH
SELECTED
CHANNEL
X
0
X
0
X
0
X
0
1
0
None
0
X
0
X
0
X
0
1
0
None
0X 0Y
1
0
0
0
0
1
1
0
0
0
1X 1Y
0
1
1
1
0
0
0
0
0
0
2
3
0
1
1
1
0
0
0
0
2X 2Y
3X 3Y
0
0
1
0
0
4
0
0
1
0
4X 4Y
1
0
1
0
0
5
1
0
1
0
5X 5Y
0
1
1
0
0
6
0
1
1
0
6X 6Y
1
1
1
0
0
7
1
1
1
0
7X 7Y
0
1
0
0
0
0
1
1
0
0
8
9
0
1
0
1
0
10
1
0
1
0
0
1
1
1
0
0
11
12
1
0
1
1
0
13
0
1
1
1
1
1
1
1
0
0
14
15
ABSOLUTE MAXIMUM RATING
Symbol
VDD *
Vi
II
Ptot
Top
Tstg
Parameter
Supply Voltage: HCC Types
HCF Types
Input Voltage
Value
Unit
-0.5 to +20
-0.5 to +18
V
V
-0.5 to VDD + 0.5
V
± 10
200
mA
mW
100
-55 to +125
-40 to +85
mW
o
C
o
C
DC Input Current (any one input)
Total Power Dissipation (per package)
Dissipation per Output Transistor
for Top = Full Package Temperature Range
Operating Temperature: HCC Types
HCF Types
Storage Temperature
-65 to +150
o
C
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress ratingonly and functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol
VDD
Parameter
Supply Voltage: HCC Types
HCF Types
VI
Input Voltage
Top
Operating Temperature: HCC Types
HCF Types
Value
Unit
3 to 18
3 to 15
V
V
0 to VDD
-55 to +125
-40 to +85
V
o
o
C
C
5/16
HCC/HCF4067B HCC/HCF4097B
STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)
Symbol
IL
Parameter
Quiescent
Supply
Current
Test Conditios
VEE VSS VDD
VIS
(V)
(V) (V) (V)
5
10
15
20
5
10
15
HCC
types
HCF
types
SWITCH
On
RON
Resistance
∆ON
CI
18
0
0
0
0
100
±0.1
100
1000
18
100
±0.1
100
1000
0
15
300
±0.1
300
1000
0
15
300
±0.1
300
1000
-5
5
0 ≤ VI
≤ VDD
0
0
0
0
0
HCC
types
HCF
types
Input Capacitance
THIGH *
Min. Max.
150
300
600
3000
150
300
600
1050
400
240
1050
400
240
HCF
types
Input High
Voltage
Input
Leackage
Current
0
Value
25 oC
Min. Typ. Max.
0.04
5
0.04
10
0.04
20
0.08 100
0.04
20
0.04
40
0.04
80
470
180
125
470
180
125
10
10
5
0
Any
HCC
Channel OFF types
All Channel
OFF
HCC
(common
types
OUT/IN)
Any
HCF
Channel OFF types
All Channel
OFF
HCF
(common
types
OUT/IN)
C
Capacitance
Input
Output for 4067
Output for 4097
Feedthrough
CONTROL
Input Low
V IL
Voltage
IIH IIL
800
310
200
850
330
210
0 ≤ VI
≤ VDD
OFF (•)
Channel
Leakage
Current
VIH
5
10
15
5
10
15
5
10
15
HCC
types
Resistance ∆RON
(Between any two
channels)
TLOW *
Min. Max.
5
10
20
100
20
40
80
0
1300
580
320
1200
520
300
µA
Ω
Ω
µA
= VDD
thru
1KΩ
V EE=VSS
RL =1KΩ
to VSS
IIS < 2µA
(on all OFF
channels)
5
10
15
5
10
15
5
55
35
0.2
1.5
3
4
3.5
7
11
pF
1.5
3
4
3.5
7
11
1.5
3
4
3.5
7
11
18
±0.1
±10-3
±0.1
±1
VI = 0/15V
15
±0.3
±10-3
±0.3
±1
5
7.5
Any Address or
Inhibit Input
V
V
VI = 0/18V
• Determined by minimum feasible leakage measurement for automatic testing
* TLOW = -55 oC for HCC device: -40 oC for HCF device.
* THIGH = +125 oC for HCC device: +85 oC for HCF device.
The Noise Margin for both ”1” and ”0” level is: 1V min. with VDD = 5 V, 2 V min. with VDD = 10 V, 2.5 V min. with VDD = 15 V
6/16
Unit
µA
pF
HCC/HCF4067B HCC/HCF4097B
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25 o C, C L = 50 pF, RL = 200 KΩ,
o
typical temperature coefficent for all VDD values is 03 %/ C, all input rise and fall times= 20 ns)
Symbol
Parameter
VC
(V)
SWITCH
Propagation Delay
tpd
Time (Signal Input to
Output)
= VDD
Frequency Response
Channel ”ON” (Sine
Wave Input) at
VO
20 Log
= − 3 dB
VI
= VDD
Feedthrough (All
Channels OFF) at
VO
20 Log
= − 40 dB
VI
Frequency Signal
Crosstalk at
VO(B)
20Log
= −40dB
VI(A)
= VSS
Sine Wave Distortion
(fis = 1KHz sine
wave)
5
10
15
CONTROL (address or Inhibit)
Propagation Delay
tPLH
tPHL
Time: Address or
Inhibit to Signal OUT
(Channel Turning ON)
tPLH
tPHL
200
0
1
5 (•)
1
5 (•)
0
0
1
10
10
10
1
5 (•)
1
1
1
2 (•)
3 (•)
5 (•)
0
Typ. Max.
10
10
10
V O at
Common
OUT/IN
4067B
4097B
30
15
11
14
20
60
30
20
V O at Any Channel
60
V O at
Common
OUT/IN
20
12
4067B
4097B
8
Between Any two (A
and B) Channels
Between
Measured
Sections
on
(A and B) common
4097B
Measured
only
on Any
Channel
1
10
MHz
18
0.3
0.2
0.12
0
0
0
5
10
15
325
135
95
650
270
190
5
10
15
220
90
65
440
180
130
10
0.3
Address or Inhibit to
Signal Crosstalk
10*
0
ns
MHz
V O at Any Channel
5
10
15
0
0
0
Unit
ns
0
0
0
Propagation Delay
Time: Address or
Inhibit to Signal OUT
(Channel Turning
OFF)
(•) Peak to peak voltage symmetrical about
Value
5
10
15
VC(A)=VDD
VC(B)=VSS
tW
Test Conditions
RL
fi
VI VSS VDD
(KΩ) (KHz) (V) (V) (V)
75
%
ns
ns
mV
peak
VDD − VSS
2
(*) Both ends of channel
7/16
HCC/HCF4067B HCC/HCF4097B
Typical ON Resistance vs Input Signal Voltage
(All Types)
Typical ON Resistance vs Input Signal Voltage
(All Types)
Typical ON Resistance vs Input Signal Voltage
(All Types)
Typical ON Resistance vs Input Signal Voltage
(All Types)
TEST CIRCUITS
OFF Channel Leakage Current Any Channel OFF
For 4067B
8/16
For 4097B
HCC/HCF4067B HCC/HCF4097B
OFF Channel Leakage Current All Channels OFF
For 4067B
For 4097B
Input Voltage Measure < 2 µA an All OFF Channels (e.g. Channel 12)
For 4067B
For 4097B
Quiescent Device Current
For 4067B
For 4097B
9/16
HCC/HCF4067B HCC/HCF4097B
Turn-on and Turn-off Propagation Delay Address Select Input to Signal Output (e. g. Channel 0)
For 4067B
For 4097B
Turn-on and Turn-off Propagation Delay-Inhibit Input to Signal Output (e. g. Channel 1)
For 4067B
Channel ON Resistance Measurement Circuit
10/16
For 4097B
HCC/HCF4067B HCC/HCF4097B
Propagation Delay Waveform Channel Being
Turned ON (RL = 10 KΩ, CL = 50 pF)
Propagation Delay Waveform Channel Being
Turned OFF (RL = 300 Ω, CL = 50 pF)
APPLICATIONS INFORMATION
In applications where separate power sources are
used to drive VDD and the signal inputs, the VDD current capability should exceed VDD/RL (RL = effective
external load). This provision avoids permanent current flow or clamp action on the VDD supply when
power is applied or removed from the
HCC/HCF4067B or HCC/HCF4097B.
When switching from one address to another, some
of the ON periods of the channels of the multiplexers
will overlap momentarily, which may be objectionable in certain applications. Also when a channel is
turned ON or OFF by an address input, there is a
momentary conductive path from the channel to
VSS, which will drump some charge from any capacitor connected to the input or output of the channel.
The inhibit input turning on a channel will similarly
drump some charge to VSS.
The amount of charge dumped is mostly a function
of the signal level above VSS.
Typically, ay VDD - VSS = 10V, a 100 pF capacitor
connected to the input or output of the channel will
lose 3-4% of its voltage at the moment the channel
turns ON or OFF. This loss of voltage is essentially
independent of the address or inhibit signal trnasition time, if the transition time is less than 1- 2 µs.
When the inhibit signal turns a channel off, there is
no change dumping of VSS. Rather, there is a slight
rise in the channel voltage level (65 mV typ.) due to
the capacitance coupling from inhibit input to channel input or output. Address input also couple some
voltage steps onto the channel signal levels.
In certain applications, the external load-resistor
current may include both VDD and signal line components. To avoid drawing VDD current when switch
current flows into the transmission gate inputs, the
voltage drop across the bidirectional switch must not
exceed 0.8 V (calculated from RON values shown in
ELECTRICAL CHARACTERISTICS CHART). No
VDD current will flow through RL if the switch current
flows into terminal 1 on the HCC/HCF4067B, terminals 1 and 17 on the HCC/HCF4097B.
11/16
HCC/HCF4067B HCC/HCF4097B
Plastic DIP24 (0.25) MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
a1
0.63
0.025
b
0.45
0.018
b1
0.23
b2
0.31
1.27
D
E
0.009
0.012
0.050
32.2
15.2
16.68
1.268
0.598
0.657
e
2.54
0.100
e3
27.94
1.100
F
MAX.
14.1
0.555
I
4.445
0.175
L
3.3
0.130
P043A
12/16
HCC/HCF4067B HCC/HCF4097B
Ceramic DIP24 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
A
inch
MAX.
MIN.
TYP.
32.3
MAX.
1.272
B
13.05
13.36
0.514
0.526
C
3.9
5.08
0.154
0.200
D
3
E
0.5
e3
0.118
1.78
0.020
27.94
0.070
1.100
F
2.29
2.79
0.090
0.110
G
0.4
0.55
0.016
0.022
I
1.17
1.52
0.046
0.060
L
0.22
0.31
0.009
0.012
M
1.52
2.49
0.060
0.098
15.8
0.606
0.622
N1
P
Q
4° (min.), 15° (max.)
15.4
5.71
0.225
P058C
13/16
HCC/HCF4067B HCC/HCF4097B
SO24 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
A
a1
MIN.
TYP.
MAX.
2.65
0.10
0.104
0.20
a2
0.004
0.007
2.45
0.096
b
0.35
0.49
0.013
0.019
b1
0.23
0.32
0.009
0.012
C
0.50
0.020
c1
45° (typ.)
D
15.20
15.60
0.598
0.614
E
10.00
10.65
0.393
0.420
e
1.27
0.05
e3
13.97
0.55
F
7.40
7.60
0.291
0.299
L
0.50
1.27
0.19
0.050
S
8° (max.)
L
s
e3
E
D
13
1
12
F
24
14/16
b1
e
a1
b
A
a2
C
c1
HCC/HCF4067B HCC/HCF4097B
PLCC20 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
MAX.
A
9.78
10.03
0.385
0.395
B
8.89
9.04
0.350
0.356
D
4.2
4.57
0.165
0.180
d1
2.54
0.100
d2
0.56
0.022
E
7.37
8.38
0.290
0.330
e
1.27
0.050
e3
5.08
0.200
F
0.38
0.015
G
0.101
0.004
M
1.27
0.050
M1
1.14
0.045
P027A
15/16
HCC/HCF4067B HCC/HCF4097B
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
 1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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16/16