LDRxxyy VERY LOW DROP DUAL VOLTAGE REGULATOR ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ OUTPUT CURRENT 1 UP TO 500mA OUTPUT CURRENT 2 UP TO 1.0A LOW DROPOUT VOLTAGE 1 (0.3V @ IO =500mA) LOW DROPOUT VOLTAGE 2 (0.4V @ IO =1A) VERY LOW SUPPLY CURRENT (TYP.50µA IN OFF MODE, 1.6mA MAX IN ON MODE) LOGIC-CONTROLLED ELECTRONIC SHUTDOWN OUTPUT VOLTAGE AVAILABILITY FOR EACH REGULATOR: 1.8V, 2.5V, 3.3V INTERNAL CURRENT AND THERMAL LIMIT STABLE WITH LOW VALUE (MIN 4.7µF) AND LOW E.S.R. OUTPUT CAPACITORS SUPPLY VOLTAGE REJECTION: 70dB (TYP.) TEMPERATURE RANGE (-40°C TO 125°C) SPAK-7L PPAK (0.5V) and the very low supply current make it particularly suitable for low noise and low power applications such as PDA, MICRODRIVE and other data storage applications while the used high voltage technology makes this device suitable for consumer applications such as MONITORS AND SET-TOP-BOX. For each VO a Shutdown Logic Control function is available (TTL compatible) to decrease the total power consumption. DESCRIPTION The LDRxxyy is a Very Low Drop Dual Voltage Regulator available in PPAK for the version without inhibit and in SPAK-7L for the version with the shutdown feature. The very low drop-voltage Figure 1: Block Diagram VI1 INH1 POWER 1 START UP 1 BAND GAP 1 VO1 DRIVER 1 + ERROR AMPLIFIER 1 THERMAL 1 THERMAL 2 + ERROR AMPLIFIER 2 INH2 START UP 2 BAND GAP 2 DRIVER 2 VI2 August 2004 POWER 2 VO2 Rev. 2 1/13 LDRxxyy Table 1: Absolute Maximum Ratings Symbol Parameter Value Unit VI1 & VI2 DC Input Voltage -0.3 to 15 V INH IO Shutdown Voltage Output Current -0.3 to 15 V Internally Limited PTOT Power Dissipation Internally Limited TSTG Storage Temperature Range -50 to +150 °C Operating Ambient Temperature Range -40 to +125 °C TA Absolute Maximum Rating are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Table 2: Thermal Data Symbol RTHJ-C Parameter Junction to case thermal resistance PPAK SPAK-7L Unit 8 2 °C/W Figure 2: Connection Diagram (top view) PPAK SPAK-7L Table 3: Pin Description Symbol Pin N° for PPAK Pin N° for SPAK-7L GND VI1 3 2 4 2 Ground pin Input 1 Supply Pin. Bypass with a 2.2µF capacitor to GND VI2 1 1 Input 2 Supply Pin. Bypass with a 2.2µF capacitor to GND 3 Name and Function 5 Enable 1 Pin. Internally connected to VI1 in the PPAK version Enable 2 Pin. Internally connected to VI2 in the PPAK version VO1 4 6 Output 1 Pin. Bypass with a 4.7µF capacitor to GND Port VO2 5 7 VINH1 VINH2 N.C. Output 2 Pin. Bypass with a 4.7µF capacitor to GND Port Not Internally Connected Table 4: Order Codes PART NUMBERS VO1 VO2 TYPE 1.8 V 1.8 V 2.5 V 2.5 V 3.3 V 3.3 V 2.5 V 3.3 V 1.8 V 3.3 V 1.8 V 2.5 V LDR1825 LDR1833 LDR2518 LDR2533 LDR3318 LDR3325 2/13 SPAK-7L PPAK LDR1825K7-R LDR1833K7-R LDR2518K7-R LDR2533K7-R LDR3318K7-R LDR3325K7-R LDR1825PT-R LDR1833PT-R LDR2518PT-R LDR2533PT-R LDR3318PT-R LDR3325PT-R LDRxxyy Table 5: Electrical Characteristics (VI1 = VO1+2V, VI2 = VO2+2V, VINH1 = VINH2 = 2.5V, CI1,2 = 2.2µF, CO1,2 = 4.7µF, IO1 = IO2 = 10mA, TA = -40°C to 125°C, unless otherwise specified. Typical values are referred at TA = 25°C) Symbol Parameter VO1 Output Voltage 1 VO2 Output Voltage 2 VDROP1 Dropout Voltage 1 (1) VDROP2 Dropout Voltage 2 (1) Test Conditions Min. Typ. Max. Unit -5 VNOM1 +5 %V -5 VNOM2 +5 %V IO1 = 500mA 0.3 0.7 V IO2 = 1A 0.4 0.8 V 15 30 mV Line Regulation 2 VI1 = VO1+2V to VO1+7V, IO = 250mA VI2 = VO2+2V to VO2+7V, IO = 500mA 15 40 mV ∆VO1 Line Regulation 1 ∆VO2 ∆VO1 Load Regulation 1 VI1 = VO1+2V, IO1 = 10 to 500mA 10 mV ∆VO2 Load Regulation 2 VI2 = VO2+2V, IO2 = 10mA to 1A 60 mV ISTOT Total Supply Current IO1 = IO2 = NO LOAD 2 mA 1 Channel Supply Current NO LOAD 1 mA IS Quiescent Current IO1 = 500mA, IO2 = 1A ISC1 Short Circuit Current 1 TA = 25° TA = 25° IQMAX ISC2 Short Circuit Current 2 VINH-H Enable Voltage HIGH VINH-L Enable Voltage LOW 30 mA 500 800 mA 1 1.6 A 2.4 V 0.8 V IINH Enable Pin Current VINH = 5V 6 µA SVR Supply Voltage Rejection (2) VI1,2 = VO1,2 +3V ±1V, IO1,2 = 10 mA, f = 120Hz Bandwidth of 10Hz to 100KHz 70 dB 0.003 %VO eN RMS Output Noise (2) (1): This test is not performed for VO<2.5V. (2): Guaranteed by design, but not tested in production. Figure 3: Typical Application Circuit 3/13 LDRxxyy TYPICAL CHARACTERISTICS (unless otherwise specified Tj = 25°C) Figure 4: Dropout Voltage (VO1) vs Temperature Figure 7: Output Voltage (VO2) vs Temperature Figure 5: Dropout Voltage (VO2) vs Temperature Figure 8: Line Regulation (VO1) vs Temperature Figure 6: Output Voltage (VO1) vs Temperature Figure 9: Load Regulation (VO1) vs Temperature 4/13 LDRxxyy Figure 10: Line Regulation (VO2) vs Temperature Figure 13: Short Circuit Current (VO2) vs Drop Voltage Figure 11: Load Regulation (VO2) vs Temperature Figure 14: Inhibit Voltage vs Temperature Figure 12: Short Circuit Current (VO1) vs Drop Voltage Figure 15: One Channel Inhibit Current vs Temperature 5/13 LDRxxyy Figure 16: Supply Voltage Rejection vs (VO1) Temperature Figure 19: Supply Voltage Rejection (VO2) vs Frequency Figure 17: Supply Voltage Rejection vs (VO2) Temperature Figure 20: Maximum Total Quiescent Current vs Temperature Figure 18: Supply Voltage Rejection (VO1) vs Frequency Figure 21: Total Supply Current vs Temperature 6/13 LDRxxyy Figure 22: Quiescent Current (VO1) vs Output Current Figure 25: Load Transient CI1,2=1µF, CO1,2=2.2µF, VINH1,2 =2.5V, VI1=4.5V, VI2=5.3V, IO1=5mA to 0.5A, IO2=5mA to 1A, tRISE=tFALL=4.2µs Figure 23: Quiescent Current (VO2) vs Output Current Figure 26: Line Transient VO1,2 CI1,2=0, CO1,2=2.2µF, VI1=4.4 to 10.4V, VI2=5.3 to 11.3V, IO1=0.25A, IO2 =0.5A, tRISE=tFALL =4.4µs Figure 24: Thermal Protection vs VO1 Figure 27: Start up Transient VO1 VI1=1.1 to 8.5V, VI2=1.2 to 9.8V, IO1=0.25A, IO2=0.5A, t RISE=5µs 7/13 LDRxxyy PPAK MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.4 0.6 0.015 0.023 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 D1 E 5.1 6.4 0.244 0.201 6.6 0.252 0.260 E1 4.7 0.185 e 1.27 0.050 G 4.9 G1 2.38 2.7 0.093 0.106 H 9.35 10.1 0.368 0.397 L2 0.8 L4 0.6 L5 1 L6 5.25 1 1 2.8 0.193 0.206 0.031 0.023 0.039 0.039 0.039 0.110 0078180-E 8/13 LDRxxyy SPAK-7L MECHANICAL DATA DIM. mm. MIN. A 1.78 A2 0.03 C MAX. MIN. 2.03 0.070 0.13 0.001 0.25 C1 D TYP inch MAX. 0.080 0.005 0.010 0.25 1.02 TYP. 0.010 1.27 0.040 0.050 D1 7.87 8.13 0.310 0.320 F 0.63 0.79 0.025 0.031 G 1.27 0.050 G1 7.62 0.3 H1 5.59 0.220 H2 9.27 9.52 0.365 0.375 H3 8.89 9.14 0.350 0.360 L 10.41 10.67 0.410 L1 7.49 0.420 0.295 L2 8.89 9.14 0.350 0.360 M 0.79 1.04 0.031 0.041 6˚ 3˚ N V 0.25 3˚ 0.010 6˚ PO13F2/A 9/13 LDRxxyy Tape & Reel SPAK-xL MECHANICAL DATA mm. inch DIM. MIN. TYP A MIN. TYP. 180 13.0 13.2 MAX. 7.086 C 12.8 D 20.2 0.795 N 60 2.362 T 10/13 MAX. 0.504 0.512 14.4 0.519 0.567 Ao 9.70 9.80 9.90 0.382 0.386 0.390 Bo 10.85 10.95 11.05 0.423 0.427 0.431 Ko 2.30 2.40 2.50 0.090 0.094 0.098 Po 3.9 4.0 4.1 0.153 0.157 0.161 P 11.9 12.0 12.1 0.468 0.472 0.476 LDRxxyy Tape & Reel DPAK-PPAK MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. 330 13.0 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 MAX. 0.504 0.512 22.4 0.519 0.882 Ao 6.80 6.90 7.00 0.268 0.272 0.2.76 Bo 10.40 10.50 10.60 0.409 0.413 0.417 Ko 2.55 2.65 2.75 0.100 0.104 0.105 Po 3.9 4.0 4.1 0.153 0.157 0.161 P 7.9 8.0 8.1 0.311 0.315 0.319 11/13 LDRxxyy Table 6: Revision History Date Revision 03-Aug-2004 2 12/13 Description of Changes Typing correction on tables 1, 3, 5 and figures 3, 6, 10, 11, 14, 17, 22, 23. LDRxxyy Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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