M74HCT75 4 BIT D TYPE LATCH ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 21ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 75 DESCRIPTION The M74HCT75 is an high speed CMOS 4 BIT D TYPE LATCH fabricated with silicon gate C2MOS technology. It contains two groups of 2 bit latches controlled by an enable input (G1•2 or G3•4). These two latch groups can be used in different circuits. Each latch has Q and Q outputs (1Q - 4Q and 1Q - 4Q). The data applied to the data input is transferred to the Q and Q outputs when the enable input is taken high and the outputs will follow the data input as long as the enable input is kept high. When the DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HCT75B1R M74HCT75M1R T&R M74HCT75RM13TR M74HCT75TTR enable input is taken low, the information data applied to the data input is retained at the outputs. The M74HCT75 is designed to directly interface HSC2MOS systems with TTL and NMOS components. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS September 2001 1/9 M74HCT75 IINPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 4, 11, 8 1Q to 4Q 2, 3, 6, 7 1D to 4D 4 G3 • 4 13 G1 • 2 16, 15, 10, 9 12 1Q to 4Q GND VCC 5 NAME AND FUNCTION Complementary Latch Outputs Data Inputs Latch Enable Input, latches 3 and 4 Latch Enable Input, latches 1 and 2 Latch Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS FUNCTION LOGIC DIAGRAM 2/9 D G Q Q L H X H H L L H Qn H L Qn LATCH M74HCT75 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) V 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Unit Supply Voltage 4.5 to 5.5 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C tr, tf Input Rise and Fall Time (VCC = 4.5 to 5.5V) 0 to 500 ns 3/9 M74HCT75 DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL II ICC ∆ ICC Parameter High Level Input Voltage Low Level Input Voltage Min. 4.5 to 5.5 4.5 to 5.5 4.5 Low Level Output Voltage 4.5 Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current TA = 25°C VCC (V) High Level Output Voltage Value Typ. Max. 2.0 -40 to 85°C -55 to 125°C Min. Min. Max. 2.0 0.8 Max. 2.0 0.8 V 0.8 IO=-20 µA 4.4 4.5 4.4 4.4 IO=-4.0 mA 4.18 4.31 4.13 4.10 Unit V V IO=20 µA 0.0 0.1 0.1 0.1 IO=4.0 mA 0.17 0.26 0.33 0.40 V 5.5 VI = VCC or GND ± 0.1 ±1 ±1 µA 5.5 VI = VCC or GND 2 20 40 µA 5.5 Per Input pin VI = 0.5V or VI = 2.4V Other Inputs at VCC or GND IO = 0 2.0 2.9 3.0 mA AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (DATA - Q) tPLH tPHL Propagation Delay Time (G - Q) Minimum Pulse tW(H) Width (G) Minimum Set-Up ts Time Minimum Hold th Time 4/9 VCC (V) Value TA = 25°C -55 to 125°C Min. Min. Max. Unit Typ. Max. 4.5 8 15 19 22 ns 4.5 18 28 35 42 ns 4.5 21 33 41 50 ns 4.5 8 15 19 22 ns 4.5 4 10 13 15 ns 5 5 8 ns 4.5 Min. -40 to 85°C Max. M74HCT75 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) Value TA = 25°C Min. Typ. Max. 10 CIN Input Capacitance 5 CPD Power Dissipation Capacitance (note 1) 61 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM : PROPAGATION DELAY TIMES, MINIMUM PULSE WIDTH, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 5/9 M74HCT75 Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 6/9 M74HCT75 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) PO13H 7/9 M74HCT75 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 8/9 M74HCT75 Information furnished is believed to be accurate and reliable. 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