STMICROELECTRONICS STP16NK65Z

STP16NK65Z
STB16NK65Z-S
N-CHANNEL 650V - 0.38Ω - 13A TO-220 / I2SPAK
Zener - Protected SuperMESH™ MOSFET
Figure 1: Package
Table 1: General Features
TYPE
VDSS
RDS(on)
ID
Pw
STP16NK65Z
STB16NK65Z-S
650 V
650 V
< 0.50 Ω
< 0.50 Ω
13 A
13 A
190 W
190 W
■
■
■
■
■
■
TYPICAL RDS(on) = 0.38Ω
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
GATE CHARGE MINIMIZED
VERY LOW INTRINSIC CAPACITANCES
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
stripbased PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage
MOSFETs including revolutionary MDmesh™
products.
3
12
3
1
TO-220
2
I²SPAK
Figure 2: Internal Schematic Diagram
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ IDEAL FOR OFF-LINE POWER SUPPLIES
Table 2: Order Codes
SALES TYPE
MARKING
PACKAGE
PACKAGING
STP16NK65Z
P16NK65Z
TO-220
TUBE
STB16NK65Z-S
B16NK65Z
I²SPAK
TUBE
Rev. 3
September 2005
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STP16NK65Z - STB16NK65Z-S
Table 3: Absolute Maximum ratings
Symbol
VDS
VDGR
VGS
Parameter
Value
Unit
Drain-source Voltage (VGS = 0)
650
V
Drain-gate Voltage (RGS = 20 kΩ)
650
V
Gate- source Voltage
± 30
V
ID
Drain Current (continuous) at TC = 25°C
13
A
ID
Drain Current (continuous) at TC = 100°C
8.19
A
52
A
IDM (*)
Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
190
W
Derating Factor
1.51
W/°C
Gate source EDS (HBM-C=100pF, R=1.5kΩ)
6000
V
4.5
V/ns
-55 to 150
°C
VESD(G-S)
dv/dt (1)
Tj
Tstg
Peak Diode Recovery voltage slope
Operating Junction Temperature
Storage Temperature
(*) Pulse width limited by safe operating area
(1) ISD ≤ 13 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS,T j ≤ T JMAX
Table 4: Thermal Data
Rthj-case
Thermal Resistance Junction-case Max
0.66
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
°C/W
Maximum Lead Temperature For Soldering Purpose
300
°C
Max. Value
Unit
Tl
Table 5: Avalanche Characteristics
Symbol
Parameter
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
13
A
EAS
Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
350
mJ
Table 6: Gate-Source Zener Diode
Symbol
BVGSO
Parameter
Gate-Source Breakdown
Voltage
Test Condition
Min.
Igs=± 1mA (Open Drain)
30
Typ.
Max.
Unit
V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied fromgate to source. In this respect the Zener voltage ia appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components.
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STP16NK65Z - STB16NK65Z-S
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
Table 7: On/Off
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
650
Unit
Drain-source
Breakdown Voltage
ID = 1 mA, VGS = 0
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
µA
µA
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20 V
±10
µA
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 100 µA
3.75
4.5
V
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 6.5 A
0.38
0.50
Ω
Typ.
Max.
Unit
V(BR)DSS
3
V
Table 8: Dynamic
Symbol
gfs (1)
Parameter
Test Conditions
Min.
Forward Transconductance
VDS = 15 V, ID = 6.5 A
12
S
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
VDS = 25 V, f = 1 MHz, VGS = 0
2750
275
60
pF
pF
pF
Equivalent Output
Capacitance
VGS = 0V, VDS = 6.5 V to 520 V
188
pF
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
VDD = 325 V, ID = 6.5 A
RG = 4.7Ω VGS = 10 V
(see Figure 17)
25
25
68
17
ns
ns
ns
ns
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 520 V, ID = 13 A,
VGS = 10 V
(see Figure 20)
89
18
45
nC
nC
nC
Ciss
Coss
Crss
Coss eq. (*)
Table 9: Source Drain Diode
Symbol
Parameter
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
VSD (1)
Forward On Voltage
ISD = 13 A, VGS = 0
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 13 A, di/dt = 100 A/µs,
VDD = 100 V, Tj = 25°C
(see Figure 18)
500
5.2
21
ns
µC
A
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 13 A, di/dt = 100 A/µs,
VDD = 100 V, Tj = 150°C
(see Figure 18)
615
7
22.5
ns
µC
A
trr
Qrr
IRRM
trr
Qrr
IRRM
Test Conditions
Min.
Typ.
Max.
Unit
13
52
A
A
1.6
V
(1) Pulsed: Pulse duration = 300µs, duty cycle 1.5%
(2) Pulse width limited by safe operating area
(*) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
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STP16NK65Z - STB16NK65Z-S
Figure 3: Safe Operating Area
Figure 6: Thermal Impedance
Figure 4: Output Characteristics
Figure 7: Transfer Characteristics
Figure 5: Transconductance
Figure 8: Static Drain-source On Resistance
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STP16NK65Z - STB16NK65Z-S
Figure 9: Gate Charge vs Gate-source Voltage
Figure 12: Capacitance Variations
Figure 10: Normalized Gate Thereshold Voltage vs Temperature
Figure 13: Normalized On Resistance vs Temperature
Figure 11: Dource-Drain Diode Forward Characteristics
Figure 14: Normalized BVdss vs Temperature
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STP16NK65Z - STB16NK65Z-S
Figure 15: Avalanche Energy vs Starting Tj
j
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STP16NK65Z - STB16NK65Z-S
Figure 16: Unclamped Inductive Load Test Circuit
Figure 19: Unclamped Inductive Wafeform
Figure 17: Switching Times Test Circuit For
Resistive Load
Figure 20: Gate Charge Test Circuit
Figure 18: Test Circuit For Inductive Load
Switching and Diode Recovery Times
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STP16NK65Z - STB16NK65Z-S
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These
packages have a Lead-free second level interconnect . The category of second level interconnect is
marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The
maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an
ST trademark. ECOPACK specifications are available at: www.st.com
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STP16NK65Z - STB16NK65Z-S
I2SPAK MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
A1
2.49
2.69
0.098
0.181
0.106
B
0.70
0.93
0.027
0.037
B2
1.14
1.70
0.045
0.067
C
0.45
0.60
0.018
0.024
C2
1.23
1.36
0.048
0.053
0.368
D
8.95
9.35
0.352
E
10.00
10.40
0.394
0.409
G
4.88
5.28
0.192
0.208
L
16.7
17.5
0.657
0.689
L2
1.27
1.4
0.05
0.055
L3
13.82
14.42
0.544
0.568
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STP16NK65Z - STB16NK65Z-S
TO-220 MECHANICAL DATA
DIM.
A
10/12
mm.
MIN.
TYP
inch
MAX.
MIN.
4.40
4.60
0.173
TYP.
MAX.
0.181
0.034
b
0.61
0.88
0.024
b1
1.15
1.70
0.045
0.066
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.60
0.620
E
10
10.40
0.393
0.409
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
F
1.23
1.32
0.048
0.052
H1
6.20
6.60
0.244
0.256
J1
2.40
2.72
0.094
0.107
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L20
16.40
0.645
L30
28.90
1.137
øP
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
STP16NK65Z - STB16NK65Z-S
Table 10: Revision History
Date
Revision
06-Aug-2004
02-Sep-2004
06-Sep-2005
1
2
3
Description of Changes
First Release.
Complete Version
Inserted Ecopack indication
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STP16NK65Z - STB16NK65Z-S
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