VIPer12ADIP VIPer12AS ® LOW POWER OFF LINE SMPS PRIMARY SWITCHER TYPICAL POWER CAPABILITY n n n n Mains type SO-8 DIP8 European (195 - 265 Vac) 8W 13 W US / Wide range (85 - 265 Vac) 5W 8W SO-8 DIP-8 ORDER CODES PACKAGE FIXED 60 KHZ SWITCHING FREQUENCY SO-8 DIP-8 9V TO 38V WIDE RANGE VDD VOLTAGE TUBE T&R VIPer12AS VIPer12AS13TR VIPer12ADIP CURRENT MODE CONTROL AUXILIARY UNDERVOLTAGE LOCKOUT WITH HYSTERESIS MOSFET on the same silicon chip. Typical applications cover off line power supplies for battery charger adapters, standby power supplies for TV or monitors, auxiliary supplies for motor control, etc. The internal control circuit offers the following benefits: – Large input voltage range on the VDD pin accommodates changes in auxiliary supply voltage. This feature is well adapted to battery charger adapter configurations. – Automatic burst mode in low load condition. – Overvoltage protection in hiccup mode. n HIGH VOLTAGE START UP CURRENT SOURCE n OVERTEMPERATURE, OVERCURRENT AND OVERVOLTAGE PROTECTION WITH AUTORESTART DESCRIPTION The VIPer12A combines a dedicated current mode PWM controller with a high voltage Power BLOCK DIAGRAM DRAIN ON/OFF 60kHz OSCILLATOR REGULATOR INTERNAL SUPPLY OVERTEMP. DETECTOR R1 S FF PWM LATCH Q R2 R3 R4 _ VDD + BLANKING 8/14.5V + + 42V _ S R FF _ 0.23 V OVERVOLTAGE LATCH 230 Ω Q 1 kΩ FB SOURCE September 2002 1/15 VIPer12ADIP / VIPer12AS PIN FUNCTION Name Function VDD Power supply of the control circuits. Also provides a charging current during start up thanks to a high voltage current source connected to the drain. For this purpose, an hysteresis comparator monitors the VDD voltage and provides two thresholds: - VDDon: Voltage value (typically 14.5V) at which the device starts switching and turns off the start up current source. - VDDoff: Voltage value (typically 8V) at which the device stops switching and turns on the start up current source. SOURCE DRAIN FB Power MOSFET source and circuit ground reference. Power MOSFET drain. Also used by the internal high voltage current source during start up phase for charging the external VDD capacitor. Feedback input. The useful voltage range extends from 0V to 1V, and defines the peak drain MOSFET current. The current limitation, which corresponds to the maximum drain current, is obtained for a FB pin shorted to the SOURCE pin. CURRENT AND VOLTAGE CONVENTIONS IDD ID VDD I FB FB VDD DRAIN CONTROL VD SOURCE VFB VIPer12A CONNECTION DIAGRAM SOURCE 1 8 DRAIN SOURCE 1 8 DRAIN SOURCE 2 7 DRAIN SOURCE 2 7 DRAIN FB 3 6 DRAIN FB 3 6 DRAIN VDD 4 5 DRAIN VDD 4 5 DRAIN SO-8 2/15 DIP8 VIPer12ADIP / VIPer12AS ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VDS(sw) Switching Drain Source Voltage (Tj=25 ... 125°C) (See note 1) -0.3 ... 730 V VDS(st) Start Up Drain Source Voltage (Tj=25 ... 125°C) (See note 2) -0.3 ... 400 V Internally limited A 0 ... 50 V 3 mA 200 1.5 V kV Internally limited °C ID Continuous Drain Current VDD Supply Voltage IFB Feedback Current VESD Electrostatic Discharge: Machine Model (R=0Ω; C=200pF) Charged Device Model Tj Junction Operating Temperature Tc Case Operating Temperature -40 to 150 °C Storage Temperature -55 to 150 °C Tstg Note: 1. This parameter applies when the start up current source is off. This is the case when the VDD voltage has reached VDDon and remains above VDDoff. 2. This parameter applies when the start up current source is on. This is the case when the VDD voltage has not yet reached VDDon or has fallen below V DDoff. THERMAL DATA Symbol Parameter Rthj-case Thermal Resistance Junction-Pins for: SO-8 DIP8 Rthj-amb Thermal Resistance Junction-Ambient for: SO-8 DIP8 (See note 1) (See note 1) Max Value Unit 25 15 °C/W 55 45 °C/W Note: 1. When mounted on a standard single-sided FR4 board with 200 mm² of Cu (at least 35 µm thick) connected to all DRAIN pins. ELECTRICAL CHARACTERISTICS (Tj=25°C, VDD=18V, unless otherwise specified) POWER SECTION Symbol BVDSS Parameter Test Conditions Min. Typ. Max. Unit Drain-Source Voltage ID=1mA; VFB=2V Off State Drain Current VDS=500V; VFB=2V; Tj=125°C Static Drain-Source On State Resistance ID=0.2A ID=0.2A; Tj=100°C tf Fall Time ID=0.1A; VIN=300V (See fig.1) (See note 1) 100 ns tr Rise Time ID=0.2A; VIN=300V (See fig.1) (See note 1) 50 ns Drain Capacitance VDS=25V 40 pF IDSS RDSon Coss 730 V 27 0.1 mA 30 54 Ω Note: 1. On clamped inductive load 3/15 VIPer12ADIP / VIPer12AS ELECTRICAL CHARACTERISTICS (Tj=25°C, VDD=18V, unless otherwise specified) SUPPLY SECTION Symbol Parameter Test Conditions Min. Typ. Max. Unit IDDch Start Up Charging Current VDS=100V; VDD=5V ...VDDon (See fig. 2) IDDoff Start Up Charging Current in Thermal Shutdown VDD=5V; VDS=100V Tj > TSD - THYST IDD0 Operating Supply Current I =2mA FB Not Switching IDD1 Operating Supply Current I =0.5mA; I =50mA FB D Switching DRST Restart Duty Cycle VDDoff VDD Undervoltage Shutdown Threshold (See fig. 2 & 3) 7 8 9 V VDDon VDD Start Up Threshold (See fig. 2 & 3) 13 14.5 16 V (See fig. 2) 5.8 6.5 7.2 V 38 42 46 V VDDhyst VDD Threshold Hysteresis VDDovp VDD Overvoltage Threshold -1 mA 0 mA 3 5 mA (Note 1) 4.5 mA (See fig. 3) 16 % Note: 1. These test conditions obtained with a resistive load are leading to the maximum conduction time of the device. OSCILLATOR SECTION Symbol FOSC Parameter Oscillator Frequency Total Variation Test Conditions VDD=VDDoff ... 35V; Tj=0 ... 100°C Min. Typ. Max. Unit 54 60 66 kHz Min. Typ. Max. Unit 0.48 A PWM COMPARATOR SECTION Symbol Parameter Test Conditions GID IFB to ID Current Gain IDlim Peak Current Limitation IFBsd IFB Shutdown Current RFB FB Pin Input Impedance ID=0mA td Current Sense Delay to Turn-Off ID=0.2A tb tONmin (See fig. 4) VFB=0V (See fig. 4) 320 0.32 0.4 (See fig. 4) 0.9 mA (See fig. 4) 1.2 kΩ 200 ns Blanking Time 500 ns Minimum Turn On Time 700 ns OVERTEMPERATURE SECTION Symbol Parameter Test Conditions TSD Thermal Shutdown Temperature (See fig. 5) THYST Thermal Shutdown Hysteresis (See fig. 5) 4/15 Min. Typ. Max. Unit 140 170 °C 40 °C VIPer12ADIP / VIPer12AS Figure 1 : Rise and Fall Time ID C L D C << Coss t VDS VDD FB DRAIN 300V CONTROL 90% SOURCE trv tfv VIPer12A t 10% Figure 2 : Start Up VDD Current IDD IDD0 VDDhyst VDDoff VDD VDDon IDDch VDS = 100 V Fsw = 0 kHz Figure 3 : Restart Duty Cycle VDD VDDon VDD VDDoff 10µF tCH tST D RST = ------------------------t ST + tCH tST t FB 2V DRAIN CONTROL 100V SOURCE VIPer12A 5/15 VIPer12ADIP / VIPer12AS Figure 4 : Peak Drain Current Vs. Feedback Current 100V ID 4mH IDpeak 1/FOSC VDD t FB 18V DRAIN 100V CONTROL SOURCE IFB 47nF VIPer12A VFB I R FBsd ⋅ FB The drain current limitation is obtained for VFB = 0 V, and a negative current is drawn from the FB pin. See the Application section for further details. IFB IDpeak ∆I Dpea k GID = – ----------------------∆I FB IDlim IFB 0 IFBsd Figure 5 : Thermal Shutdown Tj TSD THYST t VDD VDDon Automatic start up t 6/15 VIPer12ADIP / VIPer12AS Figure 6 : Switching Frequency vs Temperature 1.01 Normalized Frequency Vdd = 10V ... 35V 1 0.99 0.98 0.97 -20 0 20 40 60 80 100 120 100 120 Temperature (°C) Figure 7 : Current Limitation vs Temperature 1.04 Normalized Current Limitation 1.03 1.02 1.01 1 0.99 0.98 Vin = 100V Vdd = 20V 0.97 0.96 0.95 0.94 -20 0 20 40 60 80 Temperature (°C) 7/15 VIPer12ADIP / VIPer12AS Figure 8 : Rectangular U-I output characteristics for battery charger DCOUT R1 T1 C2 C1 D2 D1 D3 T2 F1 C3 + AC IN D4 ISO1 U1 C4 DRAIN - VDD FB C5 CONTROL C6 SOURCE VIPerX2A C7 R2 D5 U2 R3 R4 Vcc Vref R5 C8 C10 C9 - + + - R6 GND R7 R8 TSM101 R9 R10 GND RECTANGULAR U-I OUTPUT CHARACTERISTIC A complete regulation scheme can achieve combined and accurate output characteristics. Figure 8 presents a secondary feedback through an optocoupler driven by a TSM101. This device offers two operational amplifiers and a voltage reference, thus allowing the regulation of both output voltage and current. An integrated OR function performs the combination of the two resulting error signals, leading to a dual voltage and current limitation, known as a rectangular output characteristic. This type of power supply is especially useful for battery chargers where the output is mainly used in current mode, in order to deliver a defined charging rate. The accurate voltage regulation is also convenient for Li-ion batteries which require both modes of operation. 8/15 WIDE RANGE OF VDD VOLTAGE The VDD pin voltage range extends from 9V to 38V. This feature offers a great flexibility in design to achieve various behaviors. In figure 8 a forward configuration has been chosen to supply the device with two benefits: – as soon as the device starts switching, it immediately receives some energy from the auxiliary winding. C5 can be therefore reduced and a small ceramic chip (100 nF) is sufficient to insure the filtering function. The total start up time from the switch on of input voltage to output voltage presence is dramatically decreased. – the output current characteristic can be maintained even with very low or zero output voltage. Since the TSM101 is also supplied in forward mode, it keeps the current regulation up whatever the output voltage is.The VDD pin voltage may vary as much as the input voltage, that is to say with a ratio of about 4 for a wide range application. VIPer12ADIP / VIPer12AS FEEDBACK PIN PRINCIPLE OF OPERATION A feedback pin controls the operation of the device. Unlike conventional PWM control circuits which use a voltage input (the inverted input of an operational amplifier), the FB pin is sensitive to current. Figure 9 presents the internal current mode structure. The Power MOSFET delivers a sense current Is which is proportional to the main current Id. R2 receives this current and the current coming from the FB pin. The voltage across R2 is then compared to a fixed reference voltage of about 0.23 V. The MOSFET is switched off when the following equation is reached: R 2 ⋅ ( IS + IFB ) = 0.23V By extracting IS: 0.23V I S = -------------- – I FB R2 Using the current sense ratio of the MOSFET GID : 0.23V I D = G ID ⋅ IS = G ID ⋅ -------------- – IFB R2 The current limitation is obtained with the FB pin shorted to ground (VFB = 0 V). This leads to a negative current sourced by this pin, and expressed by: 0.23V IFB = – -------------R1 By reporting this expression in the previous one, it is possible to obtain the drain current limitation IDlim: 1 1 IDlim = G ID ⋅ 0.23V ⋅ ------ + ------ R 2 R 1 Figure 9 : Internal Current Control Structure DRAIN 60kHz OSCILLATOR +Vdd S PWM LATCH R Id Q In a real application, the FB pin is driven with an optocoupler as shown on figure 9 which acts as a pull up. So, it is not possible to really short this pin to ground and the above drain current value is not achievable. Nevertheless, the capacitor C is averaging the voltage on the FB pin, and when the optocoupler is off (start up or short circuit), it can be assumed that the corresponding voltage is very close to 0 V. For low drain currents, the formula (1) is valid as long as IFB satisfies IFB< IFBsd, where IFBsd is an internal threshold of the VIPer12A. If IFB exceeds this threshold the device will stop switching. This is represented on figure 4, and IFBsd value is specified in the PWM COMPARATOR SECTION. Actually, as soon as the drain current is about 12% of Idlim, that is to say 50 mA, the device will enter a burst mode operation by missing switching cycles. This is especially important when the converter is lightly loaded. It is then possible to build the total DC transfer function between ID and IFB as shown on figure 10. This figure also takes into account the internal blanking time and its associated minimum turn on time. This imposes a minimum drain current under which the device is no more able to control it in a linear way. This drain current depends on the primary inductance value of the transformer and the input voltage. Two cases may occur, depending on the value of this current versus the fixed 50 mA value, as described above. START UP SEQUENCE This device includes a high voltage start up current source connected on the drain of the device. As soon as a voltage is applied on the input of the converter, this start up current source is activated as long as VDD is lower than VDDon. When reaching VDDon, the start up current source is switched off and the device begins to operate by turning on and off its main power MOSFET. As the FB pin does not receive any current from the optocoupler, the device operates at full current capacity and the output voltage rises until reaching Figure 10 : IFB Transfer function Secondary feedback IDpeak Is 0.23V IFB IDlim 1 kΩ FB R1 C 230 Ω R2 SOURCE 1 t ⋅V ONmin IN --------------------------------------L Part masked by the IFBsd threshold 50mA 2 t ⋅V ONmin IN --------------------------------------L 0 IFB IFBsd 9/15 VIPer12ADIP / VIPer12AS Figure 11 : Start Up Sequence Figure 12 : Overvoltage Sequence VDD VDD VDDon VDDovp VDDoff VDDon tss VDDoff t t VDS IFB t t VOUT t the regulation point where the secondary loop begins to send a current in the optocoupler. At this point, the converter enters a regulated operation where the FB pin receives the amount of current needed to deliver the right power on secondary side. This sequence is shown in figure 11. Note that during the real starting phase tss, the device consumes some energy from the VDD capacitor, waiting for the auxiliary winding to provide a continuous supply. If the value of this capacitor is too low, the start up phase is terminated before receiving any energy from the auxiliary winding and the converter never starts up. This is illustrated also in the same figure in dashed lines. 10/15 OVERVOLTAGE THRESHOLD An overvoltage detector on the VDD pin allows the VIPer12A to reset itself when VDD exceeds VDDovp. This is illustrated in figure 12, which shows the whole sequence of an overvoltage event. Note that this event is only latched for the time needed by VDD to reach VDDoff, and then the device resumes normal operation automatically. VIPer12ADIP / VIPer12AS SO-8 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 c1 45 (typ.) D 4.8 5 0.188 0.196 E 5.8 6.2 0.228 0.244 e 1.27 e3 3.81 0.050 0.150 F 3.8 4 0.14 L 0.4 1.27 0.015 M 0.6 S L1 0.157 0.050 0.023 8 (max.) 0.8 1.2 0.031 0.047 11/15 1 VIPer12ADIP / VIPer12AS Plastic DIP-8 MECHANICAL DATA DIM. mm. MIN. TYP MAX. A 5.33 A1 0.38 A2 2.92 3.30 4.95 b 0.36 0.46 0.56 b2 1.14 1.52 1.78 c 0.20 0.25 0.36 D 9.02 9.27 10.16 E 7.62 7.87 8.26 E1 6.10 6.35 7.11 e 2.54 eA 7.62 eB L Package Weight 10.92 2.92 3.30 3.81 Gr. 470 P001 12/15 VIPer12ADIP / VIPer12AS SO-8 TUBE SHIPMENT (no suffix) B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. TAPE AND REEL SHIPMENT (suffix “13TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed 13/15 1 VIPer12ADIP / VIPer12AS DIP-8 TUBE SHIPMENT (no suffix) A C B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) 20 1000 532 8.4 11.2 0.8 All dimensions are in mm. 14/15 1 VIPer12ADIP / VIPer12AS Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2002 STMicroelectronics - Printed in ITALY- All Rights Reserved. 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