FUJITSU SEMICONDUCTOR DATA SHEET DS04-29120-1E Spread Spectrum Clock Generator MB88156 ■ DESCRIPTION MB88156 is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with the internal modulator. The modulation corresponds to the center spread and down spread. The multiplication ratio can be changed by the pin setting. Also, the pin can be set whether the modulation is changed. For no modulation, it has the center-non-spread to fix to the output frequency conforming to the multiplication setting and down-non-spread to fix the output frequency to center frequency of the down spread. ■ FEATURES • Input frequency : • Output frequency : 12.5 MHz to 50 MHz (multiplied by 1) 12.5 MHz to 25 MHz (multiplied by 2) 12.5 MHz to 20 MHz (multiplied by 4) CKOUT 12.5 MHz to 80 MHz REFOUT the same as input frequency (not multiplied) (Continued) ■ PACKAGE 16-pin plastic BCC (LCC-16P-M09) MB88156 (Continued) • Modulation rate • Frequency down function • Equipped with oscillation circuit • • • • • • : ±0.5%, ±1.0% (center spread) , −1.0%, −2.0% (down spread) : −0.5%, −1.0% (for down-non-spread) : Oscillation range 12.5 MHz to 40 MHz (Fundamental oscillation mode) 40 MHz to 48 MHz (At 3rd over tone) Modulation clock output Duty : 40% to 60% Modulation clock Cycle-Cycle Jitter : Multiplied by 1 (input) 12.5 MHz to 20 MHz less than 150 ps Multiplied by 1 (input) 20.0 MHz to 50 MHz less than 100 ps Multiplied by 2 (input) 12.5 MHz to 25 MHz less than 200 ps Multiplied by 4 (input) 12.5 MHz to 20 MHz less than 200 ps Low current consumption by CMOS process : 5 mA (24 MHz : Typ-sample, no load) Power supply voltage : 3.3 V ± 0.3 V Operating temperature : −40 °C to +85 °C Package : BCC 16-pin ■ PRODUCT LINEUP 2 Product Function MB88156-000 With REFOUT MB88156-001 Without REFOUT MB88156 ■ PIN ASSIGNMENT • MB88156-000 13 12 11 10 index 1 2 3 4 8 FREQ 7 MLTP0 6 MLTP1 5 VDD 16 REFOUT N.C. 9 MB88156 -000 SPRD 15 VSS 14 N.C. CKOUT N.C. XIN XOUT ENS XPD SEL TOP VIEW • MB88156-001 13 12 11 10 16 index 1 2 3 4 5 VDD N.C. MB88156 -001 N.C. 15 SPRD N.C. VSS 14 9 CKOUT N.C. XIN XOUT ENS XPD SEL TOP VIEW 8 FREQ 7 MLTP0 6 MLTP1 LCC-16P-M09 3 MB88156 ■ PIN DESCRIPTION Pin no. Pin name I/O Description 1 CKOUT O Modulated clock output pin Output “L” at power-down 2 VSS ⎯ GND pin 3 SPRD I Modulation type setting pin/frequency down setting SPRD = “L” : Down spread/down-non-spread SPRD = “H” : Center spread/center-non-spread For details, see “Setting of ENS, SPRD, and SEL”. 4 REFOUT/N.C. O Non modulation clock output pin (output “L” at power-down) /non connection pin 5 VDD ⎯ Power supply voltage pin 6 MLTP1 I 7 MLTP0 I 8 FREQ I Frequency setting pin For details, see “Setting of MLTP1, MLTP0, and FREQ”. 9 XIN I Pin for the connection of resonator/clock input 10 XOUT O Connecting pin of resonator 11 ENS I Modulation enable setting pin ENS = “L” : Non modulation ENS = “H” : Modulation 12 XPD I Power down pin XPD = “L” : Power down XPD = “H” : Normal operation 13 SEL I Modulation rate setting pin/frequency falling width setting pin For details, see “Setting of ENS, SPRD, and SEL”. 14 N.C. ⎯ Non connection pin 15 N.C. ⎯ Non connection pin 16 N.C. ⎯ Non connection pin Multiplication rate setting pin For details, see “Setting of MLTP1, MLTP0, and FREQ”. • Setting of MLTP1, MLTP0, and FREQ (Setting of multiplication rate and input frequency) Input frequency MLTP1 MLTP0 Multiplied by 1 L L L Multiplied by 2 H L L Multiplied by 4 H H FREQ 12.5 MHz to 25 MHz 12.5 MHz to 25.0 MHz L 25.0 MHz to 50 MHz 25.0 MHz to 50.0 MHz H 12.5 MHz to 25 MHz 25.0 MHz to 50.0 MHz 12.5 MHz to 20 MHz 50.0 MHz to 80.0 MHz Note : Setting other than above is disabled. 4 Multiplication rate Output frequency MB88156 • Setting of ENS, SPRD, and SEL (setting of output frequency) Setting pin ENS SPRD L L H L H H Output status SEL Modulation L H L Down-non-spread None Center-non-spread H L H L H Modulation type Down spread Provided Center spread Modulation rate Falling width ⎯ −0.5% ⎯ −1.0% ⎯ 0.0% ⎯ 0.0% −1.0% ⎯ −2.0% ⎯ ±0.5% ⎯ ± 1.0% ⎯ 5 MB88156 ■ I/O CIRCUIT TYPE Pin Circuit type Remarks • CMOS hysteresis input SEL, XPD • CMOS hysteresis input with pull-up resistor 50 kΩ (Typ) • At power-down, pull-up resistance is shut off. 50 kΩ Power down signal ENS, SPRD • CMOS hysteresis input with pull-down resistor 50 kΩ (Typ) • At power-down, pull-down resistance is shut off. FREQ, MLTP1, MLTP0 Power down signal 50 kΩ (Continued) 6 MB88156 (Continued) Pin Circuit type Remarks • CMOS output • IOL = 3 mA • Output “L” at power-down REFOUT • CMOS output • IOL = 4 mA • Output “L” at power-down CKOUT Note : For XIN and XOUT pins, see “■ OSCILLATION CIRCUIT”. 7 MB88156 ■ HANDLING DEVICES Preventing Latchup A latchup can occur if, on this device, (a) a voltage higher than VDD or a voltage lower than VSS is applied to an input or output pin or (b) a voltage higher than the rating is applied between VDD and VSS. The latchup, if it occurs, significantly increases the power supply current and may cause thermal destruction of an element. When you use this device, be very careful not to exceed the maximum rating. Handling unused pins Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or pulldown resistor. Unused output pin should be opened. The attention when the external clock is used Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock. Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin. Power supply pins Please design connecting the power supply pin of this device by as low impedance as possible from the current supply source. We recommend connecting electrolytic capacitor (about 10 µF) and the ceramic capacitor (about 0.01 µF) in parallel between VSS and VDD near the device, as a bypass capacitor. Oscillation circuit Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that electric wiring of XIN or XOUT pin and the resonator do not intersect other wiring. Design the printed circuit board that surrounds the XIN and XOUT pins with ground. Handling N.C. pin Be sure to open the N.C. pin when it is used. 8 MB88156 ■ BLOCK DIAGRAM VDD Power down XPD Modulation enable setting Modulation type setting/frequency down setting ENS SPRD Frequency setting PLL block FREQ Multiplication rate setting Modulation level setting/frequency falling width setting MLTP1, MLTP0 SEL Modulation clock output CKOUT Reference clock XOUT Reference clock output XIN Rf = 1 MΩ REFOUT/N.C. Power down signal VSS 1 − M Phase compare Reference clock 1 − N Charge pump V/I conversion Loop filter IDAC ICO Modulation clock output Modulation level setting/ frequency falling width setting SEL Modulation logic ENS 1 − L MB88156 PLL block A glitchless IDAC (current output D/A converter) provides precise modulation, thereby dramatically reducing EMI. 9 MB88156 ■ PIN SETTING After the pin setting is changed, the stabilization wait time of the modulation clock is required. The stabilization wait time of the modulation clock takes the maximum value of Lock-Up time in “AC Characteristics” in ■ ELECTRICAL CHARACTERISTICS. ENS modulation enable/disable setting ENS Modulation L No modulation H Modulation Spectrum does not spread when “L” is set to ENS pin. XPD power down XPD Status L Power down status H Operating status When setting “L” to XPD pin, it becomes power down mode (low power consumption mode) . Both of CKOUT and REFOUT for the output pin fixes to “L” output during the power down. SPRD modulation type setting/frequency down setting SPRD Status L Down spread/down-non-spread H Center spread/center-non-spread SEL modulation level setting/frequency falling width setting SEL Status ±0.5 % (at center spread) /±0.0 % (at center-non-spread) L −1.0 % (at down spread) /−0.5 % (at down-non-spread) ±1.0 % (at center spread) /±0.0 % (at center-non-spread) H −2.0 % (at down spread) /−1.0 % (at down-non-spread) MLTP1, MLTP0 multiplication rate setting MLTP1 MLTP0 Multiplication rate L L Multiplied by 1 H L Multiplied by 2 H H Multiplied by 4 Note : REFOUT is not multiplied. FREQ frequency setting 10 FREQ Input frequency L 12.5 MHz to 25 MHz (Multiplied by 1, 2) / 12.5 MHz to 20 MHz (Multiplied by 4) H 25 MHz to 50 MHz (Multiplied by 1) MB88156 • Center spread Spectrum is spread (modulated) by centering on the non-spread frequency. Modulation width 2.0% Radiation level −1.0% +1.0% Frequency Non-spread frequency Example of center spread modulation rate ±1.0% (2.0%) • Down spread Spectrum is spread (modulated) below the non-spread frequency. Radiation level Modulation width 2.0% −2.0% Frequency Non-spread frequency Example of down spread modulation rate − 2.0% • Down-non-spread Slightly lowering the output frequency with modulation stopped fixes it to the center frequency for down spreading. Radiation level −1.0% Frequency Down frequency Frequency of multiplication ratio setting Example of down-non-spread −1.0% 11 MB88156 ■ ABSOLUTE MAXIMUM RATINGS Parameter Rating Symbol Unit Min Max VDD − 0.5 +4.0 V Input voltage* VI VSS − 0.5 VDD + 0.5 V Output voltage* VO VSS − 0.5 VDD + 0.5 V Storage temperature TST − 55 +125 °C Operation junction temperature TJ − 40 +125 °C Output current IO − 14 +14 mA Overshoot VIOVER ⎯ VDD + 1.0 (tOVER ≤ 50 ns) V Undershoot VIUNDER VSS − 1.0 (tUNDER ≤ 50 ns) ⎯ V Power supply voltage* *: The parameter is based on VSS = 0.0 V. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. Overshoot/Undershoot tUNDER ≤ 50 ns VIOVER ≤ VDD+1.0 V VDD Input pin VSS tOVER ≤ 50 ns 12 VIUNDER ≤ VSS−1.0 V MB88156 ■ RECOMMENDED OPERATING CONDITIONS (VSS = 0.0 V) Parameter Symbol Pin Conditions VDD VDD Value Unit Min Typ Max ⎯ 3.0 3.3 3.6 V VIH XIN, SEL, ENS, FREQ, MLTP1, MLTP0, SPRD, XPD ⎯ VDD × 0.8 ⎯ VDD + 0.3 V “L” level input voltage VIL XIN, SEL, ENS, FREQ, MLTP1, MLTP0, SPRD, XPD ⎯ VSS ⎯ VDD × 0.2 V Input clock duty cycle tDCI XIN 12.5 MHz to 50 MHz 40 50 60 % Operating temperature Ta ⎯ ⎯ −40 ⎯ +85 °C Power supply voltage “H” level input voltage WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. Input clock duty cycle (tDCI = tb/ta) ta tb XIN 1.5 V 13 MB88156 ■ ELECTRICAL CHARACTERISTICS • DC Characteristics Parameter Power supply current (Ta = − 40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V) Symbol ICC Pin Conditions VDD Unit Min Typ Max 24 MHz output No load capacitance ⎯ 5.0 7.0 mA At power-down ⎯ 10 ⎯ µA VDD − 0.5 ⎯ VDD V VSS ⎯ 0.4 V VOHC CKOUT “H” level output IOH = −4 mA VOHR REFOUT “H” level output IOH = −3 mA VOLC CKOUT “L” level output IOL = 4 mA VOLR REFOUT “L” level output IOL = 3 mA ZOC CKOUT 12.5 MHz to 80 MHz ⎯ 45 ⎯ ZOR REFOUT 12.5 MHz to 50 MHz ⎯ 70 ⎯ Input capacitance CIN SEL, ENS, FREQ, MLTP1, MLTP0, SPRD, XPD Ta = +25 °C VDD = VI = 0.0 V f = 1 MHz ⎯ ⎯ 16 pF Pull-up resistor RPU ENS, SPRD ⎯ 25 50 200 kΩ Pull-down resistor RPD FREQ, MLTP1, MLTP0 ⎯ 25 50 200 kΩ REFOUT 12.5 MHz to 50 MHz ⎯ ⎯ 15 12.5 MHz to 50 MHz ⎯ ⎯ 15 50 MHz to 80 MHz ⎯ ⎯ 7 Output voltage Output impedance Load capacitance 14 Value CL CKOUT Ω pF MB88156 • AC Characteristics (Ta = − 40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V) Parameter Symbol Pin Conditions Oscillation frequency fx XIN, XOUT Input frequency fin XIN Min Typ Max Fundamental oscillation 12.5 ⎯ 40 3rd overtone 40 ⎯ 48 Multiplied by 1 12.5 ⎯ 25 Multiplied by 2 12.5 ⎯ 25 Multiplied by 4 12.5 ⎯ 20 Multiplied by 1 25 ⎯ 50 Multiplied by 1 12.5 ⎯ 25 Multiplied by 2 12.5 ⎯ 25 Multiplied by 4 12.5 ⎯ 20 Multiplied by 1 25 ⎯ 50 Multiplied by 1 12.5 ⎯ 25 Multiplied by 2 25 ⎯ 50 Multiplied by 4 50 ⎯ 80 Multiplied by 1 25 ⎯ 50 Load capacitance 15 pF 0.4 to 2.4 V 0.4 ⎯ 4.0 Load capacitance 15pF 0.4 to 2.4 V 0.3 ⎯ 2.0 1.5 V reference level 40 ⎯ 60 ⎯ tDCI + 10*1 FREQ = 0 FREQ = 1 REFOUT Output frequency FREQ = 0 FREQ = 1 fOUT CKOUT FREQ = 0 FREQ = 1 SRC CKOUT Output slew rate SRR REFOUT Value Unit MHz MHz MHz V/ns Output clock Duty Cycle tDCC tDCR REFOUT 1.5 V reference level tDCI − 10* Modulation frequency fMOD CKOUT Input frequency at 24 MHz ⎯ 32.4 ⎯ kHz tLK CKOUT ⎯ ⎯ 2 5 ms ⎯ ⎯ 150 ⎯ ⎯ 100 2 Lock-Up time* CKOUT Input frequency 12.5 MHz to 20 MHz Cycle-cycle jitter tJC CKOUT Multiplied by 1 No load capacitance Standard deviation σ Input frequency 20 MHz to 50 MHz 1 % ps Multiplied by 2 Input frequency No load capacitance 12.5 MHz to Standard deviation σ 25 MHz ⎯ ⎯ 200 Multiplied by 4 Input frequency No load capacitance 12.5 MHz to Standard deviation σ 20 MHz ⎯ ⎯ 200 *1 : Because the duty of REFOUT pin output depends on tDCI of the input clock duty, it is assured only when either A or B condition is used as follow: A : Resonator input : When the resonator is connected to the XIN pin and XOUT pin and oscillates normally. B : External clock input : The input level is full swing (VSS − VDD) . *2 : After power on and release of power down or changing the pin setting (SEL, ENS, FREQ, MLTP1 and MLTP0, and SPRD) , the stabilization wait time of the modulation clock is required. The stabilization wait time of the modulation clock takes the maximum value of Lock-Up time. 15 MB88156 ■ OUTPUT CLOCK Duty Cycle (tDCC, tDCR = tb/ta) ta tb 1.5 V CKOUT REFOUT ■ INPUT FREQUENCY (fin = 1/tin) tin 0.8 VDD XIN ■ OUTPUT SLEW RATE (SRC, SRR) 2.4 V CKOUT REFOUT 0.4 V tr tf Note : SRC = (2.4−0.4) /tr, SRC = (2.4−0.4) /tf SRR = (2.4−0.4) /tr, SRR = (2.4−0.4) /tf ■ CYCLE-CYCLE JITTER (tJC = |tn-tn+1|) CKOUT tn tn+1 Note : Cycle-cycle jitter indicates the difference between a certain cycle and the immediately succeeding (or preceding) cycle. 16 MB88156 ■ MODULATION WAVEFORM • Modulation rate ±1.0%, example of center spread CKOUT output frequency + 1.0 % Frequency at modulation off Time − 1.0 % fMOD (Typ) = 32.4 kHz (fin = 24 MHz) • Modulation rate −1.0%, example of down spread CKOUT output frequency Frequency at modulation off Time − 0.5 % − 1.0 % fMOD (Typ) = 32.4 kHz (fin = 24 MHz) 17 MB88156 ■ LOCK-UP TIME VDD 3.0 V External clock stabilization wait time XIN XPD VIH VIH SPRD, MLTP0, MLTP1, FREQ, ENS, SEL tLK (Lock-up time) CKOUT If the XPD pin is fixed at the “H” level, the maximum time after the power is turned on until the set clock signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “tLK”). For the input clock stabilization time, check the characteristics of the resonator or oscillator used. VDD 3.0 V External clock stabilization wait time XIN VIH XPD SPRD, MLTP0, MLTP1, FREQ, ENS, SEL VIH tLK (Lock-up time) CKOUT If the XPD pin is used for power-down control, the set clock signal is output from the CKOUT pin at most the lockup time “tLK” after the XPD pin goes “H” level. (Continued) 18 MB88156 (Continued) XIN VIH XPD ENS VIH VIL tLK (Lock-Up time) tLK (Lock-Up time) CKOUT If the ENS pin is used for modulation enable control during normal operation, the set clock signal is output from the CKOUT pin at most the lock-up time “tLK” after the level at the ENS pin is determined. Note : The wait time for the clock signal output from the CKOUT pin to become stable is required after the IC is released from power-down mode by the XPD pin or after another pin’s setting is changed. During the period until the output clock signal becomes stable, neither of the output frequency, output clock duty cycle, modulation period, and cycle-cycle jitter characteristic cannot be guaranteed. It is therefore advisable to take action, such as cancelling a device reset at the stage after the lock-up time has passed. 19 MB88156 ■ OSCILLATION CIRCUIT The following schematic on the left-hand side shows a sample connection of a general resonator. The oscillation circuit contains a feedback resistor (1 MΩ) . The values of capacitors (C1 and C2) must be adjusted to the optimum constant of the resonator used. The following schematic on the right-hand side shows a sample connection of a 3rd overtone resonator. The values of capacitors (C1, C2, and C3) and inductor (L1) must be adjusted to the optimum constant of the resonator used. The most suitable value is different by individual resonator. Please refer to the resonator manufacturer which you use for the most suitable value. To use an external clock signal (without using the resonator) , input the clock signal to the XIN pin with the XOUT pin connected to nothing . • When using the resonator LSI internal Rf (1 MΩ) Rf (1 MΩ) XIN pin XOUT pin XIN pin XOUT pin LSI external L1 C2 C1 C2 C1 C3 Fundamental resonator 3rd overtone resonator • When using the external clock LSI internal Rf (1 MΩ) XOUT pin XIN pin LSI external External clock OPEN Note : 20 Note that the jitter characteristic of the input clock signal may affect the cycle-cycle jitter characteristic. MB88156 ■ INTERCONNECTION CIRCUIT EXAMPLE XOUT ENS XIN XPD C1 SEL 13 12 11 10 C2 9 FREQ 14 8 MB88156 15 7 16 6 1 2 3 4 MLTP0 MLTP1 VDD 5 CKOUT REFOUT R1 SPRD R2 VSS C4 C3 For the MB88156-001, be sure to open because it becomes N.C. pin. C1, C2 : Oscillation stabilization capacitance (see ■ OSCILLATION CIRCUIT) C3 : Capacitor of 10 µF or higher C4 : Capacitor of about 0.01 µF (connect a capacitor of good high frequency property (ex. laminated ceramic capacitor) to close to this device) R1, R2 : Impedance matching resistor for board pattern 21 MB88156 ■ SPECTRUM EXAMPLE CHARACTERISTICS The condition of the examples of the characteristic is shown as follows : Input frequency = 16 MHz (Output frequency = 64 MHz : Using MB88156-001 (Multiplied by 4) ) Power-supply voltage = 3.3 V, None load capacity. Modulation rate = ± 1.0% (center spread). Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with RBW = 1 kHz (ATT use for −6 dB) . CH B Spectrum 10 dB /REF 0 dBm No modulation −7.33 dBm Avg 4 ±1.0% modulation −26.26 dBm RBW# 1 kHZ VBW 1 kHZ CENTER 64 MHZ 22 ATT 6 dB SWP 8.005 s SPAN 12.8 MHZ MB88156 ■ ORDERING INFORMATION Part number MB88156PV-G-000-EFE1 MB88156PV-G-000-ERE1 MB88156PV-G-001-EFE1 MB88156PV-G-001-ERE1 REFOUT pin Package EF type Provided 16-pin plastic BCC (LCC-16P-M09) None Emboss taping ER type EF type ER type 23 MB88156 ■ PACKAGE DIMENSION 16-pin plastic BCC (LCC-16P-M09) 13 2.85(.112)TYP 0.80(.031)MAX Mount height 3.50±0.10 (.138±.004) 0.50±0.10 (.020±.004) 9 0.50(.020) TYP 9 13 0.50(.020) TYP INDEX AREA 0.50±0.10 (.020±.004) 2.85(0.112) TYP 3.50±0.10 (.138±.004) 0.55±0.07 (.022±.003) "A" 1.50(.059) REF INDEX "B" 1 5 0.075±0.025 (.003±.001) (Stand off) 5 1.50(.059) REF 1 0.55±0.07 (.022±.003) Details of "A" part 0.14(.006) MIN Details of "B" part 0.45±0.06 (.018±.002) 0.30±0.06 (.012±.002) 0.05(.002) 0.30±0.06 (.012±.002) C 0.30±0.06 (.012±.002) 2004 FUJITSU LIMITED C16067S-c-1-1 Dimensions in mm (inches) Note : The values in parentheses are reference values. 24 MB88156 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F0503 © 2005 FUJITSU LIMITED Printed in Japan