LTC3630 High Efficiency, 65V 500mA Synchronous Step-Down Converter FEATURES DESCRIPTION n The LTC®3630 is a high efficiency step-down DC/DC converter with internal high side and synchronous power switches that draws only 12μA typical DC supply current while maintaining a regulated output voltage at no load. n n n n n n n n n n n n n Wide Operating Input Voltage Range: 4V to 65V Synchronous Operation for Highest Efficiency Internal High Side and Low Side Power MOSFETs No Compensation Required Adjustable 50mA to 500mA Maximum Output Current Low Dropout Operation: 100% Duty Cycle Low Quiescent Current: 12μA Wide Output Range: 0.8V to VIN 0.8V ±1% Feedback Voltage Reference Precise RUN Pin Threshold Internal and External Soft-Start Programmable 1.8V, 3.3V, 5V or Adjustable Output Few External Components Required Low Profile (0.75mm) 3mm × 5mm DFN and Thermally-Enhanced MSE16 Packages APPLICATIONS n n n n n n n Industrial Control Supplies Medical Devices Distributed Power Systems Portable Instruments Battery-Operated Devices Automotive Avionics The LTC3630 can supply up to 500mA load current and features a programmable peak current limit that provides a simple method for optimizing efficiency and for reducing output ripple and component size. The LTC3630’s combination of Burst Mode® operation, integrated power switches, low quiescent current, and programmable peak current limit provides high efficiency over a broad range of load currents. With its wide input range of 4V to 65V, the LTC3630 is a robust converter suited for regulating a wide variety of power sources. Additionally, the LTC3630 includes a precise run threshold and soft-start feature to guarantee that the power system start-up is well-controlled in any environment. A feedback comparator output enables multiple LTC3630s to be paralleled in higher current applications. The LTC3630 is available in the thermally-enhanced 3mm × 5mm DFN and the MSE16 packages. L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Efficiency vs Load Current 100 4V to 65V Input to 3.3V Output, 500mA Step-Down Converter 47μH VIN 2.2μF SW LTC3630 RUN VFB SS VPRG1 VPRG2 FBO ISET GND VOUT 3.3V 100μF 500mA w2 VIN = 12V 80 EFFICIENCY (%) VIN 4V TO 65V VOUT = 3.3V 90 70 VIN = 65V 60 50 3630 TA01a 40 30 0.1 ISET = 220kΩ||220pF ISET = OPEN 1 10 100 LOAD CURRENT (mA) 1000 3630 TA01b 3630fb 1 LTC3630 ABSOLUTE MAXIMUM RATINGS (Note 1) VIN Supply Voltage ..................................... –0.3V to 70V SW Voltage (DC) ........................... –0.3V to (VIN + 0.3V) RUN Voltage................................................. –0.3V to 6V SS, FBO, ISET Voltages ................................. –0.3V to 6V VFB, VPRG1, VPRG2 Voltages ......................... –0.3V to 6V Operating Junction Temperature Range (Notes 2, 3, 4) LTC3630E, LTC3630I ......................... –40°C to 125°C LTC3630H .......................................... –40°C to 150°C LTC3630MP ....................................... –55°C to 150°C Storage Temperature Range .................. –65°C to 150°C Lead Temperature (Soldering, 10 sec) MSOP ............................................................... 300°C PIN CONFIGURATION TOP VIEW TOP VIEW SW 1 16 GND VIN 3 14 GND RUN 5 VPRG2 6 VPRG1 7 GND 8 17 GND 12 11 10 9 FBO ISET SS VFB MSE PACKAGE VARIATION: MSE16 (12) 16-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 45°C/W, θJC = 10°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB SW 1 16 GND NC 2 15 NC VIN 3 NC 4 RUN 5 VPRG2 6 11 ISET VPRG1 7 10 SS GND 8 9 14 GND 17 GND 13 NC 12 FBO VFB DHC PACKAGE 16-LEAD (5mm w 3mm) PLASTIC DFN (NOTE 6) TJMAX = 150°C, θJA = 43°C/W, θJC = 5°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3630EMSE#PBF LTC3630EMSE#TRPBF 3630 16-Lead Plastic MSOP –40°C to 125°C LTC3630IMSE#PBF LTC3630IMSE#TRPBF 3630 16-Lead Plastic MSOP –40°C to 125°C LTC3630HMSE#PBF LTC3630HMSE#TRPBF 3630 16-Lead Plastic MSOP –40°C to 150°C LTC3630MPMSE#PBF LTC3630MPMSE#TRPBF 3630 16-Lead Plastic MSOP –55°C to 150°C LTC3630EDHC#PBF LTC3630EDHC#TRPBF 3630 16-Lead (5mm × 3mm) Plastic DFN –40°C to 125°C LTC3630IDHC#PBF LTC3630IDHC#TRPBF 3630 16-Lead (5mm × 3mm) Plastic DFN –40°C to 125°C LTC3630HDHC#PBF LTC3630HDHC#TRPBF 3630 16-Lead (5mm × 3mm) Plastic DFN –40°C to 150°C LTC3630MPDHC#PBF LTC3630MPDHC#TRPBF 3630 16-Lead (5mm × 3mm) Plastic DFN –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3630fb 2 LTC3630 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input Supply (VIN) VIN Input Voltage Operating Range 4 65 V VOUT Output Voltage Operating Range 0.8 VIN V UVLO VIN Undervoltage Lockout 3.65 3.5 150 3.85 3.70 V V mV IQ DC Supply Current (Note 5) Active Mode Sleep Mode Shutdown Mode 165 12 5 270 20 10 μA μA μA 1.17 1.06 1.21 1.10 110 1.25 1.14 V V mV V V VRUN RUN Pin Threshold Voltage l l VIN Rising VIN Falling Hysteresis 3.45 3.30 No Load VRUN = 0V RUN Rising RUN Falling Hysteresis Output Supply (VFB) VFB(ADJ) Feedback Comparator Threshold Voltage (Adjustable Output) VFB Rising, VPRG1 = VPRG2 = 0V LTC3630E, LTC3630I LTC3630H, LTC3630MP l l 0.792 0.788 0.800 0.800 0.808 0.812 VFBH Feedback Comparator Hysteresis (Adjustable Output) VFB Falling, VPRG1 = VPRG2 = 0V l 2.5 5 7 mV IFB Feedback Pin Current VFB = 1V, VPRG1 = 0V, VPRG2 = 0V –10 0 10 nA VFB(FIXED) Feedback Comparator Threshold Voltages (Fixed Output) VFB Rising, VPRG1 = SS, VPRG2 = 0V VFB Falling, VPRG1 = SS, VPRG2 = 0V l l 4.940 4.910 5.015 4.985 5.090 5.060 V V VFB Rising, VPRG1 = 0V, VPRG2 = SS VFB Falling, VPRG1 = 0V, VPRG2 = SS l l 3.260 3.240 3.310 3.290 3.360 3.340 V V VFB Rising, VPRG1 = VPRG2 = SS VFB Falling, VPRG1 = VPRG2 = SS l l 1.780 1.770 1.810 1.8 1.840 1.83 V V Feedback Voltage Line Regulation VIN = 4V to 65V IPEAK Peak Current Comparator Threshold ISET Floating 100k Resistor from ISET to GND ISET Shorted to GND RON Power Switch On-Resistance Top Switch Bottom Switch ISW = –200mA ISW = 200mA ΔVLINEREG 0.001 %/V Operation 1 0.45 0.09 1.2 0.6 0.12 1.4 0.75 0.15 1.00 0.53 ILSW Switch Pin Leakage Current RUN = Open, VIN = 65V, SW = 0V ISS Soft-Start Pin Pull-Up Current VSS < 2.5V tINT(SS) Internal Soft-Start Time SS Pin Floating Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3630 is tested under pulsed load conditions such that TJ ≈ TA. The LTC3630E is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3630I is guaranteed over the –40°C to 125°C operating junction temperature range, the LTC3630H is guaranteed over the –40°C to 150°C operating junction temperature range and the LTC3630MP is tested and guaranteed over the –55°C to 150°C operating junction temperature range. l l l 3 A A A Ω Ω 0.1 1 μA 5 6 μA 0.8 ms High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. Note 3: The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD • θJA) where θJA is 43°C/W for the DFN or 45°C/W for the MSOP. 3630fb 3 LTC3630 ELECTRICAL CHARACTERISTICS junction temperature may impair device reliability or permanently damage the device. The overtemperature protection level is not production tested. Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Applications Information. Note 6: For application concerned with pin creepage and clearance distances at high voltages, the MSOP package should be used. See Applications Information. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. Note 4: This IC includes over temperature protection that is intended to protect the device during momentary overload conditions. The maximum rated junction temperature will be exceeded when this protection is active. Continuous operation above the specified absolute maximum operating TYPICAL PERFORMANCE CHARACTERISTICS Load Step Transient Response Soft-Start Waveform OUTPUT VOLTAGE 2V/DIV INDUCTOR CURRENT 500mA/DIV OUTPUT VOLTAGE 50mV/DIV OUTPUT VOLTAGE 2V/DIV LOAD CURRENT 200mA/DIV INDUCTOR CURRENT 500mA/DIV 3630 G01 Efficiency and Power Loss vs Load Current, VOUT = 5V 100 90 90 EFFICIENCY 10 VOUT = 5V FIGURE 13 CIRCUIT VIN = 12V 1 VIN = 65V 30 20 10 1 10 100 LOAD CURRENT (mA) 1000 3630 G04 EFFICIENCY (%) EFFICIENCY (%) 100 POWER 80 EFFICIENCY 70 1000 60 50 100 POWER 40 10 VOUT = 3.3V FIGURE 13 CIRCUIT VIN = 12V 1 VIN = 65V 30 20 10 0 0.1 1 10 100 LOAD CURRENT (mA) 1000 3630 G05 EFFICIENCY 70 1000 60 50 100 POWER 40 POWER LOSS (mW) 50 40 VOUT = 1.8V 90 FIGURE 13 CIRCUIT POWER LOSS (mW) 60 0 0.1 POWER LOSS (mW) 1000 Efficiency and Power Loss vs Load Current, VOUT = 1.8V 100 80 70 3630 G03 VIN = 12V 200μs/DIV VOUT = 5V FIGURE 13 CIRCUIT Efficiency and Power Loss vs Load Current, VOUT = 3.3V 100 80 3630 G02 VIN = 12V 500μs/DIV VOUT = 5V FIGURE 13 CIRCUIT EFFICIENCY (%) COUT = 100μF 1ms/DIV FIGURE 13 CIRCUIT Short-Circuit Response 10 30 20 VIN = 12V 1 VIN = 65V 10 0 0.1 1 10 100 LOAD CURRENT (mA) 1000 3630 G06 3630fb 4 LTC3630 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Input Voltage 95 Line Regulation vs Input Voltage 0.05 VOUT = 5V FIGURE 13 CIRCUIT 90 Load Regulation vs Load Current 5.04 FIGURE 13 CIRCUIT ILOAD = 500mA 0.04 VIN = 12V VOUT = 5V FIGURE 13 CIRCUIT 5.03 0.03 80 75 70 0.02 0.01 0 –0.01 –0.02 ILOAD = 500mA ILOAD = 100mA ILOAD = 10mA ILOAD = 1mA 60 55 20 10 50 40 INPUT VOLTAGE (V) 4.97 15 5 60 35 45 25 INPUT VOLTAGE (V) 125 5.5 5.3 5.2 5.1 5.0 4.9 4.8 4.7 4.6 4.5 –55 –25 65 35 5 95 TEMPERATURE (°C) 125 Peak Current Trip Threshold vs RISET PEAK CURRENT TRIP THRESHOLD (mA) PEAK CURRENT TRIP THRESHOLD (mA) 800 600 400 200 50 100 150 200 250 RISET (kΩ) 3630 G13 RISET = 100kΩ 600 400 ISET = GND 200 –25 65 95 5 35 TEMPERATURE (°C) 125 155 3630 G12 Quiescent VIN Supply Current vs Input Voltage 16 ISET = OPEN SLEEP 14 1200 1000 800 ISET = 100k 600 400 ISET = 0V 200 0 10 40 30 50 20 INPUT VOLTAGE (V) 12 10 8 SHUTDOWN 6 4 2 0 0 0 800 0 –55 155 1400 1000 ISET OPEN 1000 Peak Current Trip Threshold vs Input Voltage 1200 VIN = 12V 1200 3630 G11 3630 G10 500 Peak Current Trip Threshold vs Temperature and ISET 1400 VIN = 12V 5.4 155 VIN = 12V 200 400 300 LOAD CURRENT (mA) 3630 G09 PEAK CURRENT TRIP THRESHOLD (mA) 0.798 100 0 3630 G08 FEEDBACK COMPARATOR HYSTERESIS (mV) FEEDBACK COMPARATOR TRIP VOLTAGE (V) 0.800 95 5 35 65 TEMPERATURE (°C) 4.96 65 55 Feedback Comparator Hysteresis vs Temperature 0.802 1400 4.98 –0.05 30 VIN = 12V –25 4.99 –0.04 Feedback Comparator Trip Voltage vs Temperature 0.796 –55 5.00 –0.03 3630 G07 0.804 5.01 VIN SUPPLY CURRENT (μA) 65 5.02 OUTPUT VOLTAGE (V) ΔVOUT/VOUT (%) EFFICIENCY (%) 85 60 0 5 15 25 35 45 55 65 VIN VOLTAGE (V) 3630 G14 3630 G15 3630fb 5 LTC3630 TYPICAL PERFORMANCE CHARACTERISTICS Quiescent VIN Supply Current vs Temperature Switch On-Resistance vs Temperature 2.0 VIN = 12V 1.6 1.8 SLEEP 12 8 SHUTDOWN 4 1.6 1.4 1.2 TOP 1.0 0.8 BOTTOM 0.6 0.4 –25 65 5 95 35 TEMPERATURE (°C) 125 0 155 0 10 40 30 20 50 INPUT VOLTAGE (V) 3630 G16 BOTTOM 0.6 0.4 0 –55 60 –25 95 65 35 TEMPERATURE (°C) 5 125 155 3630 G18 Operating Waveforms 1.30 VIN = 65V 10 8 6 4 SW = 65V 2 0 –2 SW = 0V –4 –6 –55 –25 0.8 RUN Comparator Threshold Voltage vs Temperature RUN COMPARATOR THRESHOLD (V) SWITCH LEAKAGE CURRENT (μA) 12 TOP 1.0 3630 G17 Switch Leakage Current vs Temperature 14 1.2 0.2 0.2 0 –55 VIN = 12V 1.4 SWITCH ON-RESISTANCE (Ω) 16 SWITCH ON-RESISTANCE (Ω) VIN SUPPLY CURRENT (μA) 20 Switch On-Resistance vs Input Voltage 95 65 35 TEMPERATURE (°C) 5 125 155 3630 G19 SWITCH VOLTAGE 25V/DIV 1.25 3*4*/( 1.20 OUTPUT VOLTAGE 50mV/DIV INDUCTOR CURRENT 500mA/DIV 1.15 '"--*/( 1.10 1.05 1.00 –55 –25 35 95 5 TEMPERATURE (°C) 125 155 VIN = 65V 10μs/DIV VOUT = 5V ILOAD = 350mA FIGURE 13 CIRCUIT 3630 G21 -5t( 3630fb 6 LTC3630 PIN FUNCTIONS SW (Pin 1): Switch Node Connection to Inductor. This pin connects to the drains of the internal power MOSFET switches. NC (Pins 2, 4, 13, 15 DHC Package Only): No Internal Connection. Leave these pins open. VIN (Pin 3): Main Input Supply Pin. A ceramic bypass capacitor should be tied between this pin and GND. RUN (Pin 5): Run Control Input. A voltage on this pin above 1.21V enables normal operation. Forcing this pin below 0.7V shuts down the LTC3630, reducing quiescent current to approximately 5μA. Optionally, connect to the input supply through a resistor divider to set the undervoltage lockout. An internal 2M resistor and 2μA current source pulls this pin up to an internal 5V reference. See Applications Information. VPRG2, VPRG1 (Pins 6, 7): Output Voltage Selection. Short both pins to ground for an external resistive divider programmable output voltage. Short VPRG1 to SS and short VPRG2 to ground for a 5V output voltage. Short VPRG1 to ground and short VPRG2 to SS for a 3.3V output voltage. Short both pins to SS for a 1.8V output voltage. GND (Pins 8, 14, 16, Exposed Pad Pin 17): Ground. The exposed backside pad must be soldered to the PCB ground plane for optimal thermal performance. SS (Pin 10): Soft-Start Control Input. A capacitor to ground at this pin sets the output voltage ramp time. A 50μA current initially charges the soft-start capacitor until switching begins, at which time the current is reduced to its nominal value of 5μA. The output voltage ramp time from zero to its regulated value is 1ms for every 16.5nF of capacitance from SS to GND. If left floating, the ramp time defaults to an internal 0.8ms soft-start. ISET (Pin 11): Peak Current Set Input and Voltage Output Ripple Filter. A resistor from this pin to ground sets the peak current comparator threshold. Leave floating for the maximum peak current (1.2A typical) or short to ground for minimum peak current (0.12A typical). The maximum output current is one-half the peak current. The 5μA current that is sourced out of this pin when switching, is reduced to 1μA in sleep. Optionally, a capacitor can be placed from this pin to GND to trade off efficiency for light load output voltage ripple. See Applications Information. FBO (Pin 12): Feedback Comparator Output. Connect to the VFB pins of additional LTC3630s to combine the output current. The typical pull-up current is 20μA. The typical pull- down impedance is 70Ω. See Applications Information. VFB (Pin 9): Output Voltage Feedback. When configured for an adjustable output voltage, connect to an external resistive divider to divide the output voltage down for comparison to the 0.8V reference. For the fixed output configuration, directly connect this pin to the output supply. 3630fb 7 LTC3630 BLOCK DIAGRAM 1.3V 11 ACTIVE: 5μA SLEEP: 1μA ISET VIN 3 CIN PEAK CURRENT COMPARATOR + 5V – SLEEP, ACTIVE: 2μA SHUTDOWN: 0μA 2M 5 VIN + RUN + 1.21V LOGIC AND SHOOTTHROUGH PREVENTION – SW L1 VOUT 1 COUT GND 16 + – 5V REVERSE CURRENT COMPARATOR 20μA FEEDBACK COMPARATOR 12 FBO VOLTAGE REFERENCE + + – 70Ω 5V START-UP: 50μA NORMAL: 5μA 0.800V R1 14 8 17 R2 GND GND VPRG2 VPRG1 GND GND SS SS GND SS GND SS VOUT ADJUSTABLE 5V FIXED 3.3V FIXED 1.8V FIXED R1 VFB VPRG1 VPRG2 R2 1.0M ∞ 4.2M 800k 2.5M 800k 1.0M 800k SS 10 9 7 6 IMPLEMENT DIVIDER EXTERNALLY FOR ADJUSTABLE VERSION 3630 BD 3630fb 8 LTC3630 OPERATION (Refer to Block Diagram) The LTC3630 is a synchronous step-down DC/DC converter with internal power switches that uses Burst Mode control. The low quiescent current and high switching frequency results in high efficiency across a wide range of load currents. Burst Mode operation functions by using short “burst” cycles to switch the inductor current through the internal power MOSFETs, followed by a sleep cycle where the power switches are off and the load current is supplied by the output capacitor. During the sleep cycle, the LTC3630 draws only 12μA of supply current. At light loads, the burst cycles are a small percentage of the total cycle time which minimizes the average supply current, greatly improving efficiency. Figure 1 shows an example of Burst Mode operation. The switching frequency and the number of switching cycles during Burst Mode operation are dependent on the inductor value, peak current, load current, input voltage and output voltage. SLEEP CYCLE BURST CYCLE SWITCHING FREQUENCY INDUCTOR CURRENT BURST FREQUENCY OUTPUT VOLTAGE ΔVOUT 3630 F01 Figure 1. Burst Mode Operation Main Control Loop The LTC3630 uses the VPRG1 and VPRG2 control pins to connect internal feedback resistors to the VFB pin. This enables fixed outputs of 1.8V, 3.3V or 5V without increasing component count, input supply current or exposure to noise on the sensitive input to the feedback comparator. External feedback resistors (adjustable mode) can still be used by connecting both VPRG1 and VPRG2 to ground. In adjustable mode the feedback comparator monitors the voltage on the VFB pin and compares it to an internal 800mV reference. If this voltage is greater than the reference, the comparator activates a sleep mode in which the power switches and current comparators are disabled, reducing the VIN pin supply current to only 12μA. As the load current discharges the output capacitor, the voltage on the VFB pin decreases. When this voltage falls 5mV below the 800mV reference, the feedback comparator trips and enables burst cycles. At the beginning of the burst cycle, the internal high side power switch (P-channel MOSFET) is turned on and the inductor current begins to ramp up. The inductor current increases until either the current exceeds the peak current comparator threshold or the voltage on the VFB pin exceeds 800mV, at which time the high side power switch is turned off and the low side power switch (N-channel MOSFET) turns on. The inductor current ramps down until the reverse current comparator trips, signaling that the current is close to zero. If the voltage on the VFB pin is still less than the 800mV reference, the high side power switch is turned on again and another cycle commences. The average current during a burst cycle will normally be greater than the average load current. For this architecture, the maximum average output current is equal to half of the peak current. The hysteretic nature of this control architecture results in a switching frequency that is a function of the input voltage, output voltage, and inductor value. This behavior provides inherent short-circuit protection. If the output is shorted to ground, the inductor current will decay very slowly during a single switching cycle. Since the high side switch turns on only when the inductor current is near zero, the LTC3630 inherently switches at a lower frequency during start-up or short-circuit conditions. Start-Up and Shutdown If the voltage on the RUN pin is less than 0.7V, the LTC3630 enters a shutdown mode in which all internal circuitry is disabled, reducing the DC supply current to 5μA. When the voltage on the RUN pin exceeds 1.21V, normal operation of the main control loop is enabled. The RUN pin comparator has 110mV of internal hysteresis, and therefore must fall below 1.1V to stop switching and disable the main control loop. 3630fb 9 LTC3630 OPERATION (Refer to Block Diagram) An internal 0.8ms soft-start function limits the ramp rate of the output voltage on start-up to prevent excessive input supply droop. If a longer ramp time and consequently less supply droop is desired, a capacitor can be placed from the SS pin to ground. The 5μA current that is sourced out of this pin will create a smooth voltage ramp on the capacitor. If this ramp rate is slower than the internal 0.8ms soft-start, then the output voltage will be limited by the ramp rate on the SS pin instead. The internal and external soft-start functions are reset on start-up and after an undervoltage event on the input supply. Dropout Operation The peak inductor current is not limited by the internal or external soft-start functions; however, placing a capacitor from the ISET pin to ground does provide this capability. When the input supply decreases toward the output supply, the duty cycle increases to maintain regulation. The P-channel MOSFET top switch in the LTC3630 allows the duty cycle to increase all the way to 100%. At 100% duty cycle, the P-channel MOSFET stays on continuously, providing output current equal to the peak current, which can be greater than 1A. The power dissipation of the LTC3630 can increase dramatically during dropout operation especially at input voltages less than 10V. The increased power dissipation is due to higher potential output current and increased P-channel MOSFET on-resistance. See the Thermal Considerations section of the Applications Information for a detailed example. Peak Inductor Current Programming Input Voltage and Overtemperature Protection The peak current comparator nominally limits the peak inductor current to 1.2A. This peak inductor current can be adjusted by placing a resistor from the ISET pin to ground. The 5μA current sourced out of this pin through the resistor generates a voltage that adjusts the peak current comparator threshold. When using the LTC3630, care must be taken not to exceed any of the ratings specified in the Absolute Maximum Ratings section. As an added safeguard, however, the LTC3630 incorporates an overtemperature shutdown feature. If the junction temperature reaches approximately 180°C, the LTC3630 will enter thermal shutdown mode. Both power switches will be turned off and the SW node will become high impedance. After the part has cooled below 160°C, it will restart. The overtemperature level is not production tested. During sleep mode, the current sourced out of the ISET pin is reduced to 1μA. The ISET current is increased back to 5μA on the first switching cycle after exiting sleep mode. The ISET current reduction in sleep mode, along with adding a filtering capacitor, CISET, from the ISET pin to ground, provides a method of reducing light load output voltage ripple at the expense of lower efficiency and slightly degraded load step transient response. For applications requiring higher output current, the LTC3630 provides a feedback comparator output pin (FBO) for combining the output current of multiple LTC3630s. By connecting the FBO pin of a “master” LTC3630 to the VFB pin of one or more “slave” LTC3630s, the output currents can be combined to source much more than 500mA. The LTC3630 can provide a programmable undervoltage lockout which can also serve as a precise input voltage monitor by using a resistive divider from VIN to GND with the tap connected to the RUN pin. Switching is enabled when the RUN pin voltage exceeds 1.21V and is disabled when dropping below 1.1V. Pulling the RUN pin below 700mV forces a low quiescent current shutdown (5μA). Furthermore, if the input voltage falls below 3.5V typical (3.7V maximum), an internal undervoltage detector disables switching. When switching is disabled, the LTC3630 can safely sustain input voltages up to the absolute maximum rating of 70V. Input supply undervoltage events trigger a soft-start reset, which results in a graceful recovery from an input supply transient. 3630fb 10 LTC3630 APPLICATIONS INFORMATION The basic LTC3630 application circuit is shown on the front page of the data sheet. External component selection is determined by the maximum load current requirement and begins with the selection of the peak current programming resistor, RISET. The inductor value L can then be determined, followed by capacitors CIN and COUT. Peak Current Resistor Selection The peak current comparator has a guaranteed maximum current limit of 1A (1.2A typical), which guarantees a maximum average current of 500mA. For applications that demand less current, the peak current threshold can be reduced to as little as 100mA (120mA typical). This lower peak current allows the use of lower value, smaller components (input capacitor, output capacitor, and inductor), resulting in lower input supply ripple and a smaller overall DC/DC converter. The threshold can be easily programmed using a resistor (RISET) between the ISET pin and ground. The voltage generated on the ISET pin by RISET and the internal 5μA current source sets the peak current. The voltage on the ISET pin is internally limited within the range of 0.1V to 1.0V. The value of resistor for a particular peak current can be selected by using Figure 2 or the following equation: RISET = IPEAK • 0.2 • 106 where 100mA < IPEAK < 1A. The internal 5μA current source is reduced to 1μA in sleep mode to maximize efficiency and to facilitate a trade-off The typical peak current is internally limited to be within the range of 120mA to 1.2A. Shorting the ISET pin to ground programs the current limit to 120mA, and leaving it float sets the current limit to the maximum value of 1.2A. When selecting this resistor value, be aware that the maximum average output current for this architecture is limited to half of the peak current. Therefore, be sure to select a value that sets the peak current with enough margin to provide adequate load current under all conditions. Selecting the peak current to be 2.2 times greater than the maximum load current is a good starting point for most applications. Inductor Selection The inductor, input voltage, output voltage, and peak current determine the switching frequency during a burst cycle of the LTC3630. For a given input voltage, output voltage, and peak current, the inductor value sets the switching frequency during a burst cycle when the output is in regulation. Generally, switching between 50kHz and 250kHz yields high efficiency, and 200kHz is a good first choice for many applications. The inductor value can be determined by the following equation: ⎛ V ⎞ ⎛ V ⎞ L = ⎜ OUT ⎟ • ⎜1– OUT ⎟ VIN ⎠ ⎝ f •IPEAK ⎠ ⎝ The variation in switching frequency during a burst cycle with input voltage and inductance is shown in Figure 3. For lower values of IPEAK, multiply the frequency in Figure 3 by 1.2A/IPEAK. 220 200 180 160 RISET (kΩ) between efficiency and light load output voltage ripple, as described in the CISET Selection section of the Applications Information. For maximum efficiency, minimize the capacitance on the ISET pin and place the RISET resistor as close to the pin as possible. 140 120 An additional constraint on the inductor value is the LTC3630’s 150ns minimum on-time of the high side switch. Therefore, in order to keep the current in the inductor 100 80 60 40 20 0 50 100 150 200 250 300 350 400 450 500 MAXIMUM LOAD CURRENT (mA) 3630 F02 Figure 2. RISET Selection 3630fb 11 LTC3630 APPLICATIONS INFORMATION 600 VOUT = 3.3V ISET OPEN 1000 500 INDUCTOR VALUE (μH) SWITCHING FREQUENCY (kHz) L = 4.2μH 400 300 L = 10μH 200 L = 22μH 100 0 L = 47μH 0 10 20 30 100 L = 100μH 40 50 60 VIN INPUT VOLTAGE (V) 10 100 1000 PEAK INDUCTOR CURRENT (mA) 3630 F04 3630 F03 Figure 3. Switching Frequency for VOUT = 3.3V Figure 4. Recommended Inductor Values for Maximum Efficiency well-controlled, the inductor value must be chosen so that it is larger than a minimum value which can be computed as follows: in Figure 4. The values in this range are a good compromise between the trade-offs discussed above. For applications where board area is not a limiting factor, inductors with larger cores can be used, which extends the recommended range of Figure 4 to larger values. L> VIN(MAX) • tON(MIN) • 1.2 IPEAK where VIN(MAX) is the maximum input supply voltage when switching is enabled, tON(MIN) is 150ns, IPEAK is the peak current, and the factor of 1.2 accounts for typical inductor tolerance and variation over temperature. Inductor values that violate the above equation will cause the peak current to overshoot and permanent damage to the part may occur. Although the above equation provides the minimum inductor value, higher efficiency is generally achieved with a larger inductor value, which produces a lower switching frequency. The inductor value chosen should also be large enough to keep the inductor current from going very negative which is more of a concern at higher VOUT (>~12V). For a given inductor type, however, as inductance is increased, DC resistance (DCR) also increases. Higher DCR translates into higher copper losses and lower current rating, both of which place an upper limit on the inductance. The recommended range of inductor values for small surface mount inductors as a function of peak current is shown Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of the more expensive ferrite cores. Actual core loss is independent of core size for a fixed inductor value but is very dependent of the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates “hard,” which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequently output voltage ripple. Do not allow the core to saturate! 3630fb 12 LTC3630 APPLICATIONS INFORMATION Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate energy but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price versus size requirements and any radiated field/EMI requirements. New designs for surface mount inductors are available from Coiltronics, Coilcraft, TDK, Toko, and Sumida. CIN and COUT Selection The input capacitor, CIN, is needed to filter the trapezoidal current at the source of the top high side MOSFET. CIN should be sized to provide the energy required to charge the inductor without causing a large decrease in input voltage (ΔVIN). The relationship between CIN and ΔVIN is given by: CIN > L •IPEAK 2 2 • VIN • ΔVIN It is recommended to use a larger value for CIN than calculated by the above equation since capacitance decreases with applied voltage. In general, a 4.7μF X7R ceramic capacitor is a good choice for CIN in most LTC3630 applications. To minimize large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by: V VIN IRMS = IOUT(MAX) • OUT • –1 VIN VOUT This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based only on 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The output capacitor, COUT, filters the inductor’s ripple current and stores energy to satisfy the load current when the LTC3630 is in sleep. The output ripple has a lower limit of VOUT/160 due to the 5mV typical hysteresis of the feedback comparator. The time delay of the comparator adds an additional ripple voltage that is a function of the load current. During this delay time, the LTC3630 continues to switch and supply current to the output. The output ripple can be approximated by: ⎞ 4 • 10 –6 VOUT ⎛I ΔVOUT ≈ ⎜ PEAK – ILOAD ⎟ • + ⎠ COUT ⎝ 2 160 The output ripple is a maximum at no load and approaches lower limit of VOUT/160 at full load. Choose the output capacitor COUT to limit the output voltage ripple ΔVOUT using the following equation: • 2 • 10 –6 I COUT ≥ PEAK V ΔVOUT – OUT 160 The value of the output capacitor must be large enough to accept the energy stored in the inductor without a large change in output voltage during a single switching cycle. Setting this voltage step equal to 1% of the output voltage, the output capacitor must be: ⎛I ⎞ COUT > 50 • L • ⎜ PEAK ⎟ ⎝ VOUT ⎠ 2 Typically, a capacitor that satisfies the voltage ripple requirement is adequate to filter the inductor ripple. To avoid overheating, the output capacitor must also be sized to handle the ripple current generated by the inductor. The worst-case ripple current in the output capacitor is given 3630fb 13 LTC3630 APPLICATIONS INFORMATION by IRMS = IPEAK/2. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic, and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important only to use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and longterm reliability. Ceramic capacitors have excellent low ESR characteristics but can have high voltage coefficient and audible piezoelectric effects. The high quality factor (Q) of ceramic capacitors in series with trace inductance can also lead to significant input voltage ringing. Ceramic Capacitors and Audible Noise Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating, and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. For application with inductive source impedance, such as a long wire, an electrolytic capacitor or a ceramic capacitor with a series resistor may be required in parallel with CIN to dampen the ringing of the input supply. Figure 5 shows this circuit and the typical values required to dampen the ringing. -5$ VIN LIN R" LIN CIN $IN 3630 F05 t$IN Figure 5. Series RC to Reduce VIN Ringing Ceramic capacitors are also piezoelectric sensitive. The LTC3630’s burst frequency depends on the load current, and in some applications at light load the LTC3630 can excite the ceramic capacitor at audio frequencies, generating audible noise. If the noise is unacceptable, use a high performance tantalum or electrolytic capacitor at the output. Output Voltage Programming The LTC3630 has three fixed output voltage modes that can be selected with the VPRG1 and VPRG2 pins and an adjustable mode. The fixed output modes use an internal feedback divider which enables higher efficiency, higher noise immunity, and lower output voltage ripple for 5V, 3.3V and 1.8V applications. To select the fixed 5V output voltage, connect VPRG1 to SS and VPRG2 to GND. For 3.3V, connect VPRG1 to GND and VPRG2 to SS. For 1.8V, connect both VPRG1 and VPRG2 to SS. For any of the fixed output voltage options, directly connect the VFB pin to VOUT. For the adjustable output mode (VPRG1 = 0V, VPRG2 = 0V), the output voltage is set by an external resistive divider according to the following equation: ⎛ R1 ⎞ VOUT = 0.8V • ⎜1+ ⎟ ⎝ R2 ⎠ 3630fb 14 LTC3630 APPLICATIONS INFORMATION The resistive divider allows the VFB pin to sense a fraction of the output voltage as shown in Figure 6. The output voltage can range from 0.8V to VIN. Be careful to keep the divider resistors very close to the VFB pin to minimize the trace length and noise pick-up on the sensitive VFB signal. VOUT LTC3630 R1 VFB 5V 4.2M R2 0.8V 800k SS VPRG1 VPRG2 VOUT R1 VFB LTC3630 VPRG1 VPRG2 0.8V 3630 F07 R2 3630 F06 Figure 6. Setting the Output Voltage with External Resistors To minimize the no-load supply current, resistor values in the megohm range may be used; however, large resistor values should be used with caution. The feedback divider is the only load current when in shutdown. If PCB leakage current to the output node or switch node exceeds the load current, the output voltage will be pulled up. In normal operation, this is generally a minor concern since the load current is much greater than the leakage. To avoid excessively large values of R1 in high output voltage applications (VOUT ≥ 10V), a combination of external and internal resistors can be used to set the output voltage. This has an additional benefit of increasing the noise immunity on the VFB pin. Figure 7 shows the LTC3630 with the VFB pin configured for a 5V fixed output with an external divider to generate a higher output voltage. The internal 5M resistance appears in parallel with R2, and the value of R2 must be adjusted accordingly. R2 should be chosen to be less than 200k to keep the output voltage variation less than 1% due to the tolerance of the LTC3630’s internal resistor. Figure 7. Setting the Output Voltage with External and Internal Resistors RUN Pin and External Input Undervoltage Lockout The RUN pin has two different threshold voltage levels. Pulling the RUN pin below 0.7V puts the LTC3630 into a low quiescent current shutdown mode (IQ ~ 5μA). When the RUN pin is greater than 1.21V, the controller is enabled. Figure 8 shows examples of configurations for driving the RUN pin from logic. SUPPLY LTC3630 RUN LTC3630 RUN 3630 F08 Figure 8. RUN Pin Interface to Logic The RUN pin can alternatively be configured as a precise undervoltage (UVLO) lockout on the VIN supply with a resistive divider from VIN to ground. A simple resistive divider can be used as shown in Figure 9 to meet specific VIN voltage requirements. 5V LTC3630 2M SLEEP, ACTIVE: 2μA SHUTDOWN: 0μA VIN R3 RUN R4 3630 F09 Figure 9. Adjustable UV Lockout 3630fb 15 LTC3630 APPLICATIONS INFORMATION The current that flows through the R3-R4 divider will directly add to the shutdown, sleep, and active current of the LTC3630, and care should be taken to minimize the impact of this current on the overall efficiency of the application circuit. To keep the variation of the rising VIN UVLO threshold to less than 5% due to the internal pullup circuitry, the following equations should be used to calculate R3 and R4: RisingVIN UVLOThreshold R3 ≤ 40μA R4 = R3 • 1.21V RisingVIN UVLOThreshold – 1.21V +R3 • 4μA The falling UVLO threshold will be about 10% lower than the rising VIN UVLO threshold due to the 110mV hysteresis of the RUN comparator. For applications that do not require a precise UVLO, the RUN pin can be left floating. In this configuration, the UVLO threshold is limited to the internal VIN UVLO thresholds as shown in the Electrical Characteristics table. Be aware that the RUN pin cannot be allowed to exceed its absolute maximum rating of 6V. To keep the voltage on the RUN pin from exceeding 6V, the following relation should be satisfied: VIN(MAX) < 4.5 • Rising VIN UVLO Threshold To support a VIN(MAX) greater than 4.5x the external UVLO threshold, an external 4.7V Zener diode should be used in parallel with R4. See Figure 11. Soft-Start Soft-start is implemented by ramping the effective reference voltage from 0V to 0.8V. To increase the duration of soft-start, place a capacitor from the SS pin to ground. An internal 5μA pull-up current will charge this capacitor. The value of the soft-start capacitor can be calculated by the following equation: CSS = Soft-Start Time • The minimum soft-start time is limited to the internal softstart timer of 0.8ms. When the LTC3630 detects a fault condition (input supply undervoltage or overtemperature) or when the RUN pin falls below 1.1V, the SS pin is quickly pulled to ground and the internal soft-start timer is reset. This ensures an orderly restart when using an external soft-start capacitor. Note that the soft-start capacitor may not be the limiting factor in the output voltage ramp. The maximum output current, which is equal to half the peak current, must charge the output capacitor from 0V to its regulated value. For small peak currents or large output capacitors, this ramp time can be significant. Therefore, the output voltage ramp time from 0V to the regulated VOUT value is limited to a minimum of: Ramp Time ≥ 2 • COUT VOUT IPEAK CISET Selection Once the peak current resistor, RISET, and inductor are selected to meet the load current and frequency requirements, an optional capacitor, CISET, can be added in parallel with RISET. This will boost efficiency at mid-loads and reduce the output voltage ripple dependency on load current at the expense of slightly degraded load step transient response. The peak inductor current is controlled by the voltage on the ISET pin. Current out of the ISET pin is 5μA while the LTC3630 is switching and is reduced to 1μA during sleep mode. The ISET current will return to 5μA on the first cycle after sleep mode. Placing a parallel RC from the ISET pin to ground filters the ISET voltage as the LTC3630 enters and exits sleep mode which in turn will affect the output voltage ripple, efficiency and load step transient performance. In general, when RISET is greater than 120k a CISET capacitor in the 100pF to 200pF range will improve most performance parameters. When RISET is less than 100k, the capacitance on the ISET pin should be minimized. 5μA 0.35V 3630fb 16 LTC3630 APPLICATIONS INFORMATION Higher Current Applications Efficiency Considerations For applications that require more than 500mA, the LTC3630 provides a feedback comparator output pin (FBO) for driving additional LTC3630s. When the FBO pin of a “master” LTC3630 is connected to the VFB pin of one or more “slave” LTC3630s, the master controls the burst cycle of the slaves. The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Figure 10 shows an example of a 5V, 1A regulator using two LTC3630s. The master is configured for a 5V fixed output with external soft-start and the VIN UVLO level is set by the RUN pin. Since the slaves are directly controlled by the master, the SS pin of the slave should have minimal capacitance and the RUN pin of the slave should be floating. Furthermore, slaves should be configured for a 1.8V fixed output (VPRG1 = VPRG2 = SS) to set the VFB pin threshold at 1.8V. The inductors L1 and L2 do not necessarily have to be the same, but should both meet the criteria described above in the Inductor Selection section. VOUT 5V COUT 1A L1 VIN CIN R3 R4 SW VIN LTC3630 (MASTER) VFB RUN SS VPRG1 VPRG2 ISET FBO VFB VIN LTC3630 (SLAVE) SW RUN SS VPRG1 VPRG2 ISET CSS L2 FBO 3630 F10 Figure 10. 5V, 1A Regulator Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: VIN operating current and I2R losses. The VIN operating current dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. 1. The VIN operating current comprises two components: The DC supply current as given in the electrical characteristics and the internal MOSFET gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge, ΔQ, moves from VIN to ground. The resulting ΔQ/dt is the current out of VIN that is typically larger than the DC bias current. 2. I2R losses are calculated from the resistances of the internal switches, RSW and external inductor RL. When switching, the average output current flowing through the inductor is “chopped” between the high side PMOS switch and the low side NMOS switch. Thus, the series resistance looking back into the switch pin is a function of the top and bottom switch RDS(ON) values and the duty cycle (DC = VOUT/VIN) as follows: RSW = (RDS(ON)TOP)DC + (RDS(ON)BOT) • (1 – DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain the I2R losses, simply add 3630fb 17 LTC3630 APPLICATIONS INFORMATION RSW to RL and multiply the result by the square of the average output current: I2R Loss = IO2(RSW + RL) Other losses, including CIN and COUT ESR dissipative losses and inductor core losses, generally account for less than 2% of the total power loss. Thermal Considerations In most applications, the LTC3630 does not dissipate much heat due to its high efficiency. But, in applications where the LTC3630 is running at high ambient temperature with low supply voltage and high duty cycles, such as dropout, the heat dissipated may exceed the maximum junction temperature of the part. To prevent the LTC3630 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise from ambient to junction is given by: TR = PD • θJA where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature is given by: TJ = TA + TR Generally, the worst-case power dissipation is in dropout at low input voltage. In dropout, the LTC3630 can provide a DC current as high as the full 1.2A peak current to the output. At low input voltage, this current flows through a higher resistance MOSFET, which dissipates more power. As an example, consider the LTC3630 in dropout at an input voltage of 5V, a load current of 500mA and an ambient temperature of 85°C. From the Typical Performance graphs of Switch On-Resistance, the RDS(ON) of the top switch at VIN = 5V and 100°C is approximately 1.9Ω. Therefore, the power dissipated by the part is: For the MSOP package the θJA is 45°C/W. Thus, the junction temperature of the regulator is: 45°C = 106.4°C W which is below the maximum junction temperature of 150°C. TJ = 85°C + 0.475W • Note that the while the LTC3630 is in dropout, it can provide output current that is equal to the peak current of the part. This can increase the chip power dissipation dramatically and may cause the internal overtemperature protection circuitry to trigger at 180°C and shut down the LTC3630. Design Example As a design example, consider using the LTC3630 in an application with the following specifications: VIN = 24V, VIN(MAX) = 70V, VOUT = 3.3V, IOUT = 500mA, f = 200kHz. Furthermore, assume for this example that switching should start when VIN is greater than 12V. First, calculate the inductor value that gives the required switching frequency: ⎛ ⎞ ⎛ 3.3V ⎞ 3.3V L =⎜ ⎟ • ⎜1– ⎟ ≅ 10μH ⎝ 200kHz • 1.2A ⎠ ⎝ 24V ⎠ Next, verify that this value meets the LMIN requirement. For this input voltage and peak current, the minimum inductor value is: LMIN = 24V • 150ns ≅ 3μH 1.2A Therefore, the minimum inductor requirement is satisfied and the 10μH inductor value may be used. Next, CIN and COUT are selected. For this design, CIN should be sized for a current rating of at least: IRMS = 500mA • 3.3V 24V • – 1 ≅ 175mARMS 24V 3.3V PD = (ILOAD)2 • RDS(ON) = (500mA)2 • 1.9Ω = 0.475W 3630fb 18 LTC3630 APPLICATIONS INFORMATION The value of CIN is selected to keep the input from drooping less than 240mV (1%): CIN > 10μH • 1.2A 2 ≅ 2.2μF 2 • 24V • 240mV COUT will be selected based on a value large enough to satisfy the output voltage ripple requirement. For a 50mV output ripple, the value of the output capacitor can be calculated from: COUT > 10μH • 1.2A 2 ≅ 47μF 2 • 3.3V • 50mV COUT also needs an ESR that will satisfy the output voltage ripple requirement. The required ESR can be calculated from: ESR < 50mV ≅ 40mΩ 1.2A A 47μF ceramic capacitor has significantly less ESR than 40mΩ. The ISET pin should be left open in this example to select maximum peak current (1.2A typical). Figure 11 shows a complete schematic for this design example. 10μH VIN 24V 200k 2.2μF 4.7V 21k VIN SW LTC3630 VFB RUN SS VPRG2 VPRG1 FBO ISET GND VOUT 3.3V 500mA 47μF 3630 F11 Figure 11. 24V to 3.3V, 500mA Regulator at 200kHz PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3630. Check the following in your layout: Since an output voltage of 3.3V is one of the standard output configurations, the LTC3630 can be configured by connecting VPRG1 to ground and VPRG2 to the SS pin. 1. Large switched currents flow in the power switches and input capacitor. The loop formed by these components should be as small as possible. A ground plane is recommended to minimize ground impedance. The undervoltage lockout requirement on VIN can be satisfied with a resistive divider from VIN to the RUN pin (refer to Figure 9). Calculate R3 and R4 as follows: 2. Connect the (+) terminal of the input capacitor, CIN, as close as possible to the VIN pin. This capacitor provides the AC current into the internal power MOSFETs. 12V 40μA 3. Keep the switching node, SW, away from all sensitive small signal nodes. The rapid transitions on the switching node can couple to high impedance nodes, in particular VFB, and create increased output ripple. R3 = 200k which is ≤ R4 = 200k • 1.21V = 20.9k 12V – 1.21V + 200k • 4μA Choose standard values for R3 = 200k, R4 = 21k. Note that the VIN falling threshold will be 10% less than the rising threshold or 11V. Since the maximum VIN is more than 4.5x the UVLO threshold, a 4.7V Zener diode in parallel with R4 is required to keep the maximum voltage on the RUN pin less than the absolute maximum of 6V. 4. Flood all unused area on all layers with copper except for the area under the inductor. Flooding with copper will reduce the temperature rise of power components. You can connect the copper areas to any DC net (VIN, VOUT, GND, or any other DC rail in your system). 3630fb 19 LTC3630 APPLICATIONS INFORMATION Pin Clearance/Creepage Considerations The LTC3630 is available in two packages (MSE16 and DHC) both with identical functionality. However, the 0.2mm (minimum space) between pins and paddle on the DHCpackage may not provide sufficient PC board trace clearance between high and low voltage pins in some higher voltage applications. In applications where clearance is required, the MSE16 package should be used. The MSE16 package has removed pins between all the adjacent high voltage and low voltage pins, providing 0.657mm clearance which will be sufficient for most applications. For more information, refer to the printed circuit board design standards described in IPC-2221 (www.ipc.org). L1 VIN VIN VOUT SW R1 R3 RUN R4 VFB LTC3630 RISET VIN 5V TO 65V L1 33μH CIN 4.7μF SW VIN LTC3630 VFB RUN R2 ISET ISET CISET CIN COUT SS FBO COUT 100μF w2 RISET 220k VOUT 5V 500mA CISET 100pF VPRG1 VPRG2 GND CSS 3630 F13 FBO SS VPRG2 VPRG1 CIN: TDK C5750X7R2A-475M (2220) COUT: 2 wAVX 1812D107MAT L1: SUMIDA CDRH105RNP-330N Figure 13. 5V to 65V Input to 5V Output, High Efficiency, 500mA Regulator GND L1 VOUT CIN COUT VIN GND VIAS TO GROUND PLANE OUTLINE OF LOCAL GROUND PLANE 3630 F12 Figure 12. Example PCB Layout 3630fb 20 LTC3630 TYPICAL APPLICATIONS 4V to 24V Input to 3.3V Output, 250mA Regulator with External Soft-Start, Small Size COUT 10μF CSS 100nF RISET 100k VOUT = 3.3V 90 VOUT 3.3V 250mA EFFICIENCY 80 1000 70 60 100 50 POWER 40 10 30 GND POWER LOSS (mW) CIN 2.2μF VIN SW LTC3630 VFB RUN ISET SS FBO VPRG1 VPRG2 100 EFFICIENCY (%) VIN 4V TO 24V L1 10μH Efficiency and Power Loss vs Load Current 3630 TA02a 1 20 10 CIN: MURATA GRM42-2X7R225K25D500 COUT: KEMET C1206C206K9PAC L1: VISHAY IHLP2020BZ-100M-11 0 0 0.1 10 1 LOAD CURRENT (mA) 100 3630 TA02b 4V to 53V Input to –12V Output, Positive-to-Negative Converter 500 L1 22μH CIN 4.7μF 100V VIN SW LTC3630 RUN VFB ISET FBO SS VPRG2 VPRG1 R1 200k R2 147k COUT 22μF GND CIN: KEMET C1210C475K5RAC COUT: TDK C4532X7R1C226M L1: COILCRAFT MSS1048-223ML 3630 TA03a VOUT –12V MAXIMUM LOAD CURRENT (mA) VIN 4V TO 53V Maximum Load Current vs Input Voltage VOUT = –12V 400 300 200 100 0 5 10 15 20 25 30 35 40 INPUT VOLTAGE (V) 45 50 3630 TA03b 3630fb 21 LTC3630 TYPICAL APPLICATIONS 5V to 65V Input to 5V Output,150mA Regulator with 20kHz Minimum Burst Frequency L1 33μH CIN 2.2μF VIN SW RUN RISET 60.4k COUT 10μF LTC3630 VFB 30.1Ω SS ISET VPRG2 VPRG1 FBO IN GND OUT LTC6994-1 V+ 976k CIN: TDK C3225X7R2AA225M COUT: AVX 12063D106KAT L1: COOPER BUSSMAN SD25-330 SET 196k 60 VOUT 5V 150mA VIN = 3.3V 50 BURST FREQUENCY (kHz) VIN 5V TO 65V Burst Frequency vs Load Current 40 30 20kHz LIMIT 20 10 NO LIMIT DIV GND 100k 0 0 3630 TA04 1 10 LOAD CURRENT (mA) 100 3630 TA04b 12V to 65V Input to 12V Output with 100mA Input Current Limit L1 22μH CIN 2.2μF VIN R3 806k R4 10k 500 SW LTC3630 RUN VFB ISET FBO SS VPRG1 VPRG2 R1 200k R2 14.3k GND 3630 TA05 VOUT COUT 12V 22μF MAXIMUM CURRENT (mA) VIN 12V TO 65V Maximum Input and Load Current vs Input Voltage 400 MAXIMUM LOAD CURRENT 300 200 MAXIMUM INPUT CURRENT 100 CIN: TDK C3225X7R2A225M COUT: TAIYO YUDEN EMK316BJ226ML-T L1:TDK SLF7045470MR75 0 10 15 20 25 30 35 40 45 50 55 60 65 INPUT VOLTAGE (V) 3630 TA05b INPUT CURRENT LIMIT ~ VOUT R4 s 2 R3R4 MAXIMUM LOAD CURRENT ~ VIN R4 s 2 R3R4 3630fb 22 LTC3630 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MSE Package Variation: MSE16 (12) 16-Lead Plastic MSOP with 4 Pins Removed Exposed Die Pad (Reference LTC DWG # 05-08-1871 Rev C) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 t 0.102 (.112 t .004) 5.23 (.206) MIN 2.845 t 0.102 (.112 t .004) 0.889 t 0.127 (.035 t .005) 8 1 1.651 t 0.102 (.065 t .004) 1.651 t 0.102 3.20 – 3.45 (.065 t .004) (.126 – .136) 16 0.305 t 0.038 (.0120 t .0015) TYP 0.50 (.0197) 1.0 BSC (.039) BSC RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 4.039 t 0.102 (.159 t .004) (NOTE 3) 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE 0.280 t 0.076 (.011 t .003) REF 16 14 121110 9 DETAIL “A” 0s – 6s TYP 3.00 t 0.102 (.118 t .004) (NOTE 4) 4.90 t 0.152 (.193 t .006) GAUGE PLANE 0.53 t 0.152 (.021 t .006) 1 DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.17 – 0.27 (.007 – .011) TYP 3 567 8 1.0 (.039) BSC 0.50 NOTE: (.0197) 1. DIMENSIONS IN MILLIMETER/(INCH) BSC 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.86 (.034) REF 0.1016 t 0.0508 (.004 t .002) MSOP (MSE16(12)) 0911 REV C 3630fb 23 LTC3630 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DHC Package 16-Lead Plastic DFN (5mm w 3mm) (Reference LTC DWG # 05-08-1706 Rev Ø) 0.65 t0.05 3.50 t0.05 1.65 t0.05 2.20 t0.05 (2 SIDES) PACKAGE OUTLINE 0.25 t 0.05 0.50 BSC 4.40 t0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5.00 t0.10 (2 SIDES) R = 0.20 TYP 3.00 t0.10 (2 SIDES) 9 0.40 t0.10 16 1.65 t0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH (DHC16) DFN 1103 8 0.200 REF 1 0.25 t0.05 0.50 BSC 0.75 t0.05 4.40 t0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3630fb 24 LTC3630 REVISION HISTORY REV DATE DESCRIPTION PAGE NUMBER A 5/12 Circuit 3630 TA05: change 36V to 12V 22 B 6/12 Clarified Typical Application 26 3630fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 25 LTC3630 TYPICAL APPLICATION 4.5V to 65V Input to 3.3V Output, 1.5A Regulator VX 22μF SYNC/MODE INTVCC PVIN PGOOD ROSC 105k VIN* 4.5V TO 65V L1 33μH CIN 4.7μF VIN PVIN RT CITH 1nF RITH 4.32k R1 200k RUN VFB ISET FBO SS VPRG1 VPRG2 R2 102k R1 105k R2 475k CFB 10pF CVCC 1μF BOOST CBST 0.22μF LTC3603 SW LTC3630 D1 ITH SW VFB SW RUN SW TRACK/SS PGND PGND PGND L1 2.2μH VOUT 3.3V 1.5A COUT 100μF GND 3630 TA06 CIN: MURATA GCM32DR72A225KA64L C1: TDK CGA6P1X7R1C226M L1: COILCRAFT MSS1048T-333 COUT: TDK C3225X5ROJ107M L2: VISHAY IHLP-2525CZ-01 *WHEN VIN > 15V, LTC3630 SWITCHES AND VX IS REGULATED TO 15V; WHEN VIN < 15V, LTC3630 OPERATES IN DROPOUT AND VX FOLLOWS VIN RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3642 45V (Transient to 60V) 50mA Synchronous Step-Down DC/DC Converter VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD = 3μA, 3 × 3 DFN-8, MSOP-8 LTC3631 45V (Transient to 60V) 100mA Synchronous Step-Down DC/DC Converter VIN: 4.5V to 45V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD = 3μA, 3 × 3 DFN-8, MSOP-8 LTC3632 50V (Transient to 60V) 20mA Synchronous Step-Down DC/DC Converter VIN: 4.5V to 50V, VOUT(MIN) = 0.8V, IQ = 12μA, ISD = 3μA, 3 × 3 DFN-8, MSOP-8 LTC3103 15V, 300mA Synchronous Step-Down DC/DC Converter with Ultralow Quiescent Current VIN: 2.5V to 15V, VOUT(MIN) = 0.6V, IQ = 1.8μA, ISD = 1μA, 3 × 3 DFN-10, MSOP-10E LTC3104 15V, 300mA Synchronous Step-Down DC/DC Converter with Ultralow Quiescent Current and 10mA LDO VIN: 2.5V to 15V, VOUT(MIN) = 0.6V, IQ = 2.6μA, ISD = 1μA, 4 × 3 DFN-14, MSOP-16E LT3970 40V, 350mA, 2.2MHz High Efficiency Micropower Step-Down DC/DC Converter with IQ = 2.5μA VIN: 4.2V to 40V, VOUT(MIN) = 1.21V, IQ = 2.5μA, ISD < 1μA, 3 × 2 DFN-10, MSOP-10 LT3990 62V, 350mA, 2.2MHz High Efficiency Micropower Step-Down DC/DC Converter with IQ = 2.5μA VIN: 4.2V to 62V, VOUT(MIN) = 1.21V, IQ = 2.5μA, ISD < 1μA, 3 × 3 DFN-10, MSOP-16E LT3971 38V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down DC/DC Converter with IQ = 2.8μA VIN: 4.3V to 38V, VOUT(MIN) = 1.19V, IQ = 2.8μA, ISD < 1μA, 3 × 3 DFN-10, MSOP-10E LT3991 55V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down DC/DC Converter with IQ = 2.8μA VIN: 4.3V to 55V, VOUT(MIN) = 1.19V, IQ = 2.8μA, ISD < 1μA, 3 × 3 DFN-10, MSOP-10E LT3682 36V, 60VMAX, 1A, 2.2MHz High Efficiency Micropower Step-Down DC/DC Converter VIN: 3.6V to 36V, VOUT(MIN) = 0.8V, IQ = 75μA, ISD < 1μA, 3 × 3 DFN-12 LTC3891 Low IQ, 60V Synchronous Step-Down Controller VIN: 4V to 60V, VOUT(MIN) = 0.8V, IQ = 50μA, ISD = 14μA, 3 × 4 QFN-20, TSSOP-20E 3630fb 26 Linear Technology Corporation LT 0612 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2012