MICREL MM5451

MM5450/5451
LED Display Driver
General Description
Features
A single pin controls the LED display brightness by setting
a reference current through a variable resistor connected
to the supply.
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Applications
Ordering Information
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Part Number
Standard
Pb-Free
MM5450BN MM5450YN
MM5451BN MM5451YN
MM5450BV MM5450YV
MM5451BV MM5451YV
The MM5450 and MM5451 LED display drivers are
monolithic MOS IC’s fabricated in an N-Channel, metalgate process. The technology produces low-threshold,
enhancement-mode, and ion-implanted depletion-mode
devices.
Industrial control indicator
Relay driver
Digital clock, thermometer, counter, voltmeter
Instrumentation readouts
Continuous brightness control
Serial data input
No load signal requirement
Enable (on MM5450)
Wide power supply operation
TTL compatibility
34 or 35 outputs, 15mA capability
Alphanumeric capability
Junction
Temp. Range
Package
–40°C to+85°C
–40°C to+85°C
–40°C to+85°C
–40°C to+85°C
40-pin PDIP
40-pin PDIP
44-pin PLCC
44-pin PLCC
____________________________________________________________________________________________________________
Block Diagram
VDD
20
BRIGHTNESS
CONTROL
19
DATA ENABLE/OUT 35
(See Note 1)
SERIAL DATA
CLOCK
OUT 34
OUT 1
24
18
35 OUTPUT BUFFERS
35 LATCHES
23
22
LOAD
35-BIT SHIFT
REGISTER
RESET
21
1
RESET
(only available
in die form)
Note 1: Pin 23 is Data Enable in MM5450
Pin 23 is Output 35 in MM5451
Figure 1.
SuperSwitcher and Super ßeta PNP are trademarks of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
February 2006
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MM5450/5451
Connection Diagram: Die
Figure 2.
Connection Diagram: Dual-in-line Package
V SS
1
40 OUTPUT BIT 18
V SS
1
40 OUTPUT BIT 18
OUTPUT BIT 17
2
39 OUTPUT BIT 19
OUTPUT BIT 17
2
39 OUTPUT BIT 19
OUTPUT BIT 16
3
38 OUTPUT BIT 20
OUTPUT BIT 16
3
38 OUTPUT BIT 20
OUTPUT BIT 15
4
37 OUTPUT BIT 21
OUTPUT BIT 15
4
37 OUTPUT BIT 21
OUTPUT BIT 14
5
36 OUTPUT BIT 22
OUTPUT BIT 14
5
36 OUTPUT BIT 22
OUTPUT BIT 13
6
35 OUTPUT BIT 23
OUTPUT BIT 13
6
35 OUTPUT BIT 23
OUTPUT BIT 12
7
34 OUTPUT BIT 24
OUTPUT BIT 12
7
34 OUTPUT BIT 24
OUTPUT BIT 11
8
33 OUTPUT BIT 25
OUTPUT BIT 11
8
33 OUTPUT BIT 25
OUTPUT BIT 10
9
32 OUTPUT BIT 26
OUTPUT BIT 10
9
32 OUTPUT BIT 26
OUTPUT BIT 9 10
31 OUTPUT BIT 27
OUTPUT BIT 9 10
OUTPUT BIT 8 11
30 OUTPUT BIT 28
OUTPUT BIT 8 11
30 OUTPUT BIT 28
OUTPUT BIT 7 12
29 OUTPUT BIT 29
OUTPUT BIT 7 12
29 OUTPUT BIT 29
OUTPUT BIT 6 13
28 OUTPUT BIT 30
OUTPUT BIT 6 13
28 OUTPUT BIT 30
OUTPUT BIT 5 14
27 OUTPUT BIT 31
OUTPUT BIT 5 14
27 OUTPUT BIT 31
OUTPUT BIT 4 15
26 OUTPUT BIT 32
OUTPUT BIT 4 15
26 OUTPUT BIT 32
OUTPUT BIT 3 16
25 OUTPUT BIT 33
OUTPUT BIT 3 16
25 OUTPUT BIT 33
OUTPUT BIT 2 17
24 OUTPUT BIT 34
OUTPUT BIT 2 17
24 OUTPUT BIT 34
OUTPUT BIT 1 18
23 DATA ENABLE
OUTPUT BIT 1 18
23 OUTPUT BIT 35
BRIGHTNESS 19
CONTROL
V DD 20
22 DATA IN
BRIGHTNESS 19
CONTROL
V DD 20
22 DATA IN
MM5450BN/YN
21 CLOCK IN
MM5451BN/YN
31 OUTPUT BIT 27
21 CLOCK IN
Figure 3a, 3b.
February 2006
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MM5450/5451
Connection Diagram: Plastic Leaded Chip Carrier
6
5
4
3
2
1
44
43
42
41
40
OUTPUT BIT 13
7
39
OUTPUT BIT 23
OUTPUT BIT 12
8
38
OUTPUT BIT 24
OUTPUT BIT 11
9
37
OUTPUT BIT 25
OUTPUT BIT 10 10
36
OUTPUT BIT 26
OUTPUT BIT 9 11
35
OUTPUT BIT 27
34
NC
OUTPUT BIT 8 13
33
OUTPUT BIT 28
OUTPUT BIT 7 14
32
OUTPUT BIT 29
OUTPUT BIT 6 15
31
OUTPUT BIT 30
OUTPUT BIT 5 16
30
OUTPUT BIT 31
OUTPUT BIT 4 17
29
OUTPUT BIT 32
NC 12
MM5450BV/YV
18
19
20
21
22
23
24
25
26
27
28
6
5
4
3
2
1
44
43
42
41
40
OUTPUT BIT 13
7
39
OUTPUT BIT 23
OUTPUT BIT 12
8
38
OUTPUT BIT 24
OUTPUT BIT 11
9
37
OUTPUT BIT 25
OUTPUT BIT 10 10
36
OUTPUT BIT 26
OUTPUT BIT 9 11
35
OUTPUT BIT 27
34
NC
OUTPUT BIT 8 13
33
OUTPUT BIT 28
OUTPUT BIT 7 14
32
OUTPUT BIT 29
OUTPUT BIT 6 15
31
OUTPUT BIT 30
OUTPUT BIT 5 16
30
OUTPUT BIT 31
OUTPUT BIT 4 17
29
OUTPUT BIT 32
NC 12
MM5451BV/YV
18
19
20
21
22
23
24
25
26
27
28
Figure 4a, 4b.
February 2006
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MM5450/5451
Absolute Maximum Ratings
Operating Ratings
Voltage (any pin) ........................................VSS to VSS + 12V
Power Dissipation
+25°C........................................................................1W
+85°C.................................................................560mW
Junction Temperature (TJ) ....................................... +150°C
Storage Temperature (TS).........................–65°C to +150°C
Lead Temperature (soldering, 10sec.) ..................... +300°C
Supply voltage (VDD – VSS).......................... +4.75V to +11V
Ambient Temperature Range (TA) ............. –40°C to +85°C
Electrical Characteristics
4.5V ≤ VDD ≤ 11V, VSS = 0V; TA = 25°C, bold values indicate –40°C ≤ TA ≤ +85°C, unless otherwise noted.
Symbol
Parameter
Condition
Min
Power Supply Current
–25°C to +85°C, excluding output loads
–40°C to +85°C, excluding output loads
Typ
Max
Units
8.5
10
mA
mA
–0.3
2.2
VDD –2
0.8
VDD
VDD
V
V
V
0
0.75
mA
10
µA
10
4
25
µA
mA
mA
Data Input Voltage
VL
VH
logic-0 level, ±10 µA input bias
logic-1 level, 4.75V ≤ VDD ≤ 5.25V
VDD > 5.25V
Brightness Control Input Current
Note 2
Output Sink Current
segment off, VOUT = 3.0V
segment on, VOUT = 1.8V, Note 3
brightness input = 0µA
brightness input = 100µA
brightness input = 750µA
0
2.0
15
Brightness Control Input Voltage
input current = 750 µA
3.0
4.3
V
Output Matching
Note 1
±20
%
fC
Clock Input Frequency
Notes 5, 6
500
kHz
tH
Clock Input High Time
Notes 5, 6
950
ns
tL
Clock Input Low Time
Notes 5, 6
950
tDS
Data Input Setup Time
300
ns
ns
tDH
Data Input Hold Setup Time
300
ns
tDES
Data Enable Input Setup Time
100
ns
Reset Pad Current
die
8
2.7
8
µA
Notes:
1. Output matching is calculated as the percent variation (IMAX + IMIN) / 2.
2. With a fixed resistor on the brightness input pin, some variation in brightness will occur among devices.
3. See Figures 7, 8 and 9 for recommended operating conditions and limits. Absolute maximum for each output should be limited to 40mA.
4. VOUT should be regulated by user. See Figures 8 and 9 for allowable VOUT vs. IOUT operation.
5. AC input waveform specification for test purpose: tR ≤ 200ns, tF ≤ 20ns, f = 500kHz, 50% ±10% duty cycle.
6. Clock input rise and fall times must not exceed 300ns.
February 2006
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MM5450/5451
Functional Description
Figure 5 shows the input data format. A leading “1” is
followed by 35 bits of data. After the 36th had been
transferred, a LOAD signal is generated synchronously
with the clock high state. This loads the 35 bits of data
into the latches. The low side of the clock is used to
generate a RESET signal which clears all shift registers
for the next set of data. All shift registers are static
master-slave, with no clear for the master portion of the
first register, allowing continuous operation.
The MM5450 and MM5451 were designed to drive either
4- or 5-digit alphanumeric LED displays with the added
benefit of requiring minimal interface with the display or
data source.
Data is transferred serially via 2 signals; clock and serial
data. Data transfer without the added inconvenience of
an external load signal is accomplished by using a
format of a leading “1”followed by the allowed 35 data
bits. These 35 data bits are latched after the 36th has
been transferred. This scheme provides non multiplexed,
direct drive to the LED display. Characters currently
displayed (thus, data output) changes only if the serial
data bits differ from those previously transferred.
There must be a complete set of 36 clocks or the shift
registers will not clear.
When the chip first powers ON, an internal power ON
reset signal is generated which resets all registers and
all latches. The START bit and the first clock return the
chip to its normal operation.
The MIC37252 regulator is fully protected from damage
due to fault conditions. Current limiting is provided. This
limiting is linear; output current during overload
conditions is constant. Thermal shutdown disables the
device when the die temperature exceeds the maximum
safe operating temperature. Transient protection allows
device (and load) survival even when the input voltage
spikes above and below nominal. The output structure of
these regulators allows voltages in excess of the desired
output voltage to be applied without reverse current flow.
Figure 3 and 4 show the pinout of the MIC5450 and
MIC5451. Bit 1 is the first bit following the start bit and it
will appear on pin 18. A logical “1” at the input will turn
on the appropriate LED.
Figure 5 shows the timing relationships between data,
clock and /DATA ENABLE. A maximum clock frequency
of 0.5MHz is assumed.
Control of the output current for LED displays provides
for the display brightness. To prevent oscillations, a 1nF
capacitor should be connected to pin 19, brightness
control.
For applications where a lesser number of outputs are
used, it is possible to either increase the current per
output, or operate the part at higher than 1V VOUT. The
following equation can be used for calculations.
The block diagram is shown in Figure 1. For the
MIC5450, the /DATA ENABLE is a metal option and is
used instead of the 35th output. The output current is
typically 20-times greater that the current into pin 19,
which is set by an external variable resistor.
TJ = (VOUT) (ILED) (No. of segments) (124°C/W) + TA
where:
TJ = junction temperature + 150°C max
VOUT = the voltage at the LED driver outputs
ILED = the LED current
124°C/W = thermal resistance of the package
TA = ambient temperature
There is an external reset connection shown which is
available on unpackaged (die) only. Figure 2 illustrates
the die pad locations for bonding in “chip on board”
applications.
The above equation was used to plot Figures 7–9.
February 2006
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MM5450/5451
Figure 5.
Figure 6. Input Data Format
February 2006
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MM5450/5451
Typical Performance Characteristics
A
J
SE
G
M
OUT
O
20
LED
Figure 8.
Figure 7.
Figure 9.
Typical Applications
RAW DC
>9V
LM317
7V
240
1k
5V
I 19
–
5k
LM324
2N2907
+
I 19 =
5V
1K
20
1
20
PIN 19
CD4046
(VCO)
MM5450
MM74HC123
Q 19
MM5450
10 µS
1
Figure 10. Typical Application of Constant Current
Brightness Control
February 2006
Figure 11. Brightness Control Varying the Duty Cycle
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MM5450/5451
Typical Applications
LED DISPLAY
AM
FM
34
MM5450
DISPLAY DRIVER
ELECTRONIC
TUNING
CONTROLLER
KEYBOARD
PLL
SYNTHESIZER
STATION DETECT, ETC.
Figure 12. Basic Electronically Tuned Radio System
VLED = 3.0V
VLED = 3.0V
VLED
VLED
9–16
2–8, 40 32–39
24–31
MM5450
18 21 22 19
20
CLOCK IN
DATA IN
BRIGHTNESS
CONTROL
1 23 17
VDD
100k
TYP.
Figure 13. Duplexing 8 Digits with One MM5450
February 2006
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Micrel, Inc.
MM5450/5451
Package Information
40-Pin Plastic DIP (N)
44-Pin PLCC (V)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its
use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2002 Micrel, Incorporated.
February 2006
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