SY88232L/AL 2.5Gbps Laser Diode Driver with Integrated Limiting Amplifier General Description Features The SY88232L is a single supply 3.3V integrated laser driver and post amplifier for telecom/datacom applications with data rates from 155Mbps up to 2.5Gbps. The driver can deliver modulation current up to 85mA, and provides a high compliance voltage that makes it suitable for highcurrent operation with the laser DC-coupled to it. The post amplifier can detect signals with amplitude as low as 5mVPP. The SY88232AL is a version of the SY88232L without 50Ω termination resistors at the inputs of the driver and the post amplifier. The SY88232AL is to be used specially in SFF modules mounted on mother boards which have preinstalled terminations. Removing post amplifier input terminations will allow for receiver gain control. All support documentation can be found on Micrel’s web site at: www.micrel.com. • • • • • • • • • 2.4V minimum laser compliance voltage Operation up to 2.5Gbps Integrated APC circuit Modulation current up to 85mA Bias current up to 70mA Bias, Modulation, and power monitoring High input sensitivity post amplifier, 5mVPP Programmable LOS level Available in 32-pin (5mm x 5mm) QFN package Applications • Multi-rate burst mode applications: A-PON, B-PON, G-PON, E-PON, GE-PON ___________________________________________________________________________________________________________ Typical Application Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com June 2009 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Ordering Information(1) Part Number Voltage Temperature Range Package Type Package Marking Lead Finish SY88232LMG 3.3V –40° to +85°C QFN-32 SY88232L with Pb-Free bar-line indicator NiPdAu Pb-Free SY88232LMGTR 3.3V –40° to +85°C QFN-32 SY88232L with Pb-Free bar-line indicator NiPdAu Pb-Free SY88232ALMG 3.3V –40° to +85°C QFN-32 SY88232A with Pb-Free bar-line indicator NiPdAu Pb-Free 3.3V –40° to +85°C QFN-32 SY88232A with Pb-Free bar-line indicator NiPdAu Pb-Free (2) (2) SY88232ALMGTR Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = +25°C, DC Electricals only. 2. Tape and Reel. June 2009 2 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Pin Configuration 32-Pin QFN Pin Description Pin Number Pin Name Pin Function 1 LOS/SD_SEL 2 LOSLVL Loss-of-Signal Level Set. A resistor from this pin to VCC sets the threshold for the data input amplitude at which LOS will be asserted. 3 LOS/SD Loss-of-Signal (LOS selected): asserts high when the data input amplitude falls below the threshold set by LOSLVL. LOS or SD selection, TTL input. Set high, connect to VCC, or leave open to select LOS. Set low or connect to GND to select SD. Signal Detect (SD selected): asserts low when the data input amplitude falls below the threshold set by LOSLVL. 4 JAM Active low TTL/CMOS. Internally pulled-up with 75kΩ. Connect to GND or apply a low level signal (<0.8 V) to enable the post amp output. Can be shorted to LOS/SD (pin 3) to create a squelch function. The polarity of this input follows the polarity of LOS/SD. 6 DIN+ SY88232L: Driver Non-inverting input data. Internally terminated with 50 Ω to a reference voltage. SY88232AL: Driver Non-inverting input data. No internal termination. 7 DIN- SY88232L: Driver inverting input data. Internally terminated with 50 Ω to a reference voltage. SY88232AL: Driver inverting input data. No internal termination. 9 /TXDIS Transmitter Complementary Fast Disable. TTL input. The transmitter is enabled when this pin is asserted High or left open and disabled when this pin is asserted Low. A 6.3kΩ resistor must be installed between pin 10 and GND if /TXDIS is used as TTL input. 10 TXDIS Transmitter Fast Disable. TTL Input. The transmitter is enabled when this pin is asserted Low and disabled when this pin is asserted High or left open. A 6.3kΩ resistor must be installed between pins 9 and GND if TXDIS is used as TTL input. 11 /TXEN Active low TTL/CMOS. Internally pulled-up. Pull-down with a 22kΩ or lower resistance or apply a low level signal (<0.8V) to enable bias and modulation. Keep floating or apply a high level (>2V) to disable. June 2009 3 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Pin Description (continued) Pin Number Pin Name Pin Function 12 APCSET Bias current setting and control. The bias current is set by installing an external resistor from this pin to ground or using a current source. Connect a 50kΩ resistor to GND for open loop operation. 13 MODSET Modulation current setting and control. The modulation current is set by installing an external resistor from this pin to ground or using a current source. 14 BIASMAX Install a resistor between this pin and GND to set the maximum bias current for the closed loop operation. The APC loop controls the bias current up to the level of BIASMAX. When the bias current reaches the maximum value set through this pin, the driver continues to sink a current equal to this maximum. For open loop operations, this pin sets the bias current. 15 MODMON Modulation Current Monitor. Provides a current, which represents 1/100 of the modulation current. Install a resistor between this pin and GND to convert that current to a voltage proportional to the modulation current. 18 MOD- Inverted modulation current output. Provides modulation current when input data is negative. 19 MOD+ Non-inverted modulation current output. Provides modulation current when input data is positive. 21 BIAS 22 MD 23 BIASMON 24 RSSI 25 APCFAULT 27 RIN+ Bias current output, sources current when /TXDIS is high. Connect to the cathode of the laser through a resistor. Input from the laser monitoring photodiode. Connect to the anode of the laser photodiode for APC operation. Bias Monitor. Provides a current, which represents 1/50 of the bias current. Install a resistor between this pin and GND to convert that current to a voltage. Received Signal Strength Indicator. Install a resistor from this pin to GND to get a voltage proportional to the received signal. Indicates APC failure when High. Active High TTL/CMOS. Use a 10kΩ Pull up. SY88232L: Post amplifier Non-inverting input data. Internally terminated with 50 Ω to a reference voltage. SY88232AL: Post amplifier Non-inverting input data. No internal termination. 28 RIN- SY88232L: Driver inverting input data. Internally terminated with 50 Ω to a reference voltage. SY88232AL: Driver inverting input data. No internal termination. 30 ROUT- Post Amplifier Complementary CML data output. 31 ROUT+ Post Amplifier true CML data output. 5, 8, 16, 24, 29 GND 17, 20, 32 June 2009 Ground. Ground and exposed pad must be connected to the plane of the most negative potential. Supply Voltage. Bypass with a 0.1µF//0.01µF low ESR capacitor as close to VCC pin as possible. 4 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Truth Tables DIN+ DIN- L H /TXEN L MOD+ (2) H MOD- LOS/SD_SEL Function Selected JAM Output H LOS L Enabled L H LOS H Disabled SD L Disabled SD H Enabled Laser Output (3) Power L H L L L H H L X X X H L L L Table 1. Modulation Output Truth Table /TXEN BIAS L ON L OFF H OFF Table 2. BIAS Output Truth Table Table 3. Post Amp Output Truth Table (1, 3) (1) Notes: 1. Assuming /TXDIS = H and a 6.3kΩ resistor installed between TXDIS and GND or TXDIS = L and a 6.3kΩ resistor installed between /TXDIS and GND 2. IMOD = 0 when MOD+ = H. 3. Assuming that the cathode of the laser is connected to MOD+. June 2009 5 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VIN) ..................................... –0.5V to +4.0V CML Input Voltage (VIN) ................... VCC–1.2V to VCC+0.5V TTL Control Input Voltage (VIN) ............................. 0V to VCC Lead Temperature (soldering, 20sec.) ..................... +260°C Storage Temperature (Ts) ......................... –65°C to +150°C Supply Voltage (VCC) .................................... +3.0V to +3.6V Ambient Temperature (TA) .......................... –40°C to +85°C (3) Package Thermal Resistance QFN (θJA) Still-air ........................................................ 60°C/W (ψJB) ................................................................... 33°C/W DC Electrical Characteristics TA = –40°C to +85°C and VCC = +3.0V to +3.6V, unless otherwise noted. Typical values are VCC = +3.3V, TA = 25°C, IMOD = 30mA, IBIAS = 30mA. Symbol Parameter Condition Min Modulation and Bias currents excluded Typ 90 Max 150 Units (4) ICC Power Supply Current mA VIL TXDIS, /TXDIS, /TXEN, JAM, and LOS/SD_SEL Input Low -0.3 0.8 V VIH TXDIS, /TXDIS, /TXEN, JAM, and LOS/SD_SEL Input High 2 VCC + 0.3 V VMOD_MIN Minimum Voltage Required at the Driver Output, MOD+ and MOD-, for Proper Operation 0.6 V VBIAS_MIN Minimum Voltage Required at the Driver Output, BIAS pin, for Proper Operation 0.8 V IBIAS Bias-ON Current Voltage at Bias pin ≥ 0.8V IBIAS_OFF Bias-OFF Current Current at BIAS pin when /EN is high or TXDIS is low and a 6.3kΩ installed between /TXDIS and GND RIN Input Resistance at DIN+ and DIN- Single ended (SY88232L only) VOL APCFAULT Output Low IOL = 2mA 0.5 V IOH APCFAULT Output Leakage VOH = VCC 100 µA IMD Current range at MD pin 1500 µA Laser Driver 1 42.5 50 50 70 mA 150 µA 57.5 Ω Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package Thermal Resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. θJB uses a 4-layer and θJA in still air unless otherwise stated. 4. ICC = 150mA for worst-case conditions with IMOD = 85mA, IBias = 70mA, TA = +85°C, VCC = 3.6V. June 2009 6 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Post Amplifier Symbol Parameter Condition Min Typ Max Units LOSLVL LOSLVL Voltage VCC V VOH ROUT+, ROUT- HIGH Voltage VCC-0.020 VOL ROUT+, ROUT- LOW Voltage VCC-0.475 VCC-0.005 VCC V VCC-0.400 VCC-0.350 V VRSSI Maximum voltage at RSSI pin 1.2 V VOFFSET Differential Output Offset Z0 (ROUT) Single-Ended Output Impedance 42.5 50 ±80 mV 57.5 Ω ZI (RIN) Single-Ended Input Impedance 42.5 50 57.5 Ω VCC -1.3 (SY88232L only) VOL(LOS/SD) LOS/SD Output Low IOL = 2mA 0.5 V IOH(LOS/SD) LOS/SD Output Leakage VOH = VCC 100 µA June 2009 7 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL AC Electrical Characteristics TA = –40°C to +85°C and VCC = +3.0V to +3.6V, unless otherwise noted. Typical values are VCC = +3.3V, TA = 25°C, IMOD = 30mA, IBIAS = 30mA. Symbol Parameter Condition Min Typ Max Units 0.155 2.5 Gbps 100 2400 mVPP 10 85 mA Laser Driver Data Rate NRZ VDIFF-IN (DIN) Differential Input Voltage Swing IMOD Modulation Current IMOD_OFF (5) Modulation OFF Current AC-coupled DC-coupled, Voltage at MOD pin ≥0.6V (6) mA Current at MOD+ when /TXEN is high or TXDIS is low and a 6.3kΩ installed between /TXDIS and GND 150 µA Current at MOD- when /TXEN is high or TXDIS is low and a 6.3kΩ installed between /TXDIS and GND 150 µA 10 70 tr Output Current Rise Time 20% to 80%, IMOD = 60mA 60 85 ps tf Output Current Fall Time 20% to 80%, IMOD = 60mA 60 85 ps Jitter tINIT (7) Total Jitter APC Loop Initialization Time 155Mbps data rate 30 psPP 622Mbps data rate 30 psPP 1.25Gbps data rate 30 psPP 2.5Gbps data rate 30 psPP Power up with /TXEN low, TXDIS high, and a 6.3kΩ installed between /TXDIS and GND 12 µs /TXEN changes from high to low with power ON, TXDIS high, and a 6.3kΩ installed between /TXDIS and GND 10 µs TXDIS changes from low to high with power ON, /TXEN low, and a 6.3kΩ installed between /TXDIS and GND 2.5 ns 622Mbps 720 ns 1.25Gbps 576 ns 2.5Gbps 576 ns Notes: 5. Load = 15Ω. 6. Assuming VCC = 3.0V, Laser bandgap voltage = 1V, laser package inductance = 1nH, laser equivalent series resistor = 5 Ω, and damping resistor = 10Ω. 7. Total jitter is measured using 27 – 1 PRBS pattern. June 2009 8 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Post Amplifier Symbol Parameter Condition tr , tf Output Rise/Fall Time (20% to 80%) tJITTER Deterministic Random VDiff_IN (RIN) Differential Input Voltage Swing VDiff_OUT (ROUT) Differential Output Voltage Swing Note 8 GRSSI RSSI Gain = IRSSI / VDiff_IN (RIN) 5mVPP ≤ VDiff_IN (RIN) ≤ 200mVPP 5 5mVPP ≤ VDiff_IN (RIN) ≤ 200mVPP ± 2.5 RSSI Linearity Min Typ Max Note 8 60 120 Note 9 Note 10 15 5 5 700 LOSAL Low LOS Assert Level RLOSLVL = 15kΩ LOSDL Low LOS De-assert Level RLOSLVL = 15kΩ 2 HSYL Low LOS Hysteresis RLOSLVL = 15kΩ, Note 11 LOSAM Medium LOS Assert Level RLOSLVL = 5kΩ LOSDM Medium LOS De-assert Level RLOSLVL = 5kΩ HSYM Medium LOS Hysteresis LOSAH ps psPP psRMS 1800 800 Units 950 mVPP mVPP µA/ mVPP % 8 mVPP 10 20 mVPP 1.5 2.6 6 dB 4 12 16 30 mVPP RLOSLVL = 5kΩ, Note 11 1.5 2.8 6 dB High LOS Assert Level RLOSLVL = 100Ω 15 25 LOSDH High LOS De-assert Level RLOSLVL = 100Ω 36 50 mVPP HSYH High LOS Hysteresis RLOSLVL = 100Ω 1.5 3.2 6 dB TOFF LOS Release Time Note 12 2 10 µs TON LOS Assert Time Note 12 2 10 µs B-3dB 3dB Bandwidth 2.0 GHz AV(Diff) Differential Voltage Gain 38 dB S21 Single-Ended Small-Signal Gain 26 32 mVPP mVPP dB Notes: 8. Amplifier in limiting mode. Input is a 200MHz square wave. 9. Deterministic jitter measured using 2.5Gbps K28.5 pattern, VID = 10mVPP. 10. Random jitter measured using 2.5Gbps K28.7 pattern, VID = 10mVPP. 11. This specification defines electrical hysteresis as 20log (LOS De-Assert/LOS Assert). The ratio between optical hysteresis and electrical hysteresis is found to vary between 1.5 and 2 depending upon the level of received optical power and ROSA characteristics. Based on that ratio, the optical hysteresis corresponding to the electrical hysteresis range 1dB-4.5 dB, shown in the AC characteristics table, will be 0.5dB-3dB Optical Hysteresis. 12. In real world applications, the LOS Release/Assert time can be strongly influenced by the RC time constant of the AC-coupling cap and the 50Ω input termination. To keep this time low, use a decoupling cap with the lowest value that is allowed by the data rate and the number of consecutive identical bits in the application (typical values are in the range of 0.001µF to 1.0µF). June 2009 9 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Typical Characteristics Laser Driver IBIAS vs. IBIASMAXSET 100 80 70 60 80 50 40 30 20 50 10 0 10 0.05 IBIASMON/IBIAS (mA) 90 0.04 70 0.03 60 0.02 40 30 0.01 20 0.00 0 0 50 100 150 200 250 300 350 400 450 500 0 0 IBIASMAXSET (µA) Modulation Gain 80 70 60 50 40 30 20 10 0 0 10 20 30 40 10 20 30 40 50 60 70 80 90 100 50 RBIASMAXSET (kΩ) IBIAS (mA) IMOD vs. RMODSET 100 90 IMOD (mA) IBIASMON Gain IBIAS vs. RBIASMAXSET 100 90 50 100 150 200 250 300 350 400 100 90 80 70 60 50 40 30 20 10 0 0 IMODSET (µA) 5 10 15 20 RMODSET (kΩ) 25 30 Post Amplifier IRSSI vs. RIN LOSA and LOSD vs. RLOSLVL 100 1400 1200 1000 800 10 600 400 200 0 1 0 50 100 150 VDIFF_IN (mVPP) June 2009 200 100 1000 10000 RLOSLVL (Ω) 10 100000 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Functional Characteristics Laser Driver June 2009 11 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Functional Characteristics (continued) Post Amplifier June 2009 12 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Functional Diagram The SY88232L is shown. For the SY88232AL, 50Ω terminations should be removed from DIN± and RIN±. June 2009 13 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL diode anode through a series resistor. MOD+ and MODare terminated to VCC with a resistor in series with an other resistor in parallel with an inductor. To minimize the components count, MOD+ and MOD- can simply be DC coupled to the cathode and anode of the laser respectively with a single series resistor without capacitor and without termination network. Functional Description Laser Driver The laser driver is comprised from a modulator, a bias circuit, and a digital APC loop. The driver features bias and modulation current monitoring functions, which can be configured for optical power monitoring. Post Amplifier The post amplifier detects and amplifies signals with data rates from DC up to 3.2Gbps, and amplitude as small as 5mVPP. To reduce the noise at the output of the post amplifier when the input signal is absent or lower than the minimum detectable level set by LOSLVL, a JAM pin is provided, which can be connected to LOS/SD output to turn off the output buffer when LOSS/SD is asserted. BIAS and Modulation Setting Bias and modulation currents are set by installing resistors from APCSET to ground and from MODSET to ground respectively or by applying a negative current at those pins. IBIAS variation versus RBIASMAXSET resistor and IBIASMAXSET , and IMOD variation versus RMODSET resistor and IMODSET are shown on page 10. BIASMAX A resistor between BIASMAX pin and ground sets the maximum bias the driver can sink. At normal operation, the bias current tracks the laser optical power through the laser monitoring photodiode and the APC loop to compensate for any power deviation from the nominal value set at the start of operation using APCSET. If for any failure (laser or photodiode degradation, open feedback circuit etc…) the APC loop keeps increasing the bias current to compensate for the low power indication, the bias current will stop increasing when it reaches BIASMAX value and continues to operate at that maximum value and APCFAULT is asserted. BIASMAX also sets the bias current when the circuit is operating in the open loop mode. Input Amplifier/Buffer Figure 1-d shows a simplified schematic of the input stage. The high-sensitivity of the input amplifier allows signals as small as 5mVPP to be detected and amplified. The input amplifier allows input signals as large as 1800mVPP. Small input signals below typically 12mVPP are linearly amplified with a typically 38dB differential voltage gain. For input signals larger than 12mVPP, the output signal is limited to typically 800mVPP. Output Buffer The post amplifier CML output buffer is designed to drive 50Ω lines and is internally terminated with 50Ω to VCC. Figure 1e shows a simplified schematic of the output stage. APC Loop Function At start up, with the driver enabled, TXDIS low and /TXEN low, the laser turns ON within a few microseconds and its back facet monitoring photodiode starts to generate a photocurrent proportional to the optical power. The photocurrent is fed back to the MD pin on the driver where it’s converted to a voltage. The conversion voltage is compared to APCSET on the driver. At equilibrium, the feedback voltage equals the APCSET voltage and the laser optical power reaches its nominal value. If the laser power deviates from its nominal value, the APC loop brings it back to its nominal setting. Loss-of-Signal The post amplifier generates a selectable chatter-free loss-of-signal (LOS) or signal detect (SD) open-collector TTL output as shown in Figure 2d. LOS/SD is used to determine that the input amplitude is too small to be considered as a valid input. When the LOSS function is selected (LOS/SD_SEL=1), LOS/SD asserts high if the input amplitude falls below the threshold set by LOSLVL and de-asserts low otherwise. IF SD function is selected (LOS/SD_SEL=0), LOS/SD asserts low if the input amplitude falls below the threshold set by LOSLVL and de-asserts high otherwise. LOS/SD can be fed back to the JAM input to maintain output stability under a loss of signal condition. Jam de-asserts low the true output signal without removing the input signals. Typically, 3dB LOS hysteresis is provided to prevent chattering. APC Loop Failure The APCFAULT is asserted High if the bias current reaches BIASMAX or if the APC loop counter reaches its minimum or its maximum counts. Loss/Signal Detect Selection A pin (LOS/SD_SEL) is provided to select between LOS (set to high) or SD (set to low) function. It also controls the internal circuitry of JAM input to follow LOS/SD selection. Interfacing the Driver with the Laser Diode As shown on the “Typical Application” drawing, MOD+ pin is AC coupled to the laser diode cathode through a series resistor and MOD- is AC coupled to the laser June 2009 14 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Loss-of-Signal-Level Set A programmable LOS/SD level set pin (LOSLVL) sets the threshold of the input amplitude detection. Connecting an external resistor between VCC and LOSLVL sets the voltage at LOSLVL. This voltage ranges from VCC to VCC -1.3V. The external resistor creates a voltage divider between VCC and VCC-1.3V, as shown in Figure 2c. RSSI Pin The post amplifier has an RSSI (Received Signal Strength) pin, which provides a current proportional to the amplitude of the signal at the input of the post amplifier from the ROSA. Install a resistor between this pin and GND to convert the current into a monitoring voltage proportional to the amplitude of the signal at the input of the post amplifier. The value of the resistor should be selected to keep the voltage at the RSSI pin under its limit of 1.2V to maintain RSSI linearity. Hysteresis The post amplifier provides typically 3dB LOS electrical hysteresis, which is defined as 20log (VINLOS-Assert / VINLOS-De-Assert). Since the relationship between the voltage out of the ROSA to optical power at its input is linear, the optical hysteresis will be typically half of the electrical hysteresis reported in the datasheet, but in practice the ratio between electrical and optical hysteresis is found to be within the range 1.5 to 1.8. Thus, 3dB electrical hysteresis will correspond to an optical hysteresis within the range 1.6dB to 2dB. June 2009 15 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Input and Output Stages (SY88232L)(1) Figure 1a. Simplified Driver Input Stage (1) Figure 1b. Simplified TXDIS Input Stage Figure 1d. Post Amplifier Input Stage Figure 1c. Simplified Driver Output Stage (1) Figure 1e. Post Amplifier Output Stage Note: 1. Applies for SY88232L only. For SY88232AL input terminations need to be removed. June 2009 16 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Interfacing DIN to Different Logic Drivers (SY88232L) (1) Figure 2a. Driving DIN with PECL Outputs (1) (1) Figure 2b. Driving DIN with CML Outputs Figure 2d. LOS Output Structure Figure 2c. LOSLVL Setting Circuit Note: 1. Applies for SY88232L only. For SY88232AL input terminations need to be added. June 2009 17 M9999-063009-A [email protected] or (408) 955-1690 Micrel, Inc. SY88232L/AL Package Information 32-Pin (5mm x 5mm) QFN MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2009 Micrel, Incorporated. June 2009 18 M9999-063009-A [email protected] or (408) 955-1690