SY88343BL 3.3V, 3.2Gbps CML Limiting Post Amplifier with High Gain TTL Loss-of-Signal General Description Features The SY88343BL low-power limiting post amplifier is designed for use in fiber-optic receivers. The device connects to typical transimpedance amplifiers (TIAs) that are AC-coupled. The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88343BL quantizes these signals and outputs CML-level waveforms. The SY88343BL operates from a single +3.3V power o o supply, over temperatures ranging from –40 C to +85 C. With its wide bandwidth and high gain, signals with data rates up to 3.2Gbps and as small as 5mVPP can be amplified to drive devices with CML inputs or ACcoupled CML/PECL inputs. The SY88343BL generates a high-gain loss-of-signal (LOS) open-collector TTL output. The LOS function has a high gain input stage for increased sensitivity. A programmable loss-of-signal level set pin (LOSLVL) sets the sensitivity of the input amplitude detection. LOS asserts high if the input amplitude falls below the threshold set by LOSLVL and de-asserts low otherwise. The enable bar input (/EN) de-asserts the true output signal without removing the input signal. The LOS output can be fed back to the /EN input to maintain output stability under a loss-of-signal condition. Typically, 3.5dB LOS hysteresis is provided to prevent chattering. Datasheet and support documentation can be found on Micrel’s web site at: www.micrel.com. • • • • • • • • • Single 3.3V power supply DC to 3.2Gbps operation Low-noise CML data outputs High gain LOS Chatter-free Open-Collector TTL Loss-of-Signal (LOS) output with internal 4.75kΩ pull-up resistor TTL /EN input Programmable LOS level set (LOSLVL) Ideal for multi-rate applications Available in a tiny 10-pin EPAD-MSOP and 16-pin QFN package Applications • • • • • APON, BPON, EPON, and GPON Gigabit Ethernet Fibre Channel OC-3 and OC-12/24 SONET/SDH High-gain line driver and line receiver Markets • • • • • FTTP Optical transceivers Datacom/Telecom Low-gain TIA interface Long reach FOM Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com February 2007 M9999-021707-B [email protected] or (408) 955-1690 Micrel, Inc. SY88343BL Typical Application Pin Configuration 10-Pin EPAD-MSOP (K10-2) 16-Pin QFN Ordering Information Part Number SY88343BLEY (1) SY88343BLEYTR SY88343BLMG (1) SY88343BLMGTR Package Type Operating Range Package Marking Lead Finish K10-2 Industrial 343B with Pb-Free bar line indicator Matte-Sn K10-2 Industrial 343B with Pb-Free bar line indicator Matte-Sn QFN-16 Industrial 343B with Pb-Free bar line indicator NiPdAu Pb-Free QFN-16 Industrial 343B with Pb-Free bar line indicator NiPdAu Pb-Free Note: 1. Tape and Reel. February 2007 2 M9999-021707-B [email protected] or (408) 955-1690 Micrel, Inc. SY88343BL Pin Description Pin Number MSOP Pin Number QFN Pin Name Type Pin Function /Enable: This input enables the outputs when it is LOW. Note that this input is internally connected to a 25kΩ pullup resistor and will default to logic HIGH state if left open. 1 15 /EN TTL Input: Default is HIGH. 2 1 DIN Data Input True data input. 3 4 /DIN Data Input Complementary data input. 4 6 VREF 5 14 LOSLVL Input Loss-of-Signal Level Set: a resistor from this pin to VCC sets the threshold for the data input amplitude at which LOS will be asserted. 2, 3, GND, Exposed Pad Ground Device ground. GND and Exposed pad are to be tied to the same ground plane. 6 10, 11 Reference Voltage: Bypass with 0.01µF low ESR capacitor from VREF to VCC to stabilize LOSLVL and VREF. 7 7 LOS Open-collector TTL output w/internal 4.75kΩ pull-down resistor 8 9 /DOUT CML Output Complementary data output. 9 12 DOUT CML Output True data output. 10 5, 8, 13, 16 VCC Power Supply February 2007 3 Loss-of-Signal: asserts high when the data input amplitude falls below the threshold set by LOSLVL. Positive power supply. M9999-021707-B [email protected] or (408) 955-1690 Micrel, Inc. SY88343BL Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) .................................. 0V to +7.0V Input Voltage (DIN, /DIN) ................................... 0 to VCC Output Current (IOUT) Continuous .....................................................+50mA Surge ...........................................................+100mA /EN Voltage ........................................................ 0 to VCC VREF Current ....................................... -800μA to +500μA LOSLVL Voltage .............................................. VREF to VCC Lead Temperature (soldering, 20sec.) .................. 260°C Storage Temperature (Ts) .....................-65°C to +150°C Supply Voltage (VCC) ............................ +3.0V to +3.6V Ambient Temperature (TA) .................. –40°C to +85°C Junction Temperature (TJ) ................ –40°C to +120°C (3) Junction Thermal Resistance QFN .......................................................................... o θJA (Still-Air) ............................................... 61 C/W o ψJB .............................................................. 38 C/W EPAD-MSOP o θJA (Still-Air) .............................................. 38 C/W o ψJB ............................................................. 22 C/W DC Electrical Characteristics o VCC = 3.0V to 3.6V; RL = 50Ω to VCC; TA = –40°C to +85°C; typical values at VCC = 3.3V, TA = 25 C. Symbol Parameter Condition Min Typ ICC Power Supply Current No output load VLOSLVL LOSLVL Voltage VOH CML Output HIGH Voltage VCC-0.020 VCC-0.005 VOL CML Output LOW Voltage VCC-0.475 VCC-0.400 VCC-0.350 VOFFSET Differential Output Offset ZO Single-Ended Output Impedance 40 ZI Single-Ended Input Impedance VREF VIHCMR 45 VREF Max Units 62 mA VCC V VCC V V +80 mV 50 60 Ω 40 50 60 Ω Reference Voltage VCC-1.48 VCC-1.32 VCC-1.16 V Input Common Mode Range GND+2.0 VCC V Max Units TTL DC Electrical Characteristics VCC = 3.0V to 3.6V; TA = –40°C to +85°C. Symbol Parameter Condition Min Typ VIH /EN Input HIGH Voltage VIL /EN Input LOW Voltage 2.0 IIH /EN Input HIGH Current VIN = 2.7V IIL /EN Input LOW Current VIN = 0.5V -0.3 mA VOH LOS Output HIGH Level VCC > 3.3V, IOH-MAX < 160µA 2.4 V VCC < 3.3V, IOH-MAX < 160µA 2.0 VOL LOS Output LOW Level IOL = +2mA VIN = VCC V 0.8 V 20 µA 100 µA V 0.5 V Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Thermal performance assumes the use of a 4-layer PCB. Exposed pad must be soldered (or equivalent) to the device’s most negative potential on the PCB. February 2007 4 M9999-021707-B [email protected] or (408) 955-1690 Micrel, Inc. SY88343BL AC Electrical Characteristics VCC = 3.0V to 3.6V; RL = 50Ω to VCC; TA = –40°C to +85°C. Symbol Parameter Condition tr , tf Output Rise/Fall Time (20% to 80%) tJITTER Min Typ Max Note 4 60 120 Deterministic Note 5 15 psPP Random Note 6 5 psRMS VID Differential Input Voltage Swing Figure 1 VOD Differential Output Voltage Swing VID > 18mVPP, Figure 1 TOFF LOS Release Time TON LOS Assert Time LOSAL Low LOS Assert Level 5 700 Units ps 1800 mVPP 800 950 mVPP 2 10 µs 2 10 µs RLOSLVL = 15kΩ, Note 8 3.1 mVPP LOSDL Low LOS De-assert Level RLOSLVL = 15kΩ, Note 8 4.8 mVPP HYSL Low LOS Hysteresis RLOSLVL = 15kΩ, Note 7 3.8 dB LOSAM Medium LOS Assert Level RLOSLVL = 5kΩ, Note 8 5.2 mVPP LOSDM Medium LOS De-assert Level RLOSLVL = 5kΩ, Note 8 7.5 11 mVPP HYSM Medium LOS Hysteresis RLOSLVL = 5kΩ, Note 7 2 3.2 4.5 dB LOSAH High LOS Assert Level RLOSLVL = 100Ω, Note 8 8 12 LOSDH High LOS De-assert Level RLOSLVL = 100Ω, Note 8 HYSH High LOS Hysteresis RLOSLVL = 100Ω, Note 7 B-3dB 3dB Bandwidth AV(Diff) Differential Voltage Gain S21 Single-ended Small-Signal Gain 3 2 mVPP 18 23 3.5 4.5 mVPP dB 2 GHz 32 38 dB 26 32 dB Notes: 4. Amplifier in limiting mode. Input is a 200MHz square wave. 5. Deterministic jitter measured using 3.2Gbps K28.5 pattern, VID = 10mVPP. 6. Random jitter measured using 3.2Gbps K28.7 pattern, VID = 10mVPP. 7. This specification defines electrical hysteresis as 20log (LOS De-assert/LOS Assert). The ratio between optical hysteresis and electrical hysteresis is found to vary between 1.5 and 2 depending upon the level of received optical power and ROSA characteristics. Based upon that ratio, the optical hysteresis corresponding to the electrical hysteresis range 2dB-4.5dB, shown in the AC characteristics table will be 1dB-3dB Optical Hysteresis. 8. See “Typical Operating Characteristics” for a graph showing how to choose a particular RLOSLVL for a particular LOS assert and its associated de-assert amplitude. February 2007 5 M9999-021707-B [email protected] or (408) 955-1690 Micrel, Inc. SY88343BL Typical Characteristics RLOSLVL (kΩ) February 2007 RLOSLVL (kΩ) 6 M9999-021707-B [email protected] or (408) 955-1690 Micrel, Inc. SY88343BL Functional Block Diagram Detailed Description The SY88343BL low-power limiting post amplifier operates from a single +3.3V power supply, over o o temperatures from –40 C to +85 C. Signals with data rates up to 3.2Gbps and as small as 5mVPP can be amplified. Figure 1 shows the allowed input voltage swing. The SY88343BL generates a LOS output allowing feedback to /EN for output stability. LOSLVL sets the sensitivity of the input amplitude detection. Input Amplifier/Buffer Figure 2 shows a simplified schematic of the SY88343BL’s input stage. The high-sensitivity of the input amplifier allows signals as small as 5mVPP to be detected and amplified. The input amplifier also allows input signals as large as 1800mVPP. Input signals are linearly amplified with a typical 38dB differential voltage gain. Since it is a limiting amplifier, the SY88343BL outputs typically 800mVPP voltage-limited waveforms for input signals that are greater than 12mVPP. Applications requiring the SY88343BL to operate with high-gain should have the upstream TIA placed as close as possible to the SY88343BL’s input pins. This ensures the best performance of the device. Loss-of-Signal The SY88343BL generates a chatter-free LOS opencollector TTL output with an internal 4.75kΩ pull-up resistor, as shown in Figure 4. LOS is used to determine that the input amplitude is large enough to be considered a valid input. LOS asserts high if the input amplitude falls below the threshold set by LOSLVL and de-asserts low otherwise. LOS can be fed back to the enable bar (/EN) input to maintain output stability under a loss of signal condition. /EN de-asserts the true output signal without removing the input signals. Typical, 3.5dB LOS hysteresis is provided to prevent chattering. Loss-of-Signal Level Set A programmable LOS level set pin (LOSLVL) sets the threshold of the input amplitude detection. Connecting an external resistor between VCC and LOSLVL sets the voltage at LOSLVL. This voltage ranges from VCC to VREF. The external resistor creates a voltage divider between VCC and VREF, as shown in Figure 5. Output Buffer The SY88343BL’s CML output buffer is designed to drive 50Ω lines. The output buffer requires appropriate termination for proper operation. An external Ω 50 resistor to VCC for each output pin provides this. Figure 3 shows a simplified schematic of the output stage. Hysteresis The SY88343BL provides typically 3.5dB LOS electrical hysteresis. By definition, a power ratio measured in dB 2 is 10log (power ratio). Power is calculated as V IN/R for an electrical signal. Hence, the same ratio can be stated as 20log (voltage ratio). While in linear mode, the electrical voltage input changes linearly with the optical power and therefore the ratios change linearly. Thus, the optical hysteresis in dB is half the electrical hysteresis in dB given in the data sheet. Since the SY88343BL is an electrical device; this data sheet refers to hysteresis in electrical terms. With 3.5dB LOS hysteresis, a voltage factor of 1.5 is required to assert or de-assert LOS. February 2007 7 M9999-021707-B [email protected] or (408) 955-1690 Micrel, Inc. SY88343BL Figure 1. VIS and VID Figure 2. Input Structure Figure 3. Output Structure Figure 4. LOS Output Structure Figure 5. LOSLVL Setting Circuit February 2007 8 M9999-021707-B [email protected] or (408) 955-1690 Micrel, Inc. SY88343BL Package Information 10-Pin EPAD-MSOP (K10-1) February 2007 9 M9999-021707-B [email protected] or (408) 955-1690 Micrel, Inc. SY88343BL 16-Pin (3mm x 3mm) QFN MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2005 Micrel, Incorporated. February 2007 10 M9999-021707-B [email protected] or (408) 955-1690