ASM3P2182A LCD Panel EMI Reduction IC Features The ASM3P2182A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of down stream clock and data dependent signals. The ASM3P2182A allows significant system cost savings by reducing the number of circuit board layers ferrite beads, shielding and other passive components that are traditionally required to pass EMI regulations. • FCC approved method of EMI attenuation. • Provides up to 15dB EMI reduction. • Generates a 1X low EMI spread spectrum clock of the input frequency. • Input frequency range: 25MHz to 210MHz. • Internal loop filter minimizes external components and board space. • Center spread. • 4 spread frequency deviation selections: ± 0.13% to ± 1.24%. • Low inherent Cycle-to-cycle jitter. The ASM3P2182A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation.’ • 3.3V Operating Voltage. • TTL or CMOS compatible inputs and outputs. • Low power CMOS design. • Supports notebook VGA and other LCD timing controller applications. • Available in 8-pin SOIC Package. Product Description The ASM3P2182A is a versatile spread spectrum frequency modulator designed specifically for a wide range of input clock frequencies from 25MHz to 210MHz. (Refer to Input Frequency and Modulation Rate Table). The ASM3P2182A can generate an EMI reduced clock from an OSC or a system generated clock. The ASM3P2182A offers a Center Spread clock and with a percentage deviation from ± 0.13% or ± 1.24%. S0 FS0 The ASM3P2182A uses the most efficient and optimized modulation profile approved by the FCC and is implemented in a proprietary all digital method. Applications The ASM3P2182A is targeted towards EMI management for memory and LVDS interfaces in mobile graphic chipsets and high-speed digital applications such as PC peripheral devices, consumer electronics, and embedded controller systems. VDD FS1 PLL Modulation CLKIN Crystal Oscillato r Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider ModOUT VSS ©2010 SCILLC. All rights reserved. JANUARY 2010 – Rev. 2 Publication Order Number: ASM3P2182/D ASM3P2182A Pin Configuration 8 FS1 CLKIN 1 7 FS0 GND 2 ASM3P2182A Pin Description Pin# Pin Name S1 3 6 VDD S0 4 5 ModOUT Type Description 1 CLKIN I Connect to externally generated clock signal. 2 GND P 3 S1 I 4 S0 I 5 ModOUT O Ground to entire chip. Spread range select. Digital logic input used to select frequency deviation (Refer to Spread Deviation Table). This pin has an internal pull-up resistor. Spread range select. Digital logic input used to select frequency deviation (Refer to Spread Deviation Table). This pin has an internal pull-up resistor. Spread spectrum low EMI output. 6 VDD P 7 FS0 I 8 FS1 I Power supply for the entire chip (3.3V). Frequency range select. Digital logic input used to select frequency range (Refer to Input Frequency and Modulation Rate Table). This pin has an internal pull-up resistor. Frequency range select. Digital logic input used to select frequency range (Refer to Input Frequency and Modulation Rate Table). This pin has an internal pull-up resistor. Input Frequency and Modulation Rate table FS1 (pin 8) FS0 (pin 7) Frequency Range 0 0 25MHz to 50MHz 0 1 50MHz to 103MHz 1 0 75MHz to 150MHz 1 1 160MHz to 210MHz Rev. 2 | Page 2 of 6 | www.onsemi.com ASM3P2182A Spread Deviation Selection table S1 S0 25 MHz 40 MHz 65 MHz Spreading Range (± %) 1 2 81 81 108 MHz MHz MHz 0 0 0.28 0.19 0.15 0.12 0.18 0 1 0.8 0.3 0.3 0.2 1 0 1.2 0.54 0.45 1 1 2.1 1.0 1.1 120 MHz 162 MHz 200 MHz 0.15 0.1 0.1 0.06 0.5 0.3 0.19 0.3 0.1 0.4 0.8 0.6 0.36 1.0 0.6 0.9 1.4 1.1 0.75 1.9 1.2 Notes: 1. Frequency Range- 50MHz to 103MHz 2. Frequency Range- 75MHz to 150MHz Absolute Maximum Ratings Symbol Rating Unit -0.5 to +4.6 V Input Voltage pin with respect to Ground VSS-0.5 to VDD+0.5 V VOUT Output Voltage pin with respect to Ground VSS-0.5 to VDD+0.5 V TSTG Storage temperature -55 to +125 °C VDD VIN Parameter Supply Voltage pin with respect to Ground Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C TDV Static Discharge Voltage (As per JEDEC STD22-A114-B) 2 KV Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Recommended Operating Conditions Parameter VDD Description Min Typ Operating Voltage 2.7 3.3 -40 TA Operating Temperature (Ambient Temperature) CL Load Capacitance CIN Input Capacitance 5 Rev. 2 | Page 3 of 6 | www.onsemi.com Max Unit 3.7 V +85 °C 15 pF pF ASM3P2182A DC Electrical Characteristics Symbol Parameter Min Typ Max Unit VIL Input low voltage GND – 0.3 0.8 V VIH Input high voltage 2.0 VDD + 0.3 V IIL Input low current -35 µA IIH Input high current 35 µA VOL Output low voltage (VDD = 3.3V, IOL = 20mA) 0.4 V VOH Output high voltage (VDD = 3.3V, IOH = 20mA) Dynamic supply current Normal mode (3.3V and 10pF loading) Static supply current 1 Standby mode ICC IDD VDD Operating voltage 2.5 V 8.46 12 0.6 2.7 3.3 Power up time (first locked clock cycle after power up) Clock out impedance tON ZOUT 17.78 mA mA 3.7 V 0.18 mS 50 Ω Note: 1. CLKIN pin is pulled low. AC Electrical Characteristics Symbol CLKIN ModOUT 1 tLH tHL 1 Parameter Min Typ Max Unit Input frequency 25 210 MHz Output frequency 25 210 MHz Output rise time (measured at 0.8V to 2.0V) 1.2 1.32 1.4 nS Output fall time (measured at 2.0V to 0.8V) 0.8 0.9 1.0 nS ±360 pS 55 % tJC Jitter (cycle to cycle) TD Output duty cycle 45 Note: 1. tLH and tHL are measured into a capacitive load of 15pF. Rev. 2 | Page 4 of 6 | www.onsemi.com 50 ASM3P2182A Package Information 8-lead (150-mil) SOIC Package H E D A2 A θ C D e A1 L B Dimensions Symbol Inches Min Max Millimeters Min Max A1 0.004 0.010 0.10 0.25 A 0.053 0.069 1.35 1.75 A2 0.049 0.059 1.25 1.50 B 0.012 0.020 0.31 0.51 C 0.007 0.010 0.18 0.25 D 0.193 BSC 4.90 BSC E 0.154 BSC 3.91 BSC e 0.050 BSC 1.27 BSC H 0.236 BSC 6.00 BSC L 0.016 0.050 θ 0° 8° 0.41 1.27 0° 8° Rev. 2 | Page 5 of 6 | www.onsemi.com ASM3P2182A Ordering Information Part Number Marking Package Temperature ASM3P2182AF-08ST ACV 8-Pin SOIC, TUBE, Pb Free 0°C to +70°C ASM3P2182AF-08SR ACV 8-Pin SOIC, TAPE & REEL, Pb Free 0°C to +70°C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Licensed under US patent #5,488,627, #6,646,463 and #5,631,920. Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes ON Semiconductor and without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. 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