ASM3P2474A Peak EMI Reducing Solution Features • The ASM3P2474A uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all digital method. Generates an EMI optimized clock signal at the output. • Integrated loop filter components. • Operates with a 3.3V Supply. • Operating current less than 6mA. • CMOS design. • Input frequency range : 13MHz to 30MHz • Generates a 1X and 2X low EMI spread The ASM3P2474A modulates the output of a single PLL in order to “spread” the bandwidth of a synthesized clock, and more importantly, decreases the peak amplitudes of its harmonics. This results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and most frequency generators. Lowering EMI by increasing a signal’s bandwidth is called ‘spread spectrum clock generation.’ spectrum clock of the input frequency. • Output Frequency Selection through FSEL pin • Frequency deviation : -1.5% (Typ) @25MHz Applications -1.5% (Typ) @50MHz • The ASM3P2474A is targeted towards all portable devices like MP3 players and digital still cameras. Available in 6L-TSOP (6L-TSOT-23) package. Product Description The ASM3P2474A is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock frequencies. The ASM3P2474A reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of all clock dependent signals. The ASM3P2474A allows significant system cost savings by reducing the number of circuit board layers, ferrite beads and shielding that are traditionally required to pass EMI regulations. Key Specifications Description Specification Supply voltages VDD = 3.3V ± 0.3V Cycle-to-Cycle Jitter ±200pS (Typ) Output Duty Cycle 45/55% (worst case) Modulation Rate Equation FIN/640 Frequency Deviation FSEL=0 -1.5% (Typ) @ 50MHz FSEL=1 -1.5% (Typ) @ 25MHz Block Diagram FSEL VDD PLL Modulation XIN / CLKIN XOUT Crystal Oscillator Frequency Divider Feedback Divider Phase Detector Loop Filter VCO Output Divider ModOUT VSS ©2010 SCILLC. All rights reserved. JANUARY 2010 – Rev. 2 Publication Order Number: ASM3P2474/D ASM3P2474A Pin Configuration (6L-TSOP Package) FSEL 1 XOUT 2 6 VSS ASM3P2474A XIN / CLKIN 3 5 ModOUT 4 VDD Pin Description Pin# Pin Name Type Description 1 FSEL I Selection Pin for 1X and 2X Output Frequency Options. Please refer to the table Frequency Selection Options for further details. 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 XIN / CLKIN I Crystal connection or external reference frequency input. This pin has dual functions. It can be connected either to an external crystal or an external reference clock. 4 VDD P Power supply for the entire chip. 5 ModOUT O Spread spectrum clock output. 6 VSS P Ground connection. Modulation Profile Specifications Description Specification Frequency Range 13MHz < CLKIN < 30MHz Modulation Equation FIN/640 Frequency Deviation FSEL=0 -1.5% (Typ) @ 50MHz FSEL=1 -1.5% (Typ) @ 25MHz Frequency Selection Options FSEL Pin 0 Input Frequency (MHz) 13-30 Output Frequency (MHz) 26-60 1 13-30 13-30 Rev. 2 | Page 2 of 7 | www.onsemi.com ASM3P2474A Absolute Maximum Ratings Symbol Parameter Rating Unit VDD, VIN Voltage on any pin with respect to Ground -0.5 to +4.6 V Storage temperature -65 to +125 °C TSTG Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C 2 KV Static Discharge Voltage TDV (As per JEDEC STD22- A114-B) Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. Operating Conditions Parameter VDD Description Min Max Unit Supply Voltage 3 3.6 V 0 TA Operating Temperature (Ambient Temperature) 70 °C CL Load Capacitance 15 pF CIN Input Capacitance 7 pF DC Electrical Characteristics Symbol Max Unit VIL Input low voltage Parameter VSS-0.3 Min Typ 0.8 V VIH Input high voltage 2.0 VDD+0.3 V IIL Input low current -35 µA IIH Input high current 35 µA IXOL XOUT output low current (@ 0.4V, VDD = 3.3V) 3 mA IXOH XOUT output high current (@ 2.5V, VDD = 3.3V) 3 mA VOL Output low voltage (VDD = 3.3V, IOL = 8mA) VOH Output high voltage (VDD = 3.3V, IOH = 8mA) IDD ICC VDD tON ZOUT 0.4 2.5 1 Static supply current Dynamic supply current (3.3V, 25MHz and no load and FSEL=1) Operating voltage 3.0 V 1.6 mA 4.0 mA 3.3 Power-up time (first locked cycle after power-up) Output impedance 45 Note: 1. XIN /CLKIN pin is pulled low. Rev. 2 | Page 3 of 7 | www.onsemi.com V 3.6 V 5 mS Ω ASM3P2474A AC Electrical Characteristics Symbol CLKIN ModOUT Parameter Output frequency fd Frequency Deviation fd Frequency Deviation 1 tLH tHL 1 Min Max Unit 13 30 MHz FSEL = 0 26 60 FSEL = 1 13 30 Input frequency Output Frequency = 13MHz -1.8 Output Frequency = 30MHz -0.9 Output Frequency = 26MHz -1.8 Output Frequency = 60MHz -0.9 Output rise time (measured from 0.8 to 2.0V) 0.4 Output fall time (measured at 2.0V to 0.8V) 0.3 tJC Jitter (cycle-to-cycle) tD Output duty cycle Typ % % 0.85 1.1 nS 0.7 0.9 nS ±200 45 50 pS 55 Note: 1. tLH and tHL are measured into a capacitive load of 15pF. Typical Crystal Specifications Fundamental AT cut parallel resonant crystal Nominal frequency 25MHz Frequency tolerance ± 30 ppm or better at 25°C Operating temperature range -25°C to +85°C Storage temperature -40°C to +85°C Load capacitance(CP) 18pF Shunt capacitance 7pF maximum ESR 25 Ω Note: Note: CL is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency. Typical Crystal Interface Circuit R Crystal CL Rx CL CL = 2*(CP – CS), Where CP = Load capacitance of crystal CS = Stray capacitance due to CIN, PCB, Trace etc. Rev. 2 | Page 4 of 7 | www.onsemi.com MHz % ASM3P2474A Typical Application Schematic VDD C1 0.1µF C2 2.2µF VDD ASM3P2474A Rs ModOUT VSS Rev. 2 | Page 5 of 7 | www.onsemi.com ModOUT Clock ASM3P2474A Package Information 6L-TSOP Package Dimensions Symbol Inches Min A Millimeters Max Min Max 0.04 1.00 A1 0.00 0.004 0.00 0.10 A2 0.033 0.036 0.84 0.90 b 0.012 0.02 0.30 0.50 H 0.005 BSC 0.127 BSC D 0.114 BSC 2.90 BSC B 0.06 BSC 1.60 BSC e 0.0374 BSC 0.950 BSC C 0.11 BSC 2.80 BSC L 0.0118 0.02 0.30 0.50 θ 0° 4° 0° 4° Rev. 2 | Page 6 of 7 | www.onsemi.com ASM3P2474A Ordering Information Part Number ASM3P2474AF-06OR Marking Package Type Temperature W4L 6L-TSOP (6L-TSOT-23), TAPE & REEL, Pb Free 0°C to +70°C A “microdot” placed at the end of last row of marking or just below the last row toward the center of package indicates Pb-free. Licensed under US Patent #5,488,627 and #5,631,921. Note: This product utilizes US Patent #6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003. are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes ON Semiconductor and without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. 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