SANYO ENA1159

Ordering number : ENA1159
Bi-CMOS IC
LV5050NV
DC / DC Converter Controller
Overview
The LV5050NV is a high efficiency DC/DC converter controller IC adopting a synchronous rectifying system.
Incorporating numerous functions on a single chip with easy external setting, it can be used for a wide
variety of applications. This device is optimal for use in internal power supply systems which are used in electronic
devices, LCD-TVs, DVD recorders, etc.
Functions
• Step-down DC/DC converter controller with 1-channel
• Input UVLO circuit,
• Built-in over current detection function
• Built-in soft-start/soft-stop function
• Built-in start-up delay circuit
• Built-in output voltage monitor function (Under voltage protection with power good and timer latch)
• Synchronized operation is possible between different devices.
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Supply voltage
Symbol
Conditions
Ratings
Unit
VIN
Allowable power dissipation
Pd max
*
18
V
800
mW
150
°C
Operating temperature
Topr
-20 to 85
°C
Storage temperature
Tstg
-55 to +150
°C
Junction temperature
Tj
*: Mounted on a specified: 114.3mm × 76.1mm ×1.6 mm, glass epoxy board.
Continued on next page.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
40208 MS 20080356-S00007 No.A1159-1/7
LV5050NV
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
Unit
Allowable terminal voltage *2
1
HDRV,CBOOT
28
V
2
Between
6.5
V
V
HDRV, CBOOT and SW
3
VIN, ILIM, RSNS, SW, PGOOD
18
4
VLIN5, VDD, LDRV
6.5
V
5
COMP, FB, SS, UV_DELAY
VLIN5+0.3
V
TD, CT, CLKO
*2: The Allowable Terminal Voltage, the SGND+PGND pin becomes a standard except for No.2 of the allowable terminal voltage about No.2 of
the allowable terminal voltage, the SW pin becomes a standard.
Recommended Operating Condition at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
Supply voltage
VIN
VIN and VLIN5 pins opens
7.5 to 16
V
Supply voltage
VIN
VIN and VLIN5 pins shorted
4.5 to 6.0
V
Electrical Characteristics at Ta = 25°C, VIN=12V, Unless especially specified
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
System
Reference voltage for comparing
VREF
Supply current 1
ICC1
0.818
TD=5V (Except for the Ciss charge)
Supply current 2
ICC2
TD=0V
5V supply voltage
VLIN5
IVIN5=0 to 10mA
Over-current sense comparator offset
VCLOS
Over-current sense reference current
ICL
0.826
0.834
2
4
mA
mA
0.3
0.6
1.2
4.75
5.00
5.25
-5
VIN=10 to 14V
7.47
V
V
+5
mV
8.30
9.13
µA
120
150
-5.0
source
Leading edge pulse blank time
TLEPB
Soft start source current
ISSSC
TD=5V
-2.0
-3.5
Soft start sink current
ISSSK
TD=0V
0.5
2.0
Soft start clamp voltage
VSST0
When the voltage of the SS pin operating
1.2
1.6
2.0
UV_DELAY source current
ISCUVD
UV_DELAY=2V
-6.1
-8.6
-12.0
UV_DELAY sink current
ISKUVD
UV_DELAY=2V
0.5
2
UV_DELAY threshold voltage
VUVD
1.9
2.4
3.0
UV_DELAY operating voltage
VUVP
92
97
VUVP detection hysteresis
∆VUVP
Output discharge transistor ON resistance
VSWON
100% at VFB=VREF
87
10
V
µA
mA
1.5
5
µA
mA
V
%
%
20
Ω
10
µA
Output part
CBOOT leakage current
ICBOOT
HDRV LDRV source current
ISCDRV
VCBOOT=VSW + 6.5V
0.5
1.0
A
HDRV LDRV sink current
ISKDRV
0.5
1.0
A
HDRV lower ON resistance
RHDRV
IOUT=500mA
0.5
1.5
3.0
LDRV lower ON resistance
RLDRV
IOUT=500mA
0.5
1.5
3.0
Ω
Synchronous ON prevention dead time 1
Tdead1
LDRV OFF→HDRV ON
50
70
120
ns
Synchronous ON prevention dead time 2
Tdead2
HDRV OFF→LDRV ON
70
120
280
ns
Ω
Continued on next page.
No.A1159-2/7
LV5050NV
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Oscillator
Oscillation freaquency
fosc
CT=130pF
Oscillation frequency range
foscop
Maximum ON duty
DON max
CT=130pF
Minimum ON time
TON min
CT=130pF
Upper-side voltage saw- tooth wave
VsawH
fOSC=300kHz
1.5
2
2.6
V
Lower-side voltage saw-tooth wave
VsawL
fOSC=300kHz
0.8
1
1.2
V
280
330
250
83
90
380
kHz
1100
kHz
79
100
%
ns
Error Amplifier
Error amplifier input current
IFB
-190
-100
-50
nA
COMP pin source current
ICOMPSC
-150
-100
-50
µA
COMP pin sink current
ICOMPSK
18
100
150
µA
Error amplifier gm
gm
500
700
900
umho
0.5
1.0
Logic output
Power Good low level source current
IpwrgdL
VPGOOD=0.4V
Power Good high level leakage current
IpwrgdH
VPGOOD=12V
10
µA
Power Good operation voltage
Vpwrgd
100% at VFB=VREF
87
92
97
%
TP pin threshold voltage
VONTD
When the voltage of the TD pin rises
1.5
2.4
3.5
V
TP pin high impedance voltage
VTDH
When VIN and VLIN5 pins are set to open
TD pin charge source current
ITDSC
TD pin discharge sink current
ITDSK
CLKO high level voltage
VCLKOH
ICLK10=1mA
CLKO low level voltage
VCLKOL
ICLK10=1mA
mA
4.5
5.0
5.5
V
-2.0
-3.5
-5.0
µA
0.2
1.0
mA
0.7V5LIN
V
0.3V5LIN
V
Protection function
VIN UVLO release voltage
VUVLO
UVLO Hysteresis
∆VUVLO
UVLO released input voltage
VINVUVLO
3.5
4.1
4.8
5.5
4.3
mA
µA
0.4
6.3
No.A1159-3/7
LV5050NV
Package Dimensions
unit : mm (typ)
3179C
Pd max - Ta
Allowable power dissipation, Pd max -- mW
1000
6.5
0.5
6.4
11
4.4
20
1
10
0.65
0.15
0.22
1.5max
(1.3)
(0.33)
Specified board: 114.3×76.1×1.6mm3
glass epoxy board
800
600
416
400
200
0
-20
0
20
40
60
80 85
100
0.1
Ambient temperature, Ta -- °C
SANYO : SSOP20(225mil)
Pin Assignment
SW 1
20 PGND
HDRV 2
19 LDRV
18 VDD
CBOOT 3
RSNS 5
(NC) 6
LV5050NV
VLIN5 4
17 SGND
16 COMP
15 FB
14 UV_DELAY
ILIM 7
TD 8
13 PGOOD
SS 9
12 CT
11 CLKO
VIN 10
Top view
No.A1159-4/7
CH1
Output
TD
SS
FB
COMP
UV
0.87Vref
3.5µA
3.5µA
PGOOD
POR
UV
SD
SSEND
2.4V
1.6V
Vref
error amp
CONT1
SSEND
Vref
0.8V
BG
refrrence
UV_DELAY
8.6µA
4.2V
/ 3.8V
UV_timeout
POR
PWM comp
Current
bias
Voltage
and
Current
generator
CONT
2.4V
0 deg
Corrective
ramp
IREF
BG
Q
Q
R
S
SD
PWM logic
SKIP control
POR
0
deg
CT
OSC
300kHz
Q
Q
5V
0V
SGND
CLKO
SYNC. pulse out
ISENSE
Amp
ILIM
Comp
5V REG
(Allways ON)
Shoot through
protection
sequencer
S
R
Shifter
& latch
Active
discharge
Rdson=
15Ω
Vref
8.6µA
Internal
Bias
PGND
LDRV
VDD
SW
HDRV
CBOOT
RSNS
ILIM
VLIN5
VIN
CH1
Output
Input Power
Supply
LV5050NV
Block Diagram
No.A1159-5/7
LV5050NV
Pin Functions
Pin No.
1
Pin name
SW
Description
This Pin is connected with the switching node. A source of an external upper side MOSFET and a drain of
an external lower side MOSFET are connected with this pin. This pin becomes the return current path of the
HDRV pin. This pin is connected with a transistor drain of the discharge MOSFET for SOFT STOP in the IC
(typical 15Ω). Also, this pin has the signal output part for the short through prevention of both the upper and
lower MOSFETs.
When this terminal voltage becomes 1V or less for PGND, the LDRV pin is turned on.
2
HDRV
3
CBOOT
The gate drive pin for an external upper side MOSFET.
The bootstrap capacity connection pin. The gate drive power of upper MOSFET is provided by this pin.
This pin is connected to the VDD pin through a diode and is connected to the SW pin through the bootstrap
capacity.
4
VLIN5
The output pin of an internal regulator of 5V. the current is provided by the VIN pin.
Also, power supply of the control circuit in the IC is provided by this pin.
Connect an output capacitor of 4.7µF between this pin and SGND.
A regulator of 5V operates, even if the IC is in the standby state.
This pin is monitored by an UVLO function and the IC starts by the voltage of 4.0V or more
(the IC is off by the voltage of 3.8V or less.)
5
RSNS
The input pin of the over current detection comparator / the current detection amplifier
To detect resistance, this pin is connected to the under side of a resistor for the current detection between
the VIN pin and the DRAIN of the upper MOSFET. Also, to use the ON resistance of MOSFET for the
current detection, connect this pin to the SOURCE of the upper MOSFET. To prevent the common
impedance of main current to the detection-voltage, this pin is connected by independent wiring.
6
NC
No connection.
7
ILIM
The pin to set the trip point for over current detection.
Since the SINK current source of 8.3µA (ILIM) is connected in the IC, the over-current detection voltage
(ILIM × RLIM) is generated by connecting a resistor RLIM between this pin and the VIN pin.
The over-current is detected by comparing the voltage between the VIN pin and the ILIM pin to the current
detection resistance RSNS or both end voltage of the upper MOSFET.
8
TD
Start-up delay pin.
The time until the IC starts after releasing POR is set by connecting a capacitor between this pin and
SGND.
After releasing POR, an external capacitor is charged up by the constant current source of 3.5µA in the IC.
When this terminal voltage becomes 2.4V or more, The IC starts. Also, when this terminal voltage
becomes 2.4V or less, The IC becomes the standby state. If external capacitor is not connected,
the IC instantly starts after releasing POR.
9
SS
The pin to connect a capacitor for soft start. After releasing POR, when the voltage of the TD pin becomes
2.4V or more, the SS pin is charged by an internal constant current source of 3.5µA.
Since this pin is connected to the positive input of the transformer conductance amplifier, the ramp-up wave
form of the SS pin becomes the ramp-up wave form of the output.
During POR operations and after the UV_DELAY time-out, the SS pin is discharged
10
VIN
11
CLKO
Power supply pin of the IC
The clock output pin. The clock that synchronized to the oscillation waveform of the CT pin is output.
To synchronize two or more LV5050NVs, the CLKO pin of the device that becomes a master is connected
to the CT pin of the device that becomes a slave. When two or more the devices are synchronized and the
start-up timing is changed by using the Td pin between each device, the earliest start-up device is
determined as the master.
12
CT
The pin to connect an external capacitor for the oscillator. Connect a capacitor between this pin and SGND.
When a capacitor of 130pF is connected between this pin and GND, the oscillation frequency can be set up
by 330kHz. Also, this pin is applied by an external clock signal.
The PWM operation is performed by the frequency of applied clock signal.
When an external clock signal is applied, the rectangular wave of 0V in low level and from 3.3V to 5V in
high level is applied. The rectangular wave source needs the fan-out of 1mA or more.
13
PGOOD
The power good pin. The open drain MOSFET of the withstand of 28V is connected in the IC.
When the output voltage of channel 1 is less than -13% for the setup voltage, the low level is output.
This pin has hysteresis of about (VREF × 1.5%).
Continued on next page.
No.A1159-6/7
LV5050NV
Continued from preceding page.
Pin No.
14
Pin name
UV_DELAY
Description
UVP DELAY pin
By connecting a capacitor between this pin and SGND, the time until the IC latches off after detecting the
UVP state can be set. Also, after channel 1 terminated the soft-start function, when the output voltage
becomes -80% or less for the setup voltage, an external capacitor is charged by the constant current
source of 8.6µA in the IC.
When this terminal voltage becomes 2.4V or more, the IC is latched off.
If an external capacitor is not connected, the IC is instantly latched off after detecting the UVP state.
Also, when this pin is shorted to GND, the UV_DELAY function is not operated.
15
FB
Feed back input pin. The minus terminal (-) of the trans conductance amplifier is connected.
The voltage generated when the output voltage was divided by a resistor is input into this pin.
The converter operates so that this pin becomes an internal reference voltage (VREF=0.836V).
Also, this pin is monitored by the comparators UVP and OVP.
When the voltage of this pin becomes less than 87% of the set voltage, the PGOOD pin is low level.
A timer of the UV_DELAY function operates. Also, when the voltage of this pin becomes more than 117% of
the set voltage, the IC latches off.
16
COMP
The pin to connect a capacitor and a resistor for phase compensation.
The output of an internal transformer conductance amplifier is connected.
Connect an external phase compensation circuit between this pin and SGND.
17
SGND
The system ground of the IC. The reference voltage is generated based on this pin.
This pin is connected to the power supply system ground.
18
VDD
Power supply pin for the gate drive of an external lower-side MOSFET.
This pin is connected to the VLIN5 pin through a filter.
19
LDRV
The gate drive pin of an external lower-side MOSFET.
This pin has the signal input part for prevention of short-through of both the upper and lower MOSFETs.
When the voltage of this pin becomes less than 1V, the HDRV pin is turned on.
20
PGND
Power ground pin. This pin becomes the return current path of the LDRV pin.
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
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semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
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limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
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This catalog provides information as of April, 2008. Specifications and information herein are subject
to change without notice.
PS No.A1159-7/7