UNISONIC TECHNOLOGIES CO., LTD 83CXXX Preliminary CMOS IC 4-PIN µP VOLTAGE MONITORS WITH MANUAL RESET INPUT DESCRIPTION The UTC 83CXXX is a microprocessor supervisory circuit. It has an active-low RESET and push-pull outputs. The circuit can assert a reset signal as long as the VCC power supplies voltage dropping below a preset threshold and it keep the reset signal for at least 140ms when VCC has risen above the reset threshold. The reset threshold can be operated with multi-supply voltages. The UTC 83CXXX provides the circuit with perfect reliability and low cost through eliminating external components and adjustments when applied with +5V, +3.3V, +3.0V power supply The UTC 83CXXX also provide a de-bounced manual reset input. The reset comparator can work despite of fast transients on VCC, and the outputs are guaranteed to be in the right logic state while VCC is down to 1V. In applications, the UTC 83CXXX is suitable for computers, intelligent instruments, controllers, critical microprocessor and microcomputer power monitors, portable or battery-powered equipment, automotive. FEATURES * +3V, +3.3V, and +5V power-supply voltages * Full temperature rated * Supply current: 5µA * Available in configuration: push-pull RESET output * 140ms minimum power-on reset pulse width * Guaranteed reset to VCC = +1V * Power supply transient Immunity * Eliminating external components * Manual reset input * Halogen Free ORDERING INFORMATION Ordering Number Package 83CXXXG-AD4- R SOT-143 Note: XXX: Output Voltage, refer to Marking Information. Packing Tape Reel (1) R: Tape Reel 83CXXXG-AD4-R (1) Packing Type (2) Package Type (2) AD4: SOT-143 (3) Halogen Free (3) G: Halogen Free (4) Output Voltage Code (4) XXX: Refer to Marking Information www.unisonic.com.tw Copyright © 2009 Unisonic Technologies Co., Ltd 1 of 6 QW-R502-353.a 83CXXX Preliminary CMOS IC MARKING INFORMATION PACKAGE VOLTAGE CODE SOT-143 B: 2.93V C: 3.08V PIN CONFIGURATION PIN DESCRIPTION PIN NO 1 PIN NAME GND 2 RESET 3 MR 4 VCC MARKING DESCRIPTION Ground RESET output remains low while VCC is below the reset threshold, and for at least 140ms after VCC rises above the reset threshold. Manual reset input. A logic low on MR asserts reset. Reset remains asserted as long as MR is low and for at least 140ms after MR returns high, This active-low input has an internal 20kΩ pull-up resistor. It can be driven from a TTL or CMOS-logic line, or shorted to ground with a switch. Leave open if unused. Supply voltage (+5V, +3.3V, +3.0V) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 6 QW-R502-353.a 83CXXX Preliminary CMOS IC ABSOLUTE MAXIMUM RATING PARAMETER Terminal Voltage (respect to GND) Push-Pull RESET Voltage Open Drain Input Current SYMBOL VCC VRESET ICC RATINGS -0.3 ~ +6.0 -0.3 ~ (VCC+0.3) -0.3 ~ +6.0 20 UNIT V V V mA mA 20 Output Current ( RESET ) Power Dissipation (Ta =+70°C) 320 mW PD Derated Above 70°C 4 mW/°C Operating Temperature TOPR -40~+105 °C Storage Temperature Range TSTG -65~+150 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. IOUT ELECTRICAL CHARACTERISTICS (VCC = full range, Ta =-40°C~+105°C. Typical values are at Ta=25°C, unless otherwise specified) 83C293 (2.93V) (VCC= 3.3V) PARAMETER VCC Range SYMBOL VCC Low VIH VIL VTH ICC IOL Ta=25°C VCC<3.6V, Ta=-40°C~+105°C VCC=2.5V, VRESET = 0.5 V High IOH VCC= 3.3V, VRESET = 2.8 V MR Input Threshold Reset Threshold Supply Current RESET Output Current (push-pull active low) MR Pull-up Resistance Reset Threshold Tempco VCC to Reset Delay Reset Active Timeout Period MR Minima Pulse Width MR Glitch Immunity (Note ) MR to Reset Propagation Delay 83C308 (3.08V) (VCC=3.3V) PARAMETER VCC Range VCC>VTH(MAX) VCC= VTH~(VTH-100mV) VCC= VTH(MAX) SYMBOL TEST CONDITIONS Ta=0°C~+70°C Ta=-40°C~+105°C Low High IOH VCC= 3.3V, VRESET = 2.8 V VCC>VTH(MAX) MR Pull-up Resistance Reset Threshold Tempco VCC to Reset Delay VCC= VTH ~ (VTH-100mV) Reset Active Timeout Period VCC= VTH(MAX) tMR MR Minima Pulse Width MR Glitch Immunity (Note ) tMD MR to Reset Propagation Delay Note: “Glitches” of 100ns or less typical values will not generate a reset pulse. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2.871 2.93 5 MAX 5.5 5.5 0.825 2.988 8 8 3 UNIT V V V V V μA mA mA 30 kΩ ppm/°C 520 ms μs ns μs MAX 5.5 5.5 8 UNIT V V V V V μA mA 3 mA 140 tMD Ta=25°C VCC<3.6V, Ta=-40°C~+105°C VCC=2.5V, VRESET = 0.5 V Reset Threshold Supply Current TYP tMR VIH VIL VTH ICC IOL MR Input Threshold MIN 1.0 1.2 1.98 10 VCC RESET Output Current (push-pull active low) TEST CONDITIONS Ta=0°C~+70°C Ta=-40°C~+105°C 20 70 15 310 10 100 0.5 MIN 1.0 1.2 1.98 TYP 3.018 3.08 5 10 140 20 70 15 310 10 100 0.5 0.825 3.141 8 30 kΩ ppm/°C 520 ms μs ns μs 3 of 6 QW-R502-353.a 83CXXX Preliminary CMOS IC DETAILED DESCRIPTION The UTC 83CXXX have a push-pull output stage. A microprocessor’s (µP’s) reset input initiates the microprocessor in a known state. The UTC 83CXXX assert a reset signal as long as the VCC power supply voltage drops below a preset threshold. When VCC has risen over the reset threshold, the devices keep the signal for at least 140ms. They have a function of preventing code-execution errors during power-up, power-down, or brownout conditions by resetting. See the manual reset input section if you want to see function that the manual reset input ( MR ) can initiate a reset. Manual Reset Input Many products based on microprocessor need manual reset characteristic, allowing them to initiate a reset. Reset keeps working while MR is low, and when MR returns high it is for the reset Active Timeout Period (tRP). TTL or CMOS-logic levels, or with open-drain / collector outputs both can drive MR . MR will be started by a logic low on manual reset .Because the input has a build-in 20kΩ pull-up resistor; it can be left open if it is not used. We can put a 0.1µF capacitor from MR to ground if MR is driven from long cables or the device is used in a noisy environment strengthening additional noise capacity. Connecting a normally open momentary switch from MR to ground to create a manual-reset function, and external debounce circuitry is not required. VCC UTC 83CXXX RESET R1= 100K GND Figure 1. RESET Valid to VCC = Ground Circuit UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 6 QW-R502-353.a 83CXXX Preliminary CMOS IC APPLICATION INFORMATION 1. Ensuring a Valid Reset Output Down to VCC = 0 The UTC 83CXXX RESET output no more sinks current when VCC drops below 1V—it becomes an open circuit. Therefore, high-impedance CMOS logic input connected to RESET can drift to undetermined voltages. This presents no problem in most applications since most microprocessors and other circuitry can’t be operated when VCC is under 1V. In figure 1, however, in applications where RESET must be valid down to 0V. In order to causes any stray leakage currents to flow to ground, adding a pull-down resistor to RESET , that holding RESET low. (R1’s value is not critical and the value 100kΩ is large enough not to load RESET and small enough to pull RESET to ground). 2. Benefits of Highly Accurate Reset Threshold Most microprocessor supervisor ICs has reset threshold voltages between 5% and 10% below the value of nominal supply voltages. If using ICs rated at only the nominal supply ±5%, this leaves an uncertainty zone where the supply is between 5% and 10% low and where the reset may or may not be asserted. The UTC 83C308 with high accuracy ensure that the reset is asserted closely to 5% limit and long before the supply has declined to 10% below nominal. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 6 QW-R502-353.a 83CXXX Preliminary CMOS IC TYPICAL APPLICATION CIRCUIT VCC VCC VCC UTC 83CXXX µP RESET RESET INPUT MR GND GND UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 6 QW-R502-353.a