LTC3499/LTC3499B 750mA Synchronous Step-Up DC/DC Converters with Reverse-Battery Protection U FEATURES DESCRIPTIO ■ The LTC®3499/LTC3499B are synchronous, fixed frequency step-up DC/DC power converters with integrated reverse battery protection that protect and disconnect the devices and load when the battery polarity is reversed while delivering high efficiency in a small (3mm × 3mm) DFN package. True output disconnect eliminates inrush current and allows zero load current in shutdown. ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Reverse-Battery Protection for DC/DC Converter and Load High Efficiency: Up to 94% Generates 5V at 175mA from a 1.8V Input Operates from 1.8V to 5.5V Input Supply 2V to 6V Adjustable Output Voltage Inrush Current Controlled During Start-Up Output Disconnnect in Shutdown Low Noise 1.2MHz PWM Operation Tiny External Components Automatic Burst Mode® Operation (LTC3499) Continuous Switching at Light Loads (LTC3499B) Overvoltage Protection 8-Lead (3mm × 3mm × 0.75mm) DFN and MSOP Packages U APPLICATIO S ■ ■ ■ ■ The devices feature an input voltage range of 1.8V to 5.5V enabling operation from two alkaline or NiMH batteries. The switching frequency is internally set at 1.2MHz allowing the use of tiny surface mount inductors and capacitors. A minimal number of external components are required to generate output voltages ranging from 2V to 6V. The LTC3499 features automatic Burst Mode operation to increase efficiency at light loads, while the LTC3499B features continuous switching at light loads. The soft-start time is externally programmable through a small capacitor. Anti-ring circuitry reduces EMI emissions by damping the inductor in discontinuous mode. The devices feature <1µA shutdown supply current, integrated overvoltage protection and are available in both 8-pin (3mm × 3mm) DFN and 8-pin MSOP packages. Medical Equipment Digital Cameras MP3 Players Handheld Instruments , LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. U TYPICAL APPLICATIO Battery Current vs VIN Two AA Cells to 5V Synchronous Boost Converter SHDN = 0V VOUT = 0V 4.7µH + 2.2µF VIN SW LTC3499 ON OFF 1M VC 100k 330pF VOUT 5V 175mA VOUT SHDN 10µF FB SS GND BATTERY CURRENT (µA) VIN 1.8V TO 3.2V 1.0 0.5 0 –0.5 324k 0.01µF –1.0 –6 3499 TA01 –4 –2 0 2 4 VIN AND SW VOLTAGE (V) 6 3499 TA01b 3499f 1 LTC3499/LTC3499B W W U W ABSOLUTE AXI U RATI GS (Note 1) VIN to GND ..................................................... – 7V to 7V VOUT to GND ............................................... – 0.3V to 7V SW to VOUT .................................................... – 7V to 1V SW to GND DC .............................................................. –7V to 7V Pulsed < 100ns .......................................... –7V to 8V SHDN to GND ................................................ – 7V to 7V FB, SS to GND ............................................ – 0.3V to 7V Operating Temperature Range (Notes 3, 4) ........................................ –40°C to 85°C Storage Temperature Range ................ – 65°C to 125°C Lead Temperature (Soldering, 10 sec) MSOP .............................................................. 300°C U W U PACKAGE/ORDER I FOR ATIO TOP VIEW SHDN 1 8 TOP VIEW VC 7 FB 3 6 VOUT 4 5 SS VIN 2 SW GND 9 SHDN VIN SW GND 8 7 6 5 1 2 3 4 VC FB VOUT SS MS8 PACKAGE 8-LEAD PLASTIC MSOP DD PACKAGE 8-LEAD PLASTIC DFN TJMAX = 125°C, θJA = 45°C EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB TJMAX = 125°C, θJA = 160°C/W ORDER PART NUMBER DD PART MARKING LTC3499EDD LTC3499BEDD LBRB LCDZ ORDER PART NUMBER LTC3499EMS8 LTC3499BEMS8 MS8 PART MARKING 1250 LTBRC LTCFB Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.4V, VOUT = 5V, SHDN = 2.4V, TA = TJ unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 1.6 1.8 V 6 V Supply VIN Minimum Start-Up Voltage ● VOUT Output Voltage Adjust Range ● 2 VFB FB Voltage ● 1.195 IFB FB Input Current VFB = 1.22V IVIN VIN Quiescent Current No Output Load ISD VIN Quiescent Current in Shutdown IBURST Quiescent Current – Burst Mode Operation 1.220 1.245 V 3 50 nA 300 600 µA SHDN = 0V, VOUT = 0V 0.1 1 VIN Current at 2.4V (LTC3499 Only) VOUT Current at 5V (LTC3499 Only) 20 1.5 ● µA µA µA 3499f 2 LTC3499/LTC3499B ELECTRICAL CHARACTERISTICS The ● denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 2.4V, VOUT = 5V, SHDN = 2.4V, TA = TJ unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS INMOS NMOS Switch Leakage VSW = 6V 0.1 5 µA IPMOS PMOS Switch Leakage VOUT = 6V, VSW = 0V 0.1 5 µA RNMOS NMOS Switch On Resistance VOUT = 3.3V VOUT = 5V 0.45 0.4 Ω Ω RPMOS PMOS Switch On Resistance VOUT = 3.3V VOUT = 5V 0.58 0.45 Ω Ω ILIM NMOS Current Limit tDLY, ILIM Current Limit Delay to Output DMAX ● 0.75 Maximum Duty Cycle ● 80 DMIN Minimum Duty Cycle ● fOSC Frequency Accuracy ● GmEA Error Amplifier Transconductance 40 µmhos ISOURCE Error Amplifier Source Current –5 µA ISINK Error Amplifier Sink Current ISS SS Current Source VOV VOV(HYST) Note 2 A 60 ns 85 % 0 1 1.2 1.4 % MHz 5 µA –3 µA VOUT Overvoltage Threshold 6.8 V VOUT Overvoltage Hysteresis 400 mV VSS = 1V Shutdown VSHDN(LOW) SHDN Input Low VSHDN(HIGH) SHDN Input High ISD SHDN Input Current ● Measured at SW ● 0.2 V 1 µA 1.2 V Reverse Battery IVOUT,REVBATT VOUT Reverse-Battery Current VOUT = 0V, VIN = VSHDN = VSW = –6V ● 5 µA IVIN,REVBATT VIN and VSW Reverse-Battery Current VOUT = 0V, VIN = VSHDN = VSW = –6V ● –5 µA ISHDN,REVBATT SHDN Reverse-Battery Current VOUT = 0V, VIN = VSHDN = VSW = –6V ● –5 µA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Specification is guaranteed by design and not 100% tested in production. Note 3:The LTC3499E/LTC3499BE are guaranteed to meet device specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature are assured by design, characterization and correlation with statistical process controls. Note 4: These ICs include overtemperature protection that is intended to protect the devices during momentary overload conditions. Junction temperatures will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating temperature range may impair device reliability. 3499f 3 LTC3499/LTC3499B U W TYPICAL PERFOR A CE CHARACTERISTICS 2-Cell to 5V Efficiency vs Load Current (LTC3499 Only) TA = 25°C unless noted. Li-Ion to 5V Efficiency vs Load Current (LTC3499 Only) 2-Cell to 5V Efficiency vs Load Current (LTC3499B Only) 100 100000 100 100000 90 10000 90 10000 100 90 80 EFFICIENCY 100 POWER LOSS 10 VIN = 3.2V VIN = 2.4V VIN = 1.8V 50 40 0.1 1 POWER LOSS 100 60 10 50 1 VIN = 4.2V VIN = 3.6V VIN = 3V 40 0.1 1000 10 100 LOAD CURRENT (mA) 70 30 0.1 1 100 LOAD CURRENT (mA) 1.03 90 10000 EFFICIENCY (%) 1.00 0.99 80 1000 70 100 60 10 POWER LOSS 0.98 VIN = 3V VIN = 2.4V VIN = 1.8V 50 0.97 50 25 TEMPERATURE (°C) 75 100 40 0.1 1 1 0.1 1000 10 100 LOAD CURRENT (mA) 3499 G04 POWER LOSS (mW) 1.01 Burst Mode QUIESCENT CURRENT (µA) INPUT CURRENT (µA) OUTPUT CURRENT (mA) VOUT = 3.3V 400 300 VOUT = 5V 200 140 VOUT = 3.3V 120 VOUT = 5V 100 80 60 40 100 20 0 4.5 50 40 30 20 10 0 5.5 VIN (V) 3499 G06 1.8 2.3 2.8 3.3 3.8 INPUT VOLTAGE (V) 4.3 4.8 30 160 3.5 VOUT = 5V Burst Mode Quiescent Current vs Temperature (LTC3499 Only) 180 VIN > VOUT 600 2.5 1000 3499 G05 200 0 1.5 10 100 LOAD CURRENT (mA) 60 No Load Input Current vs VIN (LTC3499 Only) 800 700 1 3499 G02 Maximum Output Current Capability vs VIN 500 0 0.1 3499 G17 EFFICIENCY 0 VIN = 3.2V VIN = 2.4V VIN = 1.8V 10 100000 1.02 CURRENT LIMIT (A) 20 1 Burst Mode Output Current Threshold vs Input Voltage (LTC3499 Only) 100 VIN > VOUT 40 2-Cell to 3.3V Efficiency vs Load Current (LTC3499 Only) 1.04 –25 50 3499 G03 Current Limit Accuracy vs Temperature 0.96 –50 60 30 0.1 1000 10 3499 G01 70 Burst Mode OUTPUT CURRENT THRESHOLD (mA) 60 1000 EFFICIENCY (%) 70 EFFICIENCY (%) EFFICIENCY (%) 1000 80 POWER LOSS (mW) 80 POWER LOSS (mW) EFFICIENCY 1.5 2.5 3.5 VIN (V) 4.5 5.5 3499 G07 25 20 15 10 5 0 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 3499 G08 3499f 4 LTC3499/LTC3499B U W TYPICAL PERFOR A CE CHARACTERISTICS VIN and SW Reverse-Battery Current vs VIN and SW Voltage Oscillator Frequency vs Temperature FB Voltage vs Temperature 1.2225 1.0 OSCILLATOR FREQUENCY (MHz) 1.2215 1.2210 1.2205 1.2200 1.2195 1.2190 1.2185 –50 –25 0 50 25 TEMPERATURE (°C) 75 100 REVERSE-BATTERY CURRENT (µA) 1.4 1.2220 FB VOLTAGE (V) TA = 25°C unless noted. 1.3 1.2 1.1 SHDN = 0V VOUT = 0V 0.5 0 –0.5 –1.0 1.0 –50 –25 0 25 50 TEMPERATURE (°C) 75 3499 G09 –6 100 Fixed Frequency Discontinous Mode Operation SW 2V/DIV VOUT 200mV/DIV ILOAD 100mA/DIV 200mA IL 100mA/DIV 50mA 3499 G13 VIN = 2.4V 200µs/DIV VOUT = 5V ILOAD = 50mA to 200mA RZ = 100k CF = 680pF COUT = 10µF L = 4.7µH 3499 G12 20µs/DIV VIN = 2.4V VOUT = 5V L = 4.7µH COUT = 10µF CFF = 10pF (FEEDFORWARD CAPACITOR FROM VOUT TO FB) 6 3499 G11 Load Transient 50mA to 200mA IL 50mA/DIV –2 0 2 4 VIN AND SW VOLTAGE (V) 3499 G08 Burst Mode Operation (LTC3499 Only) VOUT 50mV/DIV –4 VIN = 2.4V VOUT = 5V L = 4.7µH 200ns/DIV 3499 G14 Fixed Frequency Operation Soft-Start into 25Ω Load VIN 2V/DIV SS 2V/DIV VOUT 2V/DIV SW 2V/DIV IL 100mA/DIV IL 200mA/DIV VIN = 2.4V VOUT = 5V L = 4.7µH CSS = 0.01µF COUT = 10µF 1ms/DIV 34991G15 VIN = 2.4V VOUT = 5V L = 4.7µH 200ns/DIV 3499 G16 3499f 5 LTC3499/LTC3499B U U U PI FU CTIO S SHDN (Pin 1): Shutdown Input for IC. Connect to a voltage greater than 1.2V to enable and a voltage less than 0.2V to disable the LTC3499/LTC3499B. VIN (Pin 2): Input Supply Voltage. The valid operating voltage is between 1.8V to 5.5V. VIN has reverse battery protection. Since the LTC3499/LTC3499B use VIN as the main bias source, bypass with a low ESR ceramic capacitor of at least 2.2µF. SW (Pin 3): Switch Pin. Connect an inductor from VIN to this pin with a value between 2.2µH and 10µH. Keep PCB trace lengths as short and wide as possible to minimize EMI and voltage overshoot. If the inductor current falls to zero or SHDN is low an internal 250Ω antiringing switch is connected from VIN to SW to minimize EMI. GND (Pin 4): Signal and Power Ground for the IC. SS (Pin 5): Soft-Start Input. Connect a capacitor from SS to ground to control the inrush current at start-up. An internal 3µA current source charges this pin. SS will be discharged if SHDN is pulled low, thermal shutdown occurs or VIN is below the minimum operating voltage. VOUT (Pin 6): Power Supply Output. Connect a low ESR output filter capacitor from this pin to the ground plane. FB (Pin 7): FB Input to Error Amplifier. Connect a resistor divider tap from VOUT to this pin to set the output voltage. The output voltage can be adjusted between 2V and 6V. Referring to the Functional Block Diagram, the output voltage is given by: ⎡ ⎛ R1 ⎞ ⎤ VOUT = 1.22 • ⎢1+ ⎜ ⎟ ⎥ ⎣ ⎝ R2 ⎠ ⎦ VC (Pin 8): Error Amplifier Output. A frequency compensation network is connected from this pin to GND to compensate the boost converter loop. See Closing the Feedthrough Loop section for guidelines. Exposed Pad—DD Only (Pin 9): Ground. Must be soldered to the PCB power ground plane for electrical connection and rated thermal performance. 3499f 6 LTC3499/LTC3499B W FU CTIO AL BLOCK DIAGRA U U VIN 1.8V TO 5.5V + CIN L 2 REVERSE-BATTERY COMPARATOR 3 VIN ANTI-RING 250Ω SW + 1 = CLOSED 1 = CLOSED 0.7V – – VSELECT + + – OV COMPARATOR VOUT + VOUT 1 = OFF – 6.8V ERROR AMPLIFIER + 6 CFF (OPTIONAL) 1.22V R1 ENABLE PWM LOGIC AND DRIVERS THERMAL SD FB 7 COUT R2 + – SLEEP – VC IZERO 8 CC1 RZ 1.2MHz OSCILLATOR SLOPE COMPENSATION Σ 3µA SS + PWM COMPARATOR CC2 5 CSS 5k – ENABLE TSD + SLEEP CURRENT LIMIT COMPARATOR 1 SHDN 0.8V – + REFERENCE BIAS UVLO SD – Burst Mode CONTROL (LTC3499 ONLY) 1A TYP ENABLE GND 4 34991 F01 Figure 1. Functional Block Diagram 3499f 7 LTC3499/LTC3499B U OPERATIO The LTC3499/LTC3499B provide high efficiency, low noise power for boost applications with output voltages up to 6V. Operation can be best understood by referring to the Functional Block Diagram in Figure 1. The synchronous boost converters are housed in either an 8-lead (3mm × 3mm) DFN or MSOP package and operates at a fixed 1.2MHz. With a 1.6V typical minimum VIN voltage these devices are well suited for applications using two or three alkaline or nickel-metal hydride (NiMH) cells or one Lithium-Ion (Li+) cell. The LTC3499/LTC3499B have integrated circuitry which protects the battery, IC, and circuitry powered by the device in the event that the input batteries are connected backwards (reverse battery protection). The true output disconnect feature eliminates inrush current and allows VOUT to be zero volts during shutdown. The current mode architecture simplifies loop compensation with excellent load transient response. The low RDS(ON), low gate charge synchronous switches eliminate the need for an external Schottky diode rectifier, and provide efficient high frequency pulse width modulation (PWM). Burst Mode quiescent current to the LTC3499 is only 20µA from VIN, maximizing battery life. The LTC3499B does not have Burst Mode operation and the device continues switching at constant frequency. This results in the absence of low frequency output ripple at the expense of light load efficiency. In the event of a commanded shutdown or thermal shutdown (TSD), CSS is discharged through a nominal 5kΩ impedance to GND. Once the condition is removed and SS is discharged near ground, a soft-start will automatically be re-initiated. Error Amplifier A transconductance amplifier generates an error voltage from the difference between the positive input internally connected to the 1.22V reference and the negative input connected to FB. A simple compensation network is placed from VC to ground. Internal clamps limit the minimum and maximum error amplifier output voltage for improved large signal transient response. A voltage divider from VOUT to GND programs the output voltage via FB from 2V to 6V and is defined by the following equation: ⎡ ⎛ R1 ⎞ ⎤ VOUT = 1.22 • ⎢1+ ⎜ ⎟ ⎥ ⎣ ⎝ R2 ⎠ ⎦ Current Sensing LOW NOISE FIXED FREQUENCY OPERATION Lossless current sensing converts the peak current signal into a voltage which is summed with the internal slope compensation. This summed signal is compared to the error amplifier output to provide a peak current control command for the PWM. Peak switch current is limited to 750mA minimum. Shutdown Antiringing Control The LTC3499/LTC3499B are shut down by pulling SHDN below 0.2V, and activated by pulling the pin above 1.2V. SHDN can be driven above VIN or VOUT as long as it is limited to less than the absolute maximum rating. The antiringing control connects a resistor across the inductor to damp the ringing on SW in discontinuous conduction mode. The LC resonant ringing (L = inductor, CSW = capacitance on SW) is low energy, but can cause EMI radiation if antiringing control is not present. Soft-Start The soft-start time is programmed with an external capacitor to ground on SS. An internal current source charges the capacitor, CSS, with a nominal 3µA. The voltage on SS is used to clamp the voltage on VC. The soft-start time is given by Zero Current Comparator The zero current comparator monitors the inductor current to the output and shuts off the synchronous rectifier once this current reduces to approximately 40mA, preventing negative inductor current. t(msec) = CSS (µF) • 200 3499f 8 LTC3499/LTC3499B U OPERATIO Reverse-Battery Protection Plugging the battery in backwards poses a severe problem to most power converters. At a minimum the battery will be quickly discharged. Almost all ICs have an inherent diode from VIN (cathode) to ground (anode) which conducts appreciable current when VIN drops more than 0.7V below ground. Under this condition the integrated circuit will most likely be damaged due to the excessive current draw. There exists the possibility for the battery and circuitry powered by the device to also be damaged. The LTC3499/LTC3499B have integrated circuitry which allows negligible current flow under a reverse-battery condition, protecting the battery, device and circuitry attached to the output. A graph of the reverse-battery current drawn is shown in the Typical Performance Characteristics. Discrete methods of reverse battery protection put additional dissipative elements in the high current path reducing efficiency while increasing component count to implement protection. The LTC3499/LTC3499B do not suffer from either of these drawbacks. Burst Mode Operation (LTC3499 only) Portable devices frequently spend extended time in low power or stand-by mode, only drawing high power when specific functions are enabled. In order to improve battery life in these types of products, high power converter efficiency needs to be maintained over a wide output power range. In addition to its high efficiency at moderate and heavy loads, the LTC3499 includes automatic Burst Mode operation that improves efficiency of the power converter at light loads. Burst Mode operation is initiated if the output load current falls below an internally programmed threshold (see Typical Performance graph, Output Load Burst Mode Threshold vs VIN). Once initiated the Burst Mode operation circuitry shuts down most of the circuitry in the LTC3499, only keeping alive the circuitry required to monitor the output voltage. This state is referred to as sleep. In sleep, the LTC3499 only draws 20µA from the input supply, greatly enhancing efficiency. When the output has drooped approximately 1% from its nominal regulation point, the LTC3499 wakes up and commences normal PWM operation. The output capacitor will recharge causing the LTC3499 to re-enter sleep if the output load remains less than the sleep threshold. The frequency of this intermittent PWM (or burst) operation is proportional to load current. Therefore, as the load current drops further below the burst threshold, the LTC3499 operates in PWM mode less frequently. When the load current increases above the burst threshold, the LC3499 will resume continuous PWM operation seamlessly. Referring to the Functional Block Diagram, an optional capacitor, CFF, between VOUT and FB in some circumstances can reduce peak-to-peak VOUT ripple and input quiescent current during Burst Mode operation. Typical values for CFF range from 10pF to 220pF. Output Disconnect and Inrush Current Limiting The LTC3499/LTC3499B are designed to allow true output disconnect by eliminating body diode conduction of the internal P-channel MOSFET transistor. This allows VOUT to go to zero volts during shutdown without drawing any current from the input source. It also provides for inrush current limiting at turn-on, minimizing surge current seen by the input supply. VIN > VOUT Operation The LTC3499/LTC3499B will maintain voltage regulation when the input voltage is above the output voltage. This is achieved by terminating the switching on the synchronous P-channel MOSFET and applying VIN statically on the gate. This will ensure the volts • seconds of the inductor will reverse during the time current is flowing to the output. Since this mode will dissipate more power in the IC, the maximum output current is limited in order to maintain an acceptable junction temperature: IOUT(MAX ) ≅ θJA 125 – TA • (( VIN + 1.5) – VOUT ) where TA = ambient temperature and θJA is the package thermal resistance (45°C/W for the DD8 and 160°C/W for the MS8). For example at VIN = 4.5V, VOUT = 3.3V and TA = 85°C in the DD8 package, the maximum output current is 330mA. 3499f 9 LTC3499/LTC3499B U W U U APPLICATIO S I FOR ATIO PCB LAYOUT GUIDELINES The high speed operation of the LTC3499/LTC3499B demand careful attention to board layout. Advertised performance will not be achieved with careless layout. Figure 2 shows the recommended component placement. A large copper area will help to lower the chip temperature. Traces carrying high current (SW, VOUT, GND) are kept short. The lead length to the battery should be kept as short as possible. The VIN and VOUT ceramic capacitors should be placed as close to the IC pins as possible. CC2 EXPOSED PAD FOR DD8 CC1 SHDN VIN + CIN VBATT 1 8 7 2 VC R2 FB 9 L RZ R1 SW 3 6 GND 4 5 VOUT Table 1. Inductor Vendor Information PART NUMBER SUPPLIER WEB SITE MSS5131 and MOS6020 Series Coilcraft www.coilcraft.com SLF7028 and SLF7045 Series TDK www.component.tdk.com LQH55D Series Murata www.murata.com CDRH4D28 and CDRH4D28 Series Sumida www.sumida.com D53LC and D62CB Series Toko www.tokoam.com DT0703 Series CoEV www.coev.net MJPF2520 Series FDK www.fdk.com Output Capacitor Selection COUT SS such as ferrite, to reduce core losses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R power losses, and must be able to handle the peak inductor current without saturating. To minimize radiated noise, use a toroidal or shielded inductor. See Table 1 for some suggested inductor suppliers. CSS 34991 F02 The output voltage ripple has three components to it. The bulk value of the capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The maximum ripple voltage due to charge is given by: Figure 2: Recommended Component Placement COMPONENT SELECTION Inductor Selection The LTC3499/LTC3499B allow the use of small surface mount inductors and chip inductors due to the fast 1.2MHz switching frequency. A minimum inductance value of 2.2µH is required. Larger values of inductance will allow greater output current capability by reducing the inductor ripple current. Increasing the inductance above 10µH will increase total solution area while providing minimal improvement in output current capability. The inductor current ripple is typically set to 20% to 40% of the maximum inductor current. For high efficiency, choose an inductor with high frequency core material, VRBULK = IP • VIN (COUT • VOUT • f) where IP = peak inductor current and f = switching frequency. The ESR (equivalent series resistance) is usually the most dominant factor for ripple in most power converters. The ripple due to capacitor ESR is simply given by: VRCESR = IP • CESR where CESR = capacitor equivalent series resistance The ESL (equivalent series inductance) is also an important factor for high frequency converters. Using small surface mount ceramic capacitors, placed as close as possible to VOUT, will minimize ESL. 3499f 10 LTC3499/LTC3499B U U W U APPLICATIO S I FOR ATIO Low ESR capacitors should be used to minimize output voltage ripple. A 4.7µF to 10µF output capacitor is sufficient for most applications and should be placed as close to VOUT as possible. Larger values may be used to obtain even lower output ripple and improve transient response. X5R and X7R dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. Closing the Feedback Loop The LTC3499/LTC3499B utilize current mode control, with internal slope compensation. Current mode control eliminates the 2nd order filter due to the inductor and output capacitor exhibited in voltage mode controllers, thus simplifying it to a single pole filter response. The product of the modulator control to output DC gain and the error amp open loop gain gives the DC gain of the system: Input Capacitor Selection The input filter capacitor reduces peak currents drawn from the input source and reduces input switching noise. Ceramic capacitors are a good choice for input decoupling due to their low ESR and ability to withstand reverse voltage (i.e. non-polar nature). The capacitor should be located as close as possible to the device. In most applications a 2.2µF input capacitor is sufficient. Larger values may be used without limitations. Table 2 shows a list of several ceramic capacitor manufacturers. Table 2. Capacitor Vendor Information SUPPLIER WEB SITE AVX www.avxcorp.com Murata www.murata.com TDK www.component.tdk.com Taiyo Yuden www.t-yuden.com GDC = GCONTROL • GEA • GCONTROL = 2 • VIN IOUT VREF VOUT • GCURRENT _ SENSE , GEA ~ 1000, GCURRENT _ SENSE = 1 RDS(ON) The output filter pole is given by: fFILTER _ POLE = IOUT (π • VOUT • COUT ) where COUT is the output filter capacitor. The output filter zero is given by: Thermal Considerations For the LTC3499/LTC3499B to deliver full output power, it is imperative that a good thermal path be provided to dissipate the heat generated within the package. For the DFN package, this can be accomplished by taking advantage of the large thermal pad on the underside of the device. It is recommended that multiple vias in the printed circuit board be used to conduct heat away from the part and into a copper plane with as much area as possible. If the junction temperature continues to rise, the part will go into thermal shutdown where switching will stop until the temperature drops. fFILTER _ ZERO = 1 (2 • π • RESR • COUT ) where RESR is the capacitor equivalent series resistance. A troublesome feature of the boost regulator topology is the right half plane (RHP) zero, given by: fRPHZ = VIN2 (2 • π • IOUT • VOUT • L ) 3499f 11 LTC3499/LTC3499B U U W U APPLICATIO S I FOR ATIO There is a resultant gain increase with a phase lag which makes it difficult to compensate the loop. At heavy loads the right half plane zero can occur at a relatively low frequency. The loop gain is typically rolled off before the RHP zero frequency. VOUT 6 ERROR AMPLIFIER + R1 1.22V FB – 7 The typical error amp compensation is shown in Figure 3, following the equations for the loop dynamics: R2 VC fPOLE1 ~ ( 1 8 ) 2 • π • 10e6 • CC1 RZ CC2 CC1 3499 F03 which is extremely close to DC. 1 fZERO1 = (2 • π • RZ • CC1) fPOLE2 = 1 Figure 3: Typical Error Amplifier Compensation (2 • π • RZ • CC2 ) 3499f 12 LTC3499/LTC3499B U TYPICAL APPLICATIO S Lithium-Ion to 5V Efficiency Lithium-Ion to 5V, 350mA 90 CIN 2.2µF X5R ON OFF VIN VOUT 1M VC 100k 330pF 80 LTC3499 SHDN FB SS GND 10000 EFFICIENCY SW VOUT 5V 350mA COUT 10µF X5R EFFICIENCY (%) + POWER LOSS 100 60 10 50 324k VIN = 4.2V VIN = 3.6V VIN = 3V 40 0.01µF CIN: TAIYO YUDEN X5R JMK212BJ225MD COUT: TAIYO YUDEN X5R JMK212BJ106MD L: COILCRAFT MSS5131-472MLB 1000 70 30 0.1 1 3499 F04a POWER LOSS (mW) VIN Li-Ion 3.1V TO 4.2V 100000 100 L 4.7µH 1 0.1 1000 10 100 LOAD CURRENT (mA) 3499 G03 Two Cells to 5V Efficiency Two Cells to 5V, 175mA L 4.7µH CIN 2.2µF X5R ON OFF VIN 330pF VOUT 5V 175mA VOUT SHDN 1M FB SS 10000 EFFICIENCY LTC3499 VC 100k 90 SW GND COUT 10µF X5R 324k EFFICIENCY (%) + 100000 80 1000 70 100 POWER LOSS 60 VIN = 3.2V VIN = 2.4V VIN = 1.8V 50 0.01µF CIN: TAIYO YUDEN X5R JMK212BJ225MD COUT: TAIYO YUDEN X5R JMK212BJ106MD L: COILCRAFT MSS5131-472MLB 40 0.1 3499 F05a 1 10 100 LOAD CURRENT (mA) 10 POWER LOSS (mW) VIN 2 AA CELLS 1.8V TO 3.2V 100 1 0.1 1000 3499 G01 3499f 13 LTC3499/LTC3499B U PACKAGE DESCRIPTIO DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) 0.675 ±0.05 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP 5 3.00 ±0.10 (4 SIDES) 0.38 ± 0.10 8 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD8) DFN 1203 0.200 REF 0.75 ±0.05 0.00 – 0.05 4 0.25 ± 0.05 1 0.50 BSC 2.38 ±0.10 (2 SIDES) BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 3499f 14 LTC3499/LTC3499B U PACKAGE DESCRIPTIO MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.42 ± 0.038 (.0165 ± .0015) TYP 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.65 (.0256) BSC 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 1 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.127 ± 0.076 (.005 ± .003) MSOP (MS8) 0204 3499f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3499/LTC3499B U TYPICAL APPLICATIO Two Cells to 3.3V Efficiency Two Cells to 3.3V, 250mA 100 L 4.7µH 90 CIN 2.2µF X5R VIN LTC3499 ON OFF 1M VC 330pF VOUT 3.3V 250mA VOUT SHDN COUT 10µF X5R FB 100k SS 10000 EFFICIENCY SW GND 332k EFFICIENCY (%) + 80 1000 70 100 60 10 POWER LOSS VIN = 3V VIN = 2.4V VIN = 1.8V 50 0.01µF CIN: TAIYO YUDEN X5R JMK212BJ225MD COUT: TAIYO YUDEN X5R JMK212BJ106MD L: COILCRAFT MSS5131-472MB 40 0.1 3499 F06a 1 10 100 LOAD CURRENT (mA) POWER LOSS (mW) VIN 2 AA CELLS 1.8V TO 3.2V 100000 1 0.1 1000 3499 G02 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1930/LT1930A 1A (ISW), 1.2MHz/2.2MHz, High Efficiency Step-Up DC/DC Converter High Efficiency, VIN: 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1µA, ThinSOT Package LT1961 1.5A (ISW), 1.25MHz, High Efficiency Step-Up DC/DC Converter 90% Efficiency, VIN: 3V to 25V, VOUT(MAX) = 35V, IQ = 0.9mA, ISD < 6µA, MS8E Package LTC3400/LTC3400B 600mA (ISW), 1.2MHz, Synchronous Step-Up DC/DC Converter 92% Efficiency, VIN: 0.5V to 5V, VOUT(MAX) = 5V, IQ = 19µA/300µA, ISD < 1µA, ThinSOT Package LTC3401 1A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter 97% Efficiency, VIN: 0.5V to 5V, VOUT(MAX) = 5.5V, IQ = 38µA, ISD < 1µA, 10-Lead MS Package LTC3402 2A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter 97% Efficiency, VIN: 0.5V to 5V, VOUT(MAX) = 5.5V, IQ = 38µA, ISD < 1µA, 10-Lead MS Package LTC3421 3A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect 95% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12µA, ISD < 1µA, 24-Lead QFN Package LTC3422 1.5A (ISW), 3MHz, Synchronous Step-Up DC/DC Converter with Output Disconnect 95% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 25µA, ISD < 1µA LTC3425 5A (ISW), 8MHz, 4-Phase Synchronous Step-Up DC/DC Converter with Output Disconnect 95% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 12µA, ISD < 1µA, 32-Lead QFN Package LTC3427 500mA (ISW), 1.25MHz, Synchronous Step-Up DC/DC Converter with Soft-Start/Output Disconnect 94% Efficiency, VIN: 1.8V to 5V, VOUT(MAX) = 5.25V, ISD < 1µA, DFN Package LTC3429/LTC3429B 600mA (ISW), 550kHz, Synchronous Step-Up DC/DC Converters with Soft-Start/Output Disconnect 92% Efficiency, VIN: 0.5V to 4.3V, VOUT(MAX) = 5V, IQ = 20µA, ISD < 1µA, ThinSOT Package LTC3458/LTC3458L 1.4A/1.7A (ISW), 1.5MHz, Synchronous Step-Up DC/DC Converter with Soft-Start/Output Disconnect 93% Efficiency, VIN: 1.5V to 6V, VOUT(MAX) = 7.5V/6V, IQ = 15µA, ISD < 1µA, DFN Package LTC3525 400mA (ISW), Synchronous Step-Up DC/DC Converter in SC70 94% Efficiency, VIN: 0.5V to 4.5V, VOUT(MAX) = 5.25V, IQ = 7µA, ISD < 1µA, Output Disconnect 3499f 16 Linear Technology Corporation LT 0106 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006