Revised November 1999 74ACT158 Quad 2-Input Multiplexer General Description Features The ACT158 is a high-speed quad 2-input multiplexer. It selects four bits of data from two sources using the common Select and Enable inputs. The four buffered outputs present the selected data in the inverted form. The ACT158 can also be used as a function generator. ■ ICC reduced by 50% ■ Outputs source/sink 24 mA ■ TTL-compatible inputs Ordering Code: Order Number 74ACT158SC 74ACT158PC 74ACT158MTC Package Number Package Description M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MTC16 74ACT158SJ N16E 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEE/IEC Pin Descriptions Pin Names Description I0a–I0d Source 0 Data Inputs I1a–I1d Source 1 Data Inputs E Enable Input S Select Input Za–Zd Inverted Outputs FACT is a trademark of Fairchild Semiconductor Corporation. © 1999 Fairchild Semiconductor Corporation DS009930 www.fairchildsemi.com 74ACT158 Quad 2-Input Multiplexer November 1988 74ACT158 Functional Description Truth Table The ACT158 quad 2-input multiplexer selects four bits of data from two sources under the control of a common Select input (S) and presents the data in inverted form at the four outputs. The Enable input (E) is active-LOW. When E is HIGH, all of the outputs (Z) are forced HIGH regardless of all other inputs. The ACT158 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. Inputs A common use of the ACT158 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The ACT158 can generate four functions of two variables with one variable common. This is useful for implementing gating functions. Outputs E S I0 H X L L L L L H I1 Z X X H L X H L H X L H X L H X H L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Recommended Operating Conditions −0.5V to +7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V −20 mA VI = VCC + 0.5V +20 mA DC Input Voltage (VI) Supply Voltage (VCC) 0V to VCC Output Voltage (VO) −0.5V to VCC + 0.5V 0V to VCC −40°C to +85°C Operating Temperature (TA) DC Output Diode Current (IOK) Minimum Input Edge Rate (∆V/∆t) VO = −0.5V −20 mA VO = VCC + 0.5V +20 mA DC Output Voltage (VO) 4.5V to 5.5V Input Voltage (VI) VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V −0.5V to VCC + 0.5V 125 mV/ns DC Output Source ±50 mA or Sink Current (IO) DC VCC or Ground Current Storage Temperature (TSTG) Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variable. Fairchild does not recommend operation of FACT circuits outside databook specifications. ±50 mA per Output Pin (ICC or IGND) −65°C to +150°C Junction Temperature (TJ) 140°C DC Electrical Characteristics Symbol VIH VIL VOH Parameter TA = +25°C VCC (V) Typ TA = −40°C to +85°C Guaranteed Limits Minimum HIGH Level 4.5 1.5 2.0 2.0 Input Voltage 5.5 1.5 2.0 2.0 Maximum LOW Level 4.5 1.5 0.8 0.8 Input Voltage 5.5 1.5 0.8 0.8 Minimum HIGH Level 4.5 4.49 4.4 4.4 Output Voltage 5.5 5.49 5.4 5.4 3.86 3.76 Units V V Conditions VOUT = 0.1V or VCC − 0.1V VOUT = 0.1V or VCC − 0.1V V IOUT = −50 µA V IOH = −24 mA VIN = VIL or VIH 4.5 5.5 VOL IOH = −24 mA (Note 2) 4.86 4.76 Maximum LOW Level 4.5 0.001 0.1 0.1 Output Voltage 5.5 0.001 0.1 0.1 4.5 0.36 0.44 5.5 0.36 0.44 5.5 ±0.1 ±1.0 µA VI = VCC, GND 1.5 mA VI = VCC − 2.1V V IOUT = 50 µA V IOL = 24 mA VIN = VIL or VIH IIN Maximum Input Leakage Current ICCT Maximum ICC/Input 5.5 0.6 IOL = 24 mA (Note 2) IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max IOHD Output Current (Note 3) 5.5 −75 mA VOHD = 3.85V Min ICC Maximum Quiescent 40.0 µA Supply Current 5.5 4.0 VIN = VCC or GND Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. 3 www.fairchildsemi.com 74ACT158 Absolute Maximum Ratings(Note 1) 74ACT158 AC Electrical Characteristics Symbol tPLH Parameter Propagation Delay S to Zn tPHL Propagation Delay S to Zn tPLH Propagation Delay E to Zn tPHL Propagation Delay E to Zn tPLH Propagation Delay In to Zn tPHL Propagation Delay In to Zn TA = +25°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF VCC (V) (Note 4) Min Typ Max Min Max 5.0 2.5 6.0 9.5 2.0 11.0 ns 5.0 1.5 5.5 9.0 1.5 10.0 ns 5.0 1.5 5.5 9.5 1.5 10.5 ns 5.0 1.5 5.5 9.5 1.5 10.5 ns 5.0 1.5 4.5 8.0 1.0 8.5 ns 5.0 1.5 4.0 6.5 1.0 7.5 ns Note 4: Voltage Range 5.0 is 5.0V ± 0.5V Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.5 pF VCC = OPEN CPD Power Dissipation Capacitance 45.0 pF VCC = 5.0V www.fairchildsemi.com 4 Conditions Units 74ACT158 Physical Dimensions inches (millimeters) unless otherwise noted 16- Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body Package Number M16A 5 www.fairchildsemi.com 74ACT158 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D www.fairchildsemi.com 6 74ACT158 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 7 www.fairchildsemi.com 74ACT158 Quad 2-Input Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16- Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 8