Revised March 1999 74LVX157 Low Voltage Quad 2-Input Multiplexer General Description Features The LVX157 is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form. The LVX157 can also be used as a function generator. ■ Input voltage level translation from 5V to 3V ■ Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance Ordering Code: Order Number 74LVX157M 74LVX157SJ 74LVX157MTC Package Number M16A M16D MTC16 Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices are also available in Tape and Reel. Specify by appending letter suffix “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names © 1999 Fairchild Semiconductor Corporation DS011608.prf Description I0a–I0d Source 0 Data Inputs I1a–I1d Source 1 Data Inputs E Enable Input S Select Input Za–Zd Outputs www.fairchildsemi.com 74LVX157 Low Voltage Quad 2-Input Multiplexer May 1993 74LVX157 Truth Table Inputs E S Outputs I0 I1 Z L H X X X L H X L L L H X H H L L L X L L L H X H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Functional Description Zc = E • (I1c • S + I0c • S) The LVX157 is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active-LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The LVX157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = E • (I1a • S + I0a • S) Zd = E • (I1d • S + I0d • S) A common use of the LVX157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The LVX157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions. Zb = E • (I1b • S + I0b • S) Logic Diagram www.fairchildsemi.com 2 Recommended Operating Conditions (Note 2) −0.5V to +7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) Supply Voltage (VCC) VI = −0.5V −20 mA −0.5V to 7V DC Input Voltage (VI) 2.0V to 3.6V Input Voltage (VI) 0V to 5.5V Output Voltage (VO) DC Output Diode Current (IOK) 0V to VCC −40°C to +85°C Operating Temperature (TA) VO = −0.5V −20 mA VO = VCC + 0.5V +20 mA Input Rise and Fall Time (∆t/∆V) −0.5V to VCC + 0.5V DC Output Voltage (VO) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. DC Output Source ±25 mA or Sink Current (IO) DC VCC or Ground Current ±50 mA (ICC or IGND) 0 ns/V to 100 ns/V Note 2: Unused inputs must be held HIGH or LOW. They may not float. −65°C to +150°C Storage Temperature (TSTG) Power Dissipation 180 mW DC Electrical Characteristics Symbol VIH VIL VOH VOL VCC Parameter TA = +25°C Min TA = −40°C to +85°C Typ Max Min HIGH Level 2.0 1.5 1.5 Input Voltage 3.0 2.0 2.0 3.6 2.4 2.4 Max 2.0 0.5 0.5 Input Voltage 3.0 0.8 0.8 3.6 0.8 0.8 2.0 1.9 2.0 1.9 Output Voltage 3.0 2.9 3.0 2.9 3.0 2.58 V VIN = VIL or VIH IOH = −50 µA IOH = −50 µA V IOH = −4 mA 2.48 LOW Level 2.0 0.0 Output Voltage 3.0 0.0 Conditions V LOW Level HIGH Level Units 0.1 VIN = V IL or VIH IOL = 50 µA 0.1 0.1 0.1 3.0 0.36 0.44 IOL = 50 µA V IOL = 4 mA IIN Input Leakage Current 3.6 ±0.1 ±1.0 µA VIN = 5.5V or GND ICC Quiescent Supply Current 3.6 4.0 40.0 µA VIN = VCC or GND Noise Characteristics (Note 3) Symbol VCC (V) Parameter TA = 25°C Typ Units CL (pF) Limit VOLP Quiet Output Maximum Dynamic VOL 3.3 0.3 0.5 V 50 VOLV Quiet Output Minimum Dynamic VOL 3.3 −0.3 −0.5 V 50 VIHD Minimum HIGH Level Dynamic Input Voltage 3.3 2.0 V 50 VILD Maximum LOW Level Dynamic Input Voltage 3.3 0.8 V 50 Note 3: Input tr = tf = 3ns 3 www.fairchildsemi.com 74LVX157 Absolute Maximum Ratings(Note 1) 74LVX157 AC Electrical Characteristics Symbol Parameter tPLH Propagation tPHL Delay Time I n to Zn tPLH Propagation tPHL Delay Time S to Zn tPLH tPHL Propagation V CC (V) 2.7 3.3 ± 0.3 2.7 3.3 ± 0.3 2.7 Delay Time E to Zn 3.3 ± 0.3 TA = +25°C Min TA = −40°C to +85°C Typ Max Min Max Units CL (pF) 6.6 12.5 1.0 15.5 15 9.1 16.0 1.0 19.0 50 5.1 7.9 1.0 9.5 7.6 11.4 1.0 13.0 ns 15 50 8.9 16.9 1.0 20.5 15 11.4 20.4 1.0 24.0 50 7.0 11.0 1.0 13.0 9.5 14.5 1.0 16.5 9.1 17.6 1.0 20.5 15 11.6 21.1 1.0 24.0 50 7.2 11.5 1.0 13.5 9.7 15.0 1.0 17.0 tOSHL Output to Output 2.7 1.5 1.5 tOSLH Skew (Note 4) 3.3 1.5 1.5 ns 15 50 ns 15 50 50 ns Note 4: Parameter guaranteed by design. tOSLH = |tPLHm − tPLHn|. tOSHL = |tPHLm − tPHLn|. Capacitance Symbol TA = +25°C Parameter Min TA = −40°C to +85°C Typ Max 10 CIN Input Capacitance 4 CPD Power Dissipation Capacitance (Note 5) 20 Min Max 10 Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(opr.) = CPD × VCC × fIN + ICC www.fairchildsemi.com 4 Units pF pF 74LVX157 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Package Number M16A 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 5 www.fairchildsemi.com 74LVX157 Low Voltage Quad 2-Input Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.