TI SN65LBC174N

SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
D
D
D
D
D
D
D
N PACKAGE
(TOP VIEW)
Meets or Exceeds the Standard EIA-485
Designed for High-Speed Multipoint
Transmission on Long Bus Lines in Noisy
Environments
Supports Data Rates up to and Exceeding
Ten Million Transfers Per Second
Common-Mode Output Voltage Range of
– 7 V to 12 V
Positive- and Negative-Current Limiting
Low Power Consumption . . . 1.5 mA Max
(Output Disabled)
Functionally Interchangeable With SN75174
1A
1Y
1Z
1,2EN
2Z
2Y
2A
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
4A
4Y
4Z
3,4EN
3Z
3Y
3A
DW PACKAGE
(TOP VIEW)
description
1A
1Y
NC
1Z
1,2EN
2Z
NC
2Y
2A
GND
The SN65LBC174 and SN75LBC174 are
monolithic, quadruple, differential line drivers with
3-state outputs. Both devices are designed to
meet the requirements of the Electronics Industry
Association Standard EIA-485. These devices
are optimized for balanced multipoint bus
transmission at data rates up to and exceeding
10 million bits per second. Each driver features
wide positive and negative common-mode output
voltage ranges, current limiting, and thermalshutdown protection, making it suitable for
party-line applications in noisy environments.
Both devices are designed using LinBiCMOS,
facilitating ultra-low power consumption and
inherent robustness.
Both the SN65LBC174 and SN75LBC174 provide
positive- and negative-current limiting and
thermal shutdown for protection from line fault
conditions on the transmission bus line. These
devices offer optimum performance when used
with the SN75LBC173 or SN75LBC175
quadruple line receivers. The SN65LBC174 and
SN75LBC174 are available in the 16-terminal DIP
package (N) and the 20-terminal wide-body small
outline intergrated circuit (SOIC) package (DW).
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
4A
4Y
NC
4Z
3,4EN
3Z
NC
3Y
3A
NC – No internal connection
FUNCTION TABLE
(each driver)
INPUT
ENABLE
H
L
X
H
H
L
H = high level,
X = irrelevant,
OUTPUTS
Y
Z
H
L
Z
L
H
Z
L = low level,
Z = high impedance (off)
The SN75LBC174 is characterized for operation over the commercial temperature range of 0°C to 70°C. The
SN65LBC174 is characterized over the industrial temperature range of – 40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments Incorporated.
Copyright  1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
logic symbol†
1, 2EN
1A
2A
3, 4EN
3A
4A
4
logic diagram (positive logic)
1A
2
1
3
6
7
12
2
1
EN
5
3
1Y
1, 2EN
1Z
6
7
2Y
2A
5
2Z
10
9
3A
9
11
14
15
13
1Z
4
EN
10
1Y
11
2Y
2Z
3Y
3Z
12
3Y
3,4EN
3Z
14
15
4A
4Y
13
4Y
4Z
4Z
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Terminal numbers shown are for the N package.
schematic of inputs and outputs
ALL INPUTS
Y OR Z OUTPUT
VCC
VCC
50 µA
200 Ω
Output
Input
Driver
2
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SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 10 V to 15 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 7 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited‡
Operating free-air temperature range, TA: SN65LBC174 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
SN75LBC174 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.
NOTE 1: All voltage values are with respect to GND.
recommended operating conditions
Supply voltage, VCC
High-level input voltage, VIH
MIN
NOM
MAX
UNIT
4.75
5
5.25
V
2
Low-level input voltage, VIL
V
0.8
Voltage at any bus terminal (separately or common
common-mode),
mode) VO
Y or Z
High-level output current, IOH
Y or Z
Low-level output current, IOL
Y or Z
12
–7
Continuous total power dissipation
V
V
– 60
mA
60
mA
See Dissipation Rating Table
Operating free-air
free air temperature,
temperature TA
SN65LBC174
– 40
85
SN75LBC174
0
70
°C
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
DW
1125 mW
9.0 mW/°C
720 mW
585 mW
N
1150 mW
9.2 mW/°C
736 mW
598 mW
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SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
VIK
TEST CONDITIONS
Input clamp voltage
MIN
TYP†
II = – 18 mA
|VOD|
Differential output voltage‡
∆|VOD|
Change in magnitude of common-mode output voltage§
VOC
Common mode output voltage
Common-mode
∆|VOC|
Change in magnitude of common-mode output voltage§
IO
IOZ
Output current with power off
IIH
IIL
High-level input current
IOS
Short-circuit output current
ICC
Supply current (all drivers)
Low-level input current
UNIT
– 1.5
V
RL = 54 Ω,,
See Figure 1
SN65LBC174
1.1
1.8
5
SN75LBC174
1.5
1.8
5
RL = 60 Ω,,
See Figure 2
SN65LBC174
1.1
1.7
5
SN75LBC174
1.5
1.7
RL = 54 Ω
Ω,
High-impedance-state output current
MAX
See Figure 1
V
5
± 0.2
V
3
–1
V
± 0.2
V
VCC = 0,
VO = – 7 V to 12 V
VO = – 7 V to 12 V
± 100
µA
± 100
µA
VI = 2.4 V
VI = 0.4 V
– 100
µA
– 100
µA
VO = – 7 V to 12 V
Outputs enabled
No load
Outputs disabled
± 250
mA
7
1.5
mA
† All typical values are at VCC = 5 V and TA = 25°C.
‡ The minimum VOD specification does not fully comply with EIA-485 at operating temperatures below 0°C. The lower output signal should be used
to determine the maximum signal transmission distance.
§ ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from a high level to a low
level.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER
td(OD)
tt(OD)
Differential output delay time
tPZH
tPZL
tPHZ
tPLZ
4
TEST CONDITIONS
MIN
TYP
MAX
2
11
20
UNIT
ns
10
15
25
ns
RL = 54 Ω
Ω,
See Figure 3
Output enable time to high level
RL = 110 Ω,
See Figure 3
30
ns
Output enable time to low level
RL = 110 Ω,
See Figure 5
30
ns
Output disable time from high level
RL = 110 Ω,
See Figure 4
50
ns
Output disable time from low level
RL = 110 Ω,
See Figure 5
30
ns
Differential output transition time
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SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
PARAMETER MEASUREMENT INFORMATION
RL
2
VOD2
RL
2
VOC
Figure 1. Differential and Common-Mode Output Voltages
Vtest
R1 = 375 Ω
Y
0 V or 3 V
A
RL = 60 Ω
VOD
Z
R2 = 375 Ω
EN at 5 V
Vtest
– 7 V < Vtest < 12 V
Figure 2. Driver VOD Test Circuit
3V
Input
1.5 V
RL = 54 Ω
Input
Generator
(see Note A)
1.5 V
CL = 50 pF
(see Note B)
50 Ω
0V
Output
td(OD)
td(OD)
Output
50%
90%
≈ 2.5 V
50%
10%
3V
tt(OD)
TEST CIRCUIT
≈ – 2.5 V
tt(OD)
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr ≤ 5 ns,
tf ≤ 5 ns, ZO = 50 Ω.
B. CL includes probe and stray capacitance.
Figure 3. Time Waveforms for Driver Differential Output Test Circuit Delay and Transition
POST OFFICE BOX 655303
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5
SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
PARAMETER MEASUREMENT INFORMATION
1.5 V
0V
Input
50 Ω
1.5 V
Output
3 V or 0 V
Generator
(see Note A)
3V
Input
S1
CL = 50 pF
(see Note B)
RL = 110 Ω
0.5 V
tPZH
VOH
Output
2.3 V
Voff ≈ 0 V
tPHZ
TEST CIRCUIT
VOLTAGE WAVEFORMS
Figure 4. tPZH and tPHZ Test Circuit and Waveforms
5V
3V
Input
RL = 110 Ω
S1
1.5 V
1.5 V
0V
tPZL
Output
0 V or 3 V
tPLZ
CL = 50 pF
(see Note B)
Input
Generator
(see Note A)
2.3 V
Output
5V
0.5 V
VOL
50 Ω
VOLTAGE WAVEFORMS
TEST CIRCUIT
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 1 MHz, duty cycle = 50%, tr ≤ 5 ns,
tf ≤ 5 ns, ZO = 50 Ω.
B. CL includes probe and stray capacitance.
Figure 5. tPZL and tPLZ Test Circuit and Waveforms
6
POST OFFICE BOX 655303
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SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
5
50
Output Disabled
TA = 25°C
ÁÁ
ÁÁ
ÁÁ
4.5
VOL – Low-Level Output Voltage – V
IIO
O – Output Current – µ A
40
30
20
10
0
– 10
VCC = 0 V
– 20
– 30
VCC = 5 V
VCC = 5 V
TA = 25°C
4
3.5
3
2.5
2
1.5
1
0.5
– 40
– 50
– 25 – 20 – 15 – 10 – 5
0
5
10
15
20
0
– 20
25
VO – Output Voltage – V
60
80
0
20
40
100
IOL – Low-Level Output Current – mA
Figure 6
Figure 7
DIFFERENTIAL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
3
5
VOH – High-Level Output Voltage – V
VOD – Differential Output Voltage – V
RL = 54 Ω
VCC = 5 V
ÁÁ
ÁÁ
2.5
2
1.5
1
0.5
0
– 60
120
VCC = 5 V
TA = 25°C
4.5
4
3.5
3
2.5
2
1.5
– 40
– 20
0
20
40
60
80
100
TA – Free-Air Temperature – °C
20
0
– 20
– 40
– 60
– 80
– 100 – 120
IOH – High-Level Output Current – mA
Figure 8
Figure 9
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7
SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIME,
DIFFERENTIAL OUTPUT
vs
FREE-AIR TEMPERATURE
DIFFERENTIAL OUTPUT VOLTAGE
vs
OUTPUT CURRENT
14
VCC = 5 V
TA = 25°C
RL = 54 Ω
CL = 50 pF
VCC = 5 V
13
2.5
t pd(OD) – Propagation Delay Time,
Differential Output – ns
VOD – Differential Output Voltage – V
3
2
1.5
1
0.5
12
11
10
9
8
7
6
5
0
4
0
10
20
30
40
50
60
70
80
90
100
– 60
– 40 – 20
Figure 10
8
0
20
Figure 11
POST OFFICE BOX 655303
40
60
TA – Free-Air Temperature – °C
IO – Output Current – mA
• DALLAS, TEXAS 75265
80
100
SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
MECHANICAL DATA
DW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
16 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
16
0.010 (0,25) M
9
0.419 (10,65)
0.400 (10,15)
0.010 (0,25) NOM
0.299 (7,59)
0.293 (7,45)
Gage Plane
0.010 (0,25)
1
8
0°– 8°
A
0.050 (1,27)
0.016 (0,40)
Seating Plane
0.104 (2,65) MAX
0.012 (0,30)
0.004 (0,10)
0.004 (0,10)
PINS **
16
20
24
A MAX
0.410
(10,41)
0.510
(12,95)
0.610
(15,49)
A MIN
0.400
(10,16)
0.500
(12,70)
0.600
(15,24)
DIM
4040000 / D 02/98
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MS-013
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9
SN65LBC174, SN75LBC174
QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVERS
SLLS162A – JULY 1993 – REVISED NOVEMBER 1998
MECHANICAL DATA
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PIN SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23.37)
0.975
(24,77)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21.59)
0.940
(23,88)
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.035 (0,89) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.010 (0,25) M
0°– 15°
0.010 (0,25) NOM
14/18 PIN ONLY
4040049/C 08/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)
10
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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Copyright  1998, Texas Instruments Incorporated