TI TPS75733KTTR

TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
D 3-A Low-Dropout Voltage Regulator
D Available in 1.5-V, 1.8-V, 2.5-V, and 3.3-V
D
D
D
D
D
D
D
TO–220 (KC) PACKAGE
(TOP VIEW)
Fixed-Output and Adjustable Versions
Open Drain Power-Good (PG) Status
Output (Fixed Options Only)
Dropout Voltage Typically 150 mV at 3 A
(TPS75733)
Low 125 µA Typical Quiescent Current
Fast Transient Response
3% Tolerance Over Specified Conditions for
Fixed-Output Versions
Available in 5-Pin TO–220 and TO–263
Surface-Mount Packages
Thermal Shutdown Protection
EN
IN
GND
OUTPUT
FB/PG
1
2
3
4
5
TO–263 (KTT) PACKAGE
(TOP VIEW)
1
2
3
4
5
EN
IN
GND
OUTPUT
FB/PG
description
The TPS757xx family of 3-A low dropout (LDO) regulators contains four fixed voltage option regulators with
integrated power-good (PG) and an adjustable voltage option regulator. These devices are capable of supplying
3 A of output current with a dropout of 150 mV (TPS75733). Therefore, the device is capable of performing a
3.3-V to 2.5-V conversion. Quiescent current is 125 µA at full load and drops down to less than 1 µA when the
device is disabled. The TPS757xx is designed to have fast transient response for large load current changes.
TPS75733
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
TPS75715
LOAD TRANSIENT RESPONSE
250
VDO – Dropout Voltage – mV
200
150
100
VO = 1.5 V
Co = 100 µF
100
50
0
–50
di + 0.75 A
µs
dt
–100
–150
50
4
2
0
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
0
20
40
60
I O – Output Current – A
∆ VO – Change in Output Voltage – mV
150
IO = 3 A
VO = 3.3 V
80 100 120 140 160 180 200
t – Time – µs
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
description (continued)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 150 mV
at an output current of 3 A for the TPS75733) and is directly proportional to the output current. Additionally, since
the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output
loading (typically 125 µA over the full range of output current). These two key specifications yield a significant
improvement in operating life for battery-powered systems.
The device is enabled when EN is connected to a low-level voltage. This LDO family also features a sleep mode;
applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than
1 µA at TJ = 25°C. The power-good terminal (PG) is an active low, open drain output, which can be used to
implement a power-on reset or a low-battery indicator.
The TPS757xx is offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version
(programmable over the range of 1.22 V to 5 V). Output voltage tolerance is specified as a maximum of 3% over
line, load, and temperature ranges. The TPS757xx family is available in a 5-pin TO–220 (KC) and TO–263 (KTT)
packages.
AVAILABLE OPTIONS
TJ
– 40°C to 125°C
OUTPUT VOLTAGE
(TYP)
TO–220 (KC)
TO–263(KTT)
3.3 V
TPS75733KC
TPS75733KTT
2.5 V
TPS75725KC
TPS75725KTT
1.8 V
TPS75718KC
TPS75718KTT
1.5 V
TPS75715KC
TPS75715KTT
Adjustable 1.22 V to 5 V
TPS75701KC
TPS75701KTT
NOTE: The TPS75701 is programmable using an external resistor divider (see application
information). The KTT package is available taped and reeled. Add an R suffix to the
device type (e.g., TPS75701KTTR) to indicate tape and reel.
VI
2
IN
PG
OUT
1 µF
5
PG
4
VO
1
EN
+
GND
Co†
47 µF
3
† See application information section for capacitor selection details.
Figure 1. Typical Application Configuration (For Fixed Output Options)
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
functional block diagram—adjustable version
VOUT
VIN
Current
Sense
UVLO
SHUTDOWN
ILIM
R1
_
GND
+
FB
EN
UVLO
R2
Thermal
Shutdown
VIN
External to
the Device
Bandgap
Reference
Vref = 1.22 V
functional block diagram—fixed version
VOUT
VIN
UVLO
Current
Sense
SHUTDOWN
ILIM
_
R1
+
GND
UVLO
EN
R2
Thermal
Shutdown
Vref = 1.22 V
VIN
Bandgap
Reference
PG
Falling
Edge Delay
Terminal Functions (TPS757xx)
TERMINAL
NAME
NO.
I/O
DESCRIPTION
EN
1
I
Enable input
FB/PG
5
I
Feedback input voltage for adjustable device/PG output for fixed options
GND
3
IN
2
I
Input voltage
OUTPUT
4
O
Regulated output voltage
Regulator ground
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
TPS757xx PG timing diagram
VIN1
VUVLO
VUVLO
t
VOUT
VIT +(see Note A)
Threshold
Voltage
VIT –
(see Note A)
t
PG
Output
t
NOTE: VIT –Trip voltage is typically 9% lower than the output voltage (91%VO). VIT– to VIT+ is the hysteresis voltage.
detailed description
The TPS757xx family includes four fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, and 3.3 V), and an
adjustable regulator, the TPS75701 (adjustable from 1.22 V to 5 V). The bandgap voltage is typically 1.22 V.
pin functions
enable (EN)
The EN terminal is an input which enables or shuts down the device. If EN is a logic high, the device will be in
shutdown mode. When EN goes to logic low, the device will be enabled.
power-good (PG)
The PG terminal for the fixed voltage option devices is an open drain, active low output that indicates the status
of VO (output of the LDO). When VO reaches approximately 91% of the regulated voltage, PG will go to a low
impedance state. It will go to a high-impedance state when VO falls below approximately 89% (i.e. over load
condition) of the regulated voltage. The open drain output of the PG terminal requires a pullup resistor.
feedback (FB)
FB is an input terminal used for the adjustable-output option and must be connected to the output terminal either
directly, in order to generate the minimum output voltage of 1.22 V, or through an external feedback resistor
divider for other output voltages. The FB connection should be as short as possible. It is essential to route it in
such a way to minimize/avoid noise pickup. Adding RC networks between FB terminal and VO to filter noise is
not recommended because it may cause the regulator to oscillate.
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
detailed description (continued)
input voltage (IN)
The VIN terminal is an input to the regulator.
output voltage (OUTPUT)
The VOUTPUT terminal is an output to the regulator.
absolute maximum ratings over operating junction temperature range (unless otherwise noted)Ĕ
Input voltage range‡, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 6 V
Voltage range at EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
Maximum PG voltage (fixed options only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Peak output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally limited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Tables
Output voltage, VO (OUTPUT, FB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
ESD rating, HBM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
ESD rating, CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 V
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡ All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE
PACKAGE
RθJC (°C/W)
TO–220
2
RθJA (°C/W)§
58.7¶
TO–263
2
38.7#
§ For both packages, the RθJA values were computed using JEDEC high K board (2S2P)
with 1 ounce internal copper plane and ground plane. There was no air flow across the
packages.
¶ RθJA was computed assuming a vertical, free standing TO-220 package with pins
soldered to the board. There is no heatsink attached to the package.
# RθJA was computed assuming a horizontally mounted TO-263 package with pins
soldered to the board. There is no copper pad underneath the package.
recommended operating conditions
Input voltage, VI||
Output voltage range, VO
Output current, IO
MIN
MAX
UNIT
2.8
5.5
V
1.22
5
V
0
3
A
Operating virtual junction temperature, TJ
– 40
125
°C
|| To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load).
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
electrical characteristics over recommended operating junction temperature range (TJ = –40°C to
125°C), VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 100 µF (unless otherwise noted)
PARAMETER
TEST CONDITIONS
1.22 V ≤ VO ≤ 5.5 V,
Adjustable voltage
Out ut voltage
Output
(see Note 2)
MIN
TJ = 25°C
TJ = 0 to 125°C
1 5 V Output
1.5
TJ = 25°C,
2.8 V ≤ VI ≤ 5.5 V
2.8 V < VI < 5.5 V
1 8 V Output
1.8
TJ = 25°C,
2.8 V ≤ VI ≤ 5.5 V
2.8 V < VI < 5.5 V
2 5 V Output
2.5
TJ = 25°C,
3.5 V ≤ VI ≤ 5.5 V
3.5 V < VI < 5.5 V
3 3 V Output
3.3
TJ = 25°C,
4.3 V ≤ VI ≤ 5.5 V
4.3 V < VI < 5.5 V
0.97 VO
1.03 VO
0.98 VO
1.02 VO
1.455
3.399
0.1
5.5
TJ = 25°C
FB = 1.5 V
10
TPS75715
f = 100 Hz,
VI = 2.8 V,
TJ = 25°C,
IO = 3 A
Minimum input voltage for valid PG
IO(PG) = 300 µA,
V(PG) ≤ 0.8 V
PG trip threshold voltage
Fixed options only
PG hysteresis voltage
Fixed options only
VO decreasing
Measured at VO
PG output low voltage
Fixed options only
PG leakage current
Fixed options only
O
ǒVImax * 2.8 VǓ
100
V
O
1000
ǒVImax * ǒVO ) 1 VǓǓ
100
• DALLAS, TEXAS 75265
1000
A
10
µA
1
µA
62
dB
0
V
93
0.5
If VO > 2.5 V then VImin = VO + 1 V, VImax = 5.5 V:
POST OFFICE BOX 655303
14
µA
0.15
NOTES: 1. The adjustable option operates with a 2% tolerance over TJ = 0 to 125 °C.
2. IO = 1 mA to 3 A
3. If VO ≤ 2.5 V then VImin = 2.8 V, VImax = 5.5 V:
Line regulation (mV) + ǒ%ńVǓ
%/V
0.1
89
IO(PG) = 1 mA
%/V
°C
–1
V
µA
A
150
EN = VI
Line regulation (mV) + ǒ%ńVǓ
V
µVrms
35
VO = 0 V
VI = 2.8 V,
V(PG) = 5 V
V
0.04
0.35
EN = VI,
V
3.3
125
TPS75701
6
2.575
3.201
BW = 300 Hz to 50 kHz, TJ = 25°C, VI = 2.8 V
Standby current
V
2.5
Thermal shutdown junction temperature
Power supply ripple
rejection
1.854
2.425
VO + 1 V ≤ VI ≤ 5.5 V, TJ = 25°C
VO + 1 V ≤ VI < 5.5 V
Output current limit
V
1.8
1.746
Load regulation (see Note 2)
FB input current
1.545
200
TPS75715
UNIT
1.5
TJ = 25°C
Output
Out
ut voltage line regulation (∆VO/VO)
(see Note 3)
Output noise voltage
MAX
VO
1.22 V ≤ VO ≤ 5.5 V
1.22 V ≤ VO ≤ 5.5 V,
(see Note 1)
Quiescent current (GND current)
(see Notes 2 and 3)
TYP
%VO
%VO
0.4
V
1
µA
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
electrical characteristics over recommended operating junction temperature range (TJ = –40°C to
125°C), VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 100 µF (unless otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
Input current (EN)
MIN
EN = VI
–1
EN = 0 V
–1
High level EN input voltage
TYP
0
UNIT
1
µA
1
µA
2
V
Low level EN input voltage
VO
MAX
0.7
Dropout voltage,
voltage (3.3
(3 3 V output) (see Note 4)
Discharge transistor current
UVLO
VI
IO = 3 A,
IO = 3 A,
VI = 3.2 V,
VI = 3.2 V
VO = 1.5 V,
TJ = 25°C,
TJ = 25°C
VI rising
TJ = 25°C
V
150
mV
300
10
2.2
25
mA
2.75
V
UVLO hysteresis
TJ = 25°C,
VI falling
100
mV
NOTE 4: IN voltage equals VO(typ) – 100 mV; TPS75715, TPS75718, and TPS75725 dropout voltage limited by input voltage range limitations
(i.e., TPS75733 input voltage is set to 3.2 V for the purpose of this test).
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VO
zo
vs Output current
2, 3
vs Junction temperature
4, 5
Ground current
vs Junction temperature
6
Power supply ripple rejection
vs Frequency
7
Output spectral noise density
vs Frequency
8
Output impedance
vs Frequency
9
vs Input voltage
10
vs Junction temperature
11
Output voltage
VDO
Dropout voltage
VI
Minimum required input voltage
VO
vs Output voltage
12
Line transient response
13, 15
Load transient response
14, 16
Output voltage and enable voltage
vs Time (start-up)
17
Equivalent series resistance
vs Output current
19, 20
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• DALLAS, TEXAS 75265
7
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
TYPICAL CHARACTERISTICS
TPS75733
TPS75715
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.345
1.545
VI = 2.8 V
TJ = 25°C
VI = 4.3 V
TJ = 25°C
1.530
VO – Output Voltage – V
VO – Output Voltage – V
3.330
3.315
3.3
3.285
1.515
1.5
1.485
1.470
3.270
3.255
0
1
1.455
3
2
1
0
Figure 2
TPS75733
TPS75715
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
1.545
VI = 4.3 V
VI = 2.8 V
1.530
VO – Output Voltage – V
3.33
VO – Output Voltage – V
3
Figure 3
3.345
3.315
3.3
3.285
3.255
–40 –25
1.515
1.5
1.485
1.470
3.270
10
5
20
35
50
65 80
95 110 125
1.455
–40 –25 –10
5
20
35
Figure 4
Figure 5
POST OFFICE BOX 655303
50 65
80
95 110 125
TJ – Junction Temperature – °C
TJ – Junction Temperature – °C
8
2
IO – Output Current – A
IO – Output Current – A
• DALLAS, TEXAS 75265
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
TYPICAL CHARACTERISTICS
TPS757xx
TPS75733
GROUND CURRENT
vs
JUNCTION TEMPERATURE
POWER SUPPLY RIPPLE REJECTION
vs
FREQUENCY
90
150
PSRR – Power Supply Ripple Rejection – dB
Ground Current – µ A
VI = 5 V
IO = 3 A
125
100
75
–40 –25 –10
5
20
35
50
65
80
VI = 4.3 V
Co = 100 µF
TJ = 25°C
80
70
IO = 1 mA
60
50
40
30
20
IO = 3 A
10
0
95 110 125
10
100
1k
TJ – Junction Temperature – °C
Figure 6
100k
1M
10M
Figure 7
TPS75733
TPS75733
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
OUTPUT IMPEDANCE
vs
FREQUENCY
2.5
100
VI = 4.3 V
VO = 3.3 V
Co = 100 µF
TJ = 25°C
2
10
z o – Output Impedance – Ω
Output Spectral Noise Density – µ V/ Hz
10k
f – Frequency – Hz
1.5
IO = 3 A
IO = 1 mA
1
VI = 4.3 V
Co = 100 µF
IO = 1 mA
TJ = 25°C
IO = 1 mA
1
0.1
0.01
IO = 3 A
0.001
0.5
0.0001
0
10
100
1k
f – Frequency – Hz
10k
100k
0.00001
10
100
1k
10k
100k
f – Frequency – Hz
1M
10M
Figure 9
Figure 8
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• DALLAS, TEXAS 75265
9
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
TYPICAL CHARACTERISTICS
TPS75701
TPS75733
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
250
250
IO = 3 A
IO = 3 A
VO = 3.3 V
VDO – Dropout Voltage – mV
VDO – Dropout Voltage – mV
TJ = 125°C
200
TJ = 25°C
150
TJ = –40°C
100
50
200
150
100
50
0
2.5
3
3.5
4
VI – Input Voltage – V
4.5
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TJ – Junction Temperature – °C
5
Figure 11
Figure 10
MINIMUM REQUIRED INPUT VOLTAGE
vs
OUTPUT VOLTAGE
TPS75715
LINE TRANSIENT RESPONSE
∆ VO – Change in
Output Voltage – mV
IO = 3 A
TJ = 125°C
TJ = 25°C
TJ = –40°C
3
2.8
2
1.5
VO = 1.5 V
IO = 3 A
Co = 100 µF
50
0
–50
–100
VI – Input Voltage – V
VI– Minimum Required Input Voltage – V
4
1.75
2
2.25 2.5 2.75
3
VO – Output Voltage – V
3.25
3.5
3.8
2.8
0
50
Figure 12
10
100 150 200 250 300 350 400 450 500
t – Time – µs
Figure 13
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
∆ VO – Change in Output Voltage – mV
150
VO = 1.5 V
Co = 100 µF
100
50
–50
di + 0.75 A
µs
dt
–100
–150
4
2
0
0
20
40
60
I O – Output Current – A
0
TPS75733
LINE TRANSIENT RESPONSE
100
VO = 3.3 V
IO = 3 A
Co = 100 µF
50
0
–50
–100
5.3
4.3
0
80 100 120 140 160 180 200
t – Time – µs
50
VI – Input Voltage – V
TPS75715
LOAD TRANSIENT RESPONSE
∆ VO – Change in Output Voltage – mV
TYPICAL CHARACTERISTICS
100 150 200 250 300 350 400 450 500
t – Time – µs
Figure 15
Figure 14
TPS75733
OUTPUT VOLTAGE AND ENABLE VOLTAGE
vs
TIME (START-UP)
VO – Output Voltage – V
100
0
di + 0.75 A
µs
dt
–100
4
2
0
0
20
40
60
80 100 120 140 160 180 200
t – Time – µs
Enable Voltage – V
VO = 3.3 V
Co = 100 µF
200
I O – Output Current – A
∆ VO – Change in Output Voltage – mV
TPS75733
LOAD TRANSIENT RESPONSE
VI = 4.3 V
IO = 10 mA
TJ = 25°C
3.3
0
4.3
0
0
0.2
Figure 16
0.4
0.6
0.8
t – Time (Start-Up) – ms
1
Figure 17
POST OFFICE BOX 655303
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11
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
TYPICAL CHARACTERISTICS
To Load
IN
VI
OUT
+
EN
RL
Co
GND
ESR
Figure 18. Test Circuit for Typical Regions of Stability (Figures 19 and 20) (Fixed Output Options)
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE†
vs
OUTPUT CURRENT
10
Co = 680 µF
TJ = 25°C
ESR – Equivalent Series Resistance –Ω
ESR – Equivalent Series Resistance –Ω
10
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE†
vs
OUTPUT CURRENT
1
Region of Stability
0.1
Co = 47 µF
TJ = 25°C
1
Region of Stability
0.2
Region of Instability
0.015
Region of Instability
0.01
0.01
0
1
2
3
0
IO – Output Current – A
1
2
3
IO – Output Current – A
Figure 19
Figure 20
† Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally,
and PWB trace resistance to Co.
12
POST OFFICE BOX 655303
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TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
THERMAL INFORMATION
The amount of heat that an LDO linear regulator generates is directly proportional to the amount of power it
dissipates during operation. All integrated circuits have a maximum allowable junction temperature (TJmax)
above which normal operation is not assured. A system designer must design the operating environment so
that the operating junction temperature (TJ) does not exceed the maximum junction temperature (TJmax). The
two main environmental variables that a designer can use to improve thermal performance are air flow and
external heatsinks. The purpose of this information is to aid the designer in determining the proper operating
environment for a linear regulator that is operating at a specific power level.
In general, the maximum expected power (PD(max)) consumed by a linear regulator is computed as:
ǒ
*V
P max + V
I(avg)
D
O(avg)
Ǔ
I
O(avg)
) V
I(avg)
xI
(1)
(Q)
Where:
VI(avg) is the average input voltage.
VO(avg) is the average output voltage.
IO(avg) is the average output current.
I(Q) is the quiescent current.
For most TI LDO regulators, the quiescent current is insignificant compared to the average output current;
therefore, the term VI(avg) x I(Q) can be neglected. The operating junction temperature is computed by adding
the ambient temperature (TA) and the increase in temperature due to the regulator’s power dissipation. The
temperature rise is computed by multiplying the maximum expected power dissipation by the sum of the thermal
resistances between the junction and the case (RθJC), the case to heatsink (RθCS), and the heatsink to ambient
(RθSA). Thermal resistances are measures of how effectively an object dissipates heat. Typically, the larger the
device, the more surface area available for power dissipation and the lower the object’s thermal resistance.
Figure 21 illustrates these thermal resistances for (a) a TO–220 package attached to a heatsink, and (b) a
TO–263 package mounted on a JEDEC High-K board.
C
B
A
TJ
RθJC
A
B
A
B
TC
RθCS
C
RθSA
TA
TO–263 Package
(b)
C
TO–220 Package
(a)
Figure 21. Thermal Resistances
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13
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
THERMAL INFORMATION
Equation 2 summarizes the computation:
T
J
ǒ
Ǔ
+ T ) P Dmax x R
) R
) R
A
θJC
θCS
θSA
(2)
The RθJC is specific to each regulator as determined by its package, lead frame, and die size provided in the
regulator’s datasheet. The RθSA is a function of the type and size of heatsink. For example, black body radiator
type heatsinks, like the one attached to the TO–220 package in Figure 21(a), can have RθCS values ranging
from 5°C/W for very large heatsinks to 50°C/W for very small heatsinks. The RθCS is a function of how the
package is attached to the heatsink. For example, if a thermal compound is used to attach a heatsink to a
TO–220 package, RθCS of 1°C/W is reasonable.
Even if no external black body radiator type heatsink is attached to the package, the board on which the regulator
is mounted will provide some heatsinking through the pin solder connections. Some packages, like the TO–263
and TI’s TSSOP PowerPAD packages, use a copper plane underneath the package or the circuit board’s
ground plane for additional heatsinking to improve their thermal performance. Computer aided thermal
modeling can be used to compute very accurate approximations of an integrated circuit’s thermal performance
in different operating environments (e.g., different types of circuit boards, different types and sizes of heatsinks,
and different air flows, etc.). Using these models, the three thermal resistances can be combined into one
thermal resistance between junction and ambient (RθJA). This RθJA is valid only for the specific operating
environment used in the computer model.
Equation 2 simplifies into equation 3:
T
J
+ T ) P Dmax x R
A
θJA
(3)
Rearranging equation 3 gives equation 4:
R
θJA
+
T J–T A
(4)
P Dmax
Using equation 3 and the computer model generated curves shown in Figures 22 and 25, a designer can quickly
compute the required heatsink thermal resistance/board area for a given ambient temperature, power
dissipation, and operating environment.
PowerPAD is a trademark of Texas Instruments.
14
POST OFFICE BOX 655303
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TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
THERMAL INFORMATION
TO–220 power dissipation
The TO–220 package provides an effective means of managing power dissipation in through-hole applications.
The TO–220 package dimensions are provided in the Mechanical Data section at the end of the data sheet. A
heatsink can be used with the TO–220 package to effectively lower the junction-to-ambient thermal resistance.
To illustrate, the TPS75725 in a TO–220 package was chosen. For this example, the average input voltage is
3.3 V, the output voltage is 2.5 V, the average output current is 3 A, the ambient temperature 55°C, the air flow
is 150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current,
the maximum average power is:
P Dmax + (3.3 – 2.5) V x 3 A + 2.4 W
(5)
Substituting TJmax for TJ into equation 4 gives equation 6:
R
max + (125 – 55)°Cń2.4 W + 29°CńW
θJA
(6)
From Figure 22, RθJA vs Heatsink Thermal Resistance, a heatsink with RθSA = 22°C/W is required to dissipate
2.4 W. The model operating environment used in the computer model to construct Figure 22 consisted of a
standard JEDEC High-K board (2S2P) with a 1 oz. internal copper plane and ground plane. Since the package
pins were soldered to the board, 450 mm2 of the board was modeled as a heatsink. Figure 23 shows the side
view of the operating environment used in the computer model.
THERMAL RESISTANCE
vs
HEATSINK THERMAL RESISTANCE
65
Rθ JA – Thermal Resistance – ° C/W
Natural Convection
55
Air Flow = 150 LFM
45
Air Flow = 250 LFM
Air Flow = 500 LFM
35
25
15
No Heatsink
5
25
20
15
10
5
RθSA – Heatsink Thermal Resistance – °C/W
0
Figure 22
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TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
THERMAL INFORMATION
TO–220 power dissipation (continued)
0.21 mm
0.21 mm
1 oz. Copper
Power Plane
1 oz. Copper
Ground Plane
Figure 23
From the data in Figure 22 and rearranging equation 4, the maximum power dissipation for a different heatsink
RθSA and a specific ambient temperature can be computed (see Figure 24).
POWER DISSIPATION
vs
HEATSINK THERMAL RESISTANCE
10
PD – Power Dissipation Limit – W
TA = 55°C
Air Flow = 500 LFM
Air Flow = 250 LFM
Air Flow = 150 LFM
Natural Convection
No Heatsink
1
20
10
RθSA – Heatsink Thermal Resistance – °C/W
Figure 24
16
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0
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
THERMAL INFORMATION
TO–263 power dissipation
The TO–263 package provides an effective means of managing power dissipation in surface mount
applications. The TO–263 package dimensions are provided in the Mechanical Data section at the end of the
data sheet. The addition of a copper plane directly underneath the TO–263 package enhances the thermal
performance of the package.
To illustrate, the TPS75725 in a TO–263 package was chosen. For this example, the average input voltage is
3.3 V, the output voltage is 2.5 V, the average output current is 3 A, the ambient temperature 55°C, the air flow
is 150 LFM, and the operating environment is the same as documented below. Neglecting the quiescent current,
the maximum average power is:
P Dmax + (3.3 – 2.5) V x 3 A + 2.4 W
(7)
Substituting TJmax for TJ into equation 4 gives equation 8:
R
max + (125 – 55)°Cń2.4 W + 29°CńW
θJA
(8)
From Figure 25, RθJA vs Copper Heatsink Area, the ground plane needs to be 2 cm2 for the part to dissipate
2.4 W. The model operating environment used in the computer model to construct Figure 25 consisted of a
standard JEDEC High-K board (2S2P) with a 1 oz. internal copper plane and ground plane. The package is
soldered to a 2 oz. copper pad. The pad is tied through thermal vias to the 1 oz. ground plane. Figure 26 shows
the side view of the operating environment used in the computer model.
THERMAL RESISTANCE
vs
COPPER HEATSINK AREA
40
Rθ JA – Thermal Resistance – ° C/W
No Air Flow
35
150 LFM
30
250 LFM
25
20
15
0
0.01
0.1
1
10
Copper Heatsink Area – cm2
100
Figure 25
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17
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
THERMAL INFORMATION
TO–263 power dissipation (continued)
2 oz. Copper Solder Pad
with 25 Thermal Vias
1 oz. Copper
Power Plane
1 oz. Copper
Ground Plane
Thermal Vias, 0.3 mm
Diameter, 1.5 mm Pitch
Figure 26
From the data in Figure 25 and rearranging equation 4, the maximum power dissipation for a different ground
plane area and a specific ambient temperature can be computed (see Figure 27).
MAXIMUM POWER DISSIPATION
vs
COPPER HEATSINK AREA
PD – Maximum Power Dissipation – W
5
TA = 55°C
250 LFM
4
150 LFM
3
No Air Flow
2
1
0
0.01
0.1
1
10
Copper Heatsink Area – cm2
Figure 27
18
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• DALLAS, TEXAS 75265
100
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
APPLICATION INFORMATION
programming the TPS75701 adjustable LDO regulator
The output voltage of the TPS75701 adjustable regulator is programmed using an external resistor divider as
shown in Figure 28. The output voltage is calculated using:
V
O
+V
ǒ1 ) R1
Ǔ
R2
ref
(9)
Where:
Vref = 1.224 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 40-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 30.1 kΩ to set the divider current at 40 µA and then calculate R1 using:
R1 +
ǒ
V
V
Ǔ
O *1
ref
(10)
R2
TPS75701
VI
OUTPUT VOLTAGE
PROGRAMMING GUIDE
IN
1 µF
OUTPUT
VOLTAGE
≥2V
EN
≤ 0.7 V
OUT
VO
R1
Co
FB
GND
R1
R2
UNIT
2.5 V
31.4
30.1
kΩ
3.3 V
51
30.1
kΩ
3.6 V
58.3
30.1
kΩ
R2
Figure 28. TPS75701 Adjustable LDO Regulator Programming
regulator protection
The TPS757xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS757xx also features internal current limiting and thermal protection. During normal operation, the
TPS757xx limits output current to approximately 10 A. When current limiting engages, the output voltage scales
back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device
failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of
the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below
130°C(typ), regulator operation resumes.
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19
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
APPLICATION INFORMATION
input capacitor
For a typical application, a ceramic input bypass capacitor (0.22 µF – 1 µF) is recommended to ensure device
stability. This capacitor should be as close as possible to the input pin. Due to the impedance of the input supply,
large transient currents will cause the input voltage to droop. If this droop causes the input voltage to drop below
the UVLO threshold, the device will turn off. Therefore, it is recommended that a larger capacitor be placed in
parallel with the ceramic bypass capacitor at the regulator’s input. The size of this capacitor depends on the
output current, response time of the main power supply, and the main power supply’s distance to the regulator.
At a minimum, the capacitor should be sized to ensure that the input voltage does not drop below the minimum
UVLO threshold voltage during normal operating conditions.
output capacitor
As with most LDO regulators, the TPS757xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance value is 47 µF with an ESR
(equivalent series resistance) of at least 200 mΩ. As shown in Figure 29, most capacitor and ESR combinations
with a product of 47e–6 x 0.2 = 9.4e–6 or larger will be stable, provided the capacitor value is at least 47 µF.
Solid tantalum electrolytic and aluminum electrolytic capacitors are all suitable, provided they meet the
requirements described in this section. Larger capacitors provide a wider range of stability and better load
transient response.
This information along with the ESR graphs, Figures 19, 20, and 29, is included to assist in selection of suitable
capacitance for the user’s application. When necessary to achieve low height requirements along with high
output current and/or high load capacitance, several higher ESR capacitors can be used in parallel to meet
these guidelines.
OUTPUT CAPACITANCE
vs
EQUIVALENT SERIES RESISTANCE
1000
Output Capacitance – µ F
Region of Stability
100
ESR min x Co = Constant
47
Region x
ofCInstability
Y = ESRmin
o
10
0.01
0.1
ESR – Equivalent Series Resistance – Ω
Figure 29
20
POST OFFICE BOX 655303
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0.2
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
MECHANICAL DATA
KC (R-PSFM-T5)
PLASTIC FLANGE-MOUNT
0.113 (2,87)
0.103 (2,62)
0.420 (10,67)
0.380 (9,65)
0.156 (3,96)
DIA
0.146 (3,71)
0.185 (4,70)
0.175 (4,46)
0.055 (1,40)
0.045 (1,14)
0.147 (3,73)
0.137 (3,48)
0.340 (8,64)
0.330 (8,38)
0.125 (3,18)
(see Note C)
0.040 (1,02)
0.030 (0,76)
0.010 (0,25) M
1
1.010 (25,64)
0.990 (25,14)
5
0.067 (1,70)
0.268 (6,81)
0.122 (3,10)
0.102 (2,59)
0.025 (0,64)
0.012 (0,30)
4040208 / D 01/00
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Lead dimensions are not controlled within this area.
All lead dimensions apply before solder dip.
The center lead is in electrical contact with the mounting tab.
POST OFFICE BOX 655303
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21
TPS75715, TPS75718, TPS75725, TPS75733 WITH POWER GOOD AND
TPS75701 FAST-TRANSIENT RESPONSE 3-A LOW-DROPOUT
VOLTAGE REGULATORS
SLVS306D – NOVEMBER 2000 – REVISED MAY 2002
MECHANICAL DATA
KTT (R-PSFM-G5)
PLASTIC FLANGE-MOUNT
0.405 (10,29)
0.395 (10,03)
0.058 (1,47)
0.052 (1,32)
0.185 (4,70)
0.175 (4,45)
0.050 (1,27) NOM
0.107 (2,72)
0.340 (8,64)
0.330 (8,38)
0.610 (15,49)
0.590 (14,99)
0.103 (2,62)
0.010 (0,25)
0.001 (0,03)
1
0.067 (1,70)
0.268 (6,81)
5
Seating Plane
0.035 (0,89)
0.029 (0,74)
0.004 (0,10)
0.010 (0,25) M
0.021 (0,53)
0.015 (0,38)
0.110 (2,79)
0.090 (2,29)
0°–ā5°
4200577/A 09/99
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
22
POST OFFICE BOX 655303
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PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS75701KC
ACTIVE
TO-220
KC
5
TPS75701KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
TPS75701KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
TPS75701KTTT
ACTIVE
DDPAK/
TO-263
KTT
TPS75715KC
ACTIVE
TO-220
TPS75715KTT
OBSOLETE
TPS75715KTTR
50
Lead/Ball Finish
MSL Peak Temp (3)
None
CU SN
Level-NA-NA-NA
None
Call TI
Call TI
500
None
CU SN
Level-2-220C-1 YEAR
5
50
None
CU SN
Level-2-220C-1 YEAR
KC
5
50
None
CU SN
Level-NA-NA-NA
DDPAK/
TO-263
KTT
5
None
Call TI
Call TI
ACTIVE
DDPAK/
TO-263
KTT
5
500
None
CU SN
Level-2-220C-1 YEAR
TPS75715KTTT
ACTIVE
DDPAK/
TO-263
KTT
5
50
None
CU SN
Level-2-220C-1 YEAR
TPS75718KC
ACTIVE
TO-220
KC
5
50
None
CU SN
Level-NA-NA-NA
TPS75718KCG3
ACTIVE
TO-220
KC
5
50
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS75718KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
None
Call TI
Call TI
TPS75718KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
500
None
CU SN
Level-2-220C-1 YEAR
TPS75718KTTT
ACTIVE
DDPAK/
TO-263
KTT
5
50
None
CU SN
Level-2-220C-1 YEAR
50
None
CU SN
Level-NA-NA-NA
None
Call TI
Call TI
TPS75725KC
ACTIVE
TO-220
KC
5
TPS75725KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
TPS75725KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
500
None
CU SN
Level-2-220C-1 YEAR
TPS75725KTTRG3
ACTIVE
DDPAK/
TO-263
KTT
5
500
Green (RoHS &
no Sb/Br)
CU SN
Level-2-260C-1 YEAR
TPS75725KTTT
ACTIVE
DDPAK/
TO-263
KTT
5
50
None
CU SN
Level-2-220C-1 YEAR
TPS75733KC
ACTIVE
TO-220
KC
5
50
None
CU SN
Level-NA-NA-NA
TPS75733KTT
OBSOLETE
DDPAK/
TO-263
KTT
5
None
Call TI
Call TI
TPS75733KTTR
ACTIVE
DDPAK/
TO-263
KTT
5
500
None
CU SN
Level-2-220C-1 YEAR
TPS75733KTTT
ACTIVE
DDPAK/
TO-263
KTT
5
50
None
CU SN
Level-2-220C-1 YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
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Use of such information may require a license from a third party under the patents or other intellectual property
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