RCD SP10-10NS

PASSIVE DELAY LINES, TAPPED, SIP PACKAGE
SP05 SERIES - 7 PIN, 5 TAP
SP10 SERIES - 14 PIN, 10 TAP
OPTIONS
Custom circuits available
Non-standard delay times & impedance values
Tighter tolerance or temperature coefficient
Faster rise times
MIL-D-23859 screening
Increased operating temperature range
.015
[.38]
↓
.100 ↑
[2.54]
Min. ↓
.800 [20.3] Max.→
1
2
3
4
5
6
→
.250↑
[6.35]
Max.
↓
7
← .200
[5.08]
Max.
→ ← .024 [.6]
←
→
.600 [15.2]
←
→
RoHS
Total Delay Tolerance
±5% or ±0.5nS (whichever is greater)
Tap Delay Tolerance
±5% or ±0.5nS (whichever is greater)
Temperature Coefficient
100ppm/°C Max.
Insulation Resistance
1000MΩ min.
Dielectric Strength
100V D C
Distortion
±10% Max.
Operating Temp. Range
0 to70°C (Opt.39= -40 to 85°C, ER= -55 to125°C)
Operating Freq. (BW)
BW (MHz)=.35/(TR nS x 1000)
SP05= 2-5%, SP10=2.5-4% @50Ω,
Attenuation: (dependent on
impedance, low values have 5-8% @100Ω, 5-10% @200Ω, 5-15% @300Ω,
7-20% @ 500Ω
lower attenuation)
TYPE SP10
TYPE SP05 (Available 5nS to 100nS)
←
Term.W is
RoHS
compliant
RCD’s SP05 and SP10 passive delay line series are a lumped
constant design per applicable portions of MIL-D-23859. The units
incorporate high performance inductors and multi-layer capacitors,
ensuring stable transmission, low temperature coefficient, and
excellent environmental performance in space-saving SIP design.
Low cost, prompt delivery!
Wide variety of values, 5nS to 750nS
Fast rise times
Detailed application handbook available
.100
[2.54]
.03
[.77]
↓
.100 ↑
[2.54]
Min. ↓
1
2
3
4
5
6
7
8
1 (GND)
.215
[5.46]
←
.375 ↑
[9.53]
Max.
↓
9 10 11 12 13 14
→ ← .024 [.6]
4
→
5
6
7
8
9
10 11
←
.100
[2.54]
12
(IN) 3
13 (OUT)
(GND) 1
14 (GND)
TYPE SP10, 14 PIN 10 TAPS
TYPE SP05, 7 PIN 5 TAPS
Total
Delay, TD
(nS)
Max. Rise
Time, TR
(nS)
Delay
per TAP
(nS)
Available
Impedance
Values (±10% )
5
10
20
25
30
2.0
3.3
6.0
7.8
9.0
1.0 ± .3
2.0 ± .4
4.0 ± .6
5.0 ± 1
6.0 ± 1
50Ω, 100Ω
50Ω, 100Ω
50Ω, 100Ω
50Ω, 100Ω
50Ω, 100Ω
40
50
60
70
75
12
15
18
22
23
8 ± 1.5
10 ± 1.8
12 ± 2
14 ± 2
15 ± 3
50Ω, 100Ω
50Ω, 100Ω
50Ω
50Ω
50Ω
80
90
100
24
27
28
16 ± 3
18 ± 3
20 ± 3
50Ω
50Ω
50Ω
P/N DESIGNATION:
→
1.3 [33.0]
7 (OUT)
(GND) 1
(Available 10nS to 750nS)
1.465 [37.2] Max.
3 4 5 6
(IN) 2
RESISTORSCAPACITORSCOILSDELAY LINES
SP10
- 10NS - 101 B W
RCD Type
Options: as assigned by RCD
(leave blank if std.)
Total Delay
Impedance in 3 digit code: 50R=50Ω,
101=100Ω, 201=200Ω, 301=300Ω, 501=500Ω,
Packaging: B=Bulk
Termination: W= Lead-free, Q= Tin/Lead (leave blank
if either is acceptable)
Total
Delay, TD
(nS)
10
20
30
40
50
60
75
100
120
150
200
250
300
500
600
750
Max. Rise
Time, TR
(nS)
3
5.5
6.5
8
10
12
15
20
24
30
40
50
60
100
120
150
Delay
per TAP
(nS)
1.0 ± .5
2.0 ± .75
3.0 ± 1
4.0 ± 2
5.0 ± 2
6.0 ± 2
7.5 ± 2
10 ± 2
12 ± 2
15 ± 2
20 ± 2
25 ± 2
30 ± 2
50 ± 2.5
60 ± 3
75 ± 3.75
Available
Impedance
Values (±10% )
100Ω
50Ω, 100Ω, 200Ω
50Ω, 100Ω, 200Ω
50Ω, 100Ω, 200Ω, 300Ω
50Ω, 100Ω, 200Ω, 300Ω, 500Ω
50Ω, 100Ω, 200Ω, 300Ω, 500Ω
50Ω, 100Ω, 200Ω, 300Ω, 500Ω
50Ω, 100Ω, 200Ω, 300Ω, 500Ω
50Ω, 100Ω, 200Ω, 300Ω, 500Ω
50Ω, 100Ω, 200Ω, 300Ω, 500Ω
50Ω, 100Ω, 200Ω, 300Ω, 500Ω
50Ω, 100Ω, 200Ω, 300Ω, 500Ω
100Ω, 200Ω, 300Ω, 500Ω 100Ω,
200Ω, 300Ω, 500Ω
300Ω, 500Ω
300Ω, 500Ω
TEST CONDITIONS @25°C
1.) Input test pulse shall have a pulse amplitude of 2.5
volts, rise time of 2nS, and pulse width of 5X total delay.
2.) Delay line to be terminated to within 1% of its charac
teristic impedance.
3.) Delay time measured from 50% of input pulse to 50%
of output pulse on leading edge with no loads on output.
4.) Rise time measured from 10% to 90% of output pulse.
RCD Components Inc, 520 E.Industrial Park Dr, Manchester, NH, USA 03109 rcdcomponents.com Tel: 603-669-0054 Fax: 603-669-5455 Email:[email protected]
FA106
Sale of this product is in accordance with GF-061. Specifications subject to change without notice.
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