SCAS514E − JUNE 1995 − REVISED OCTOBER 2003
D 2-V to 6-V VCC Operation
D Inputs Accept Voltages to 6 V
D Max tpd of 7.5 ns at 5 V
SN54AC244 . . . J OR W PACKAGE
SN74AC244 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
description/ordering information
These octal buffers and line drivers are designed
specifically to improve the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters.
The ’AC244 devices are organized as two 4-bit
buffers/drivers with separate output-enable (OE)
inputs. When OE is low, the device passes
noninverted data from the A inputs to the Y
outputs. When OE is high, the outputs are in the
high-impedance state.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
1Y1
2A4
1Y2
2A3
1Y3
2Y1
GND
2A1
1Y4
2A2
1A2
2Y3
1A3
2Y2
1A4
2OE
2Y4
1A1
1OE
VCC
SN54AC244 . . . FK PACKAGE
(TOP VIEW)
ORDERING INFORMATION
PDIP − N
SN74AC244N
Tube
SN74AC244DW
Tape and reel
SN74AC244DWR
SOP − NS
Tape and reel
SN74AC244NSR
AC244
SSOP − DB
Tape and reel
SN74AC244DBR
AC244
Tube
SN74AC244PW
Tape and reel
SN74AC244PWR
CDIP − J
Tube
SNJ54AC244J
SNJ54AC244J
CFP − W
Tube
SNJ54AC244W
SNJ54AC244W
LCCC − FK
Tube
SNJ54AC244FK
SNJ54AC244FK
TSSOP − PW
−55°C
125°C
−55
C to 125
C
TOP-SIDE
MARKING
Tube
SOIC − DW
−40°C
85°C
−40
C to 85
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SN74AC244N
AC244
AC244
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
!"# $ %&'# "$ (&)*%"# +"#',
+&%#$ %! # $('%%"#$ (' #-' #'!$ '."$ $#&!'#$
$#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+'
#'$#1 "** (""!'#'$,
(+&%#$ %!(*"# # 23 "** (""!'#'$ "' #'$#'+
&*'$$ #-'/$' #'+, "** #-' (+&%#$ (+&%#
(%'$$1 +'$ # '%'$$"*0 %*&+' #'$#1 "** (""!'#'$,
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1
SCAS514E − JUNE 1995 − REVISED OCTOBER 2003
FUNCTION TABLE
(each buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
logic diagram (positive logic)
1OE
1A1
1A2
1A3
1A4
1
2OE
2
18
4
16
6
14
8
12
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
19
11
9
13
7
15
5
17
3
2Y1
2Y2
2Y3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SCAS514E − JUNE 1995 − REVISED OCTOBER 2003
recommended operating conditions (see Note 3)
SN54AC244
VCC
VIH
Supply voltage
VCC = 3 V
VCC = 4.5 V
High-level input voltage
VCC = 5.5 V
VCC = 3 V
VIL
VI
VO
IOH
IOL
∆t/∆v
MIN
MAX
2
6
Input voltage
Low-level output current
2
6
3.15
3.15
3.85
3.85
0
High-level output current
MAX
2.1
0
Output voltage
MIN
2.1
VCC = 4.5 V
VCC = 5.5 V
Low-level input voltage
SN74AC244
0.9
1.35
1.35
1.65
1.65
0
0
VCC
VCC
VCC = 3 V
VCC = 4.5 V
−12
−12
−24
−24
VCC = 5.5 V
VCC = 3 V
−24
−24
12
12
VCC = 4.5 V
VCC = 5.5 V
24
24
24
24
8
8
Input transition rise or fall rate
V
V
0.9
VCC
VCC
UNIT
V
V
V
mA
mA
ns/V
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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3
SCAS514E − JUNE 1995 − REVISED OCTOBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
IOH = −50 µA
IOH = −12 mA
VOH
IOH = −24 mA
MAX
SN74AC244
MIN
3V
2.9
2.9
2.9
4.5 V
4.4
4.4
4.4
5.5 V
5.4
5.4
5.4
3V
2.56
2.4
2.46
4.5 V
3.86
3.7
3.76
5.5 V
4.86
4.7
4.76
MAX
3V
0.1
0.1
0.1
4.5 V
0.1
0.1
0.1
5.5 V
0.1
0.1
0.1
3.85
3.85
3V
0.36
0.5
0.44
4.5 V
0.36
0.5
0.44
5.5 V
0.36
0.5
0.44
5.5 V
1.65
± 0.1
±1
±1
± 0.1
±1
±1
5.5 V
± 0.25
±5
± 2.5
µA
5.5 V
4
80
40
µA
5.5 V
IOZ
VO = VCC or GND,
VI(OE) = VIL or VIH
ICC
Ci
VI = VCC or GND,
VI = VCC or GND
5V
2.5
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
switching characteristics over recommended operating
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
4
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
V
1.65
5.5 V
IO = 0
UNIT
V
IOL = 50 µA
VI = VCC or GND
VI = VCC or GND
Control inputs
MIN
5.5 V
IOL = 50 mA†
IOL = 75 mA†
II
SN54AC244
5.5 V
IOL = 24 mA
Data inputs
TA = 25°C
TYP
MAX
IOH = −50 mA†
IOH = −75 mA†
IOL = 12 mA
VOL
MIN
POST OFFICE BOX 655303
MIN
free-air
TA = 25°C
TYP
MAX
pF
temperature
SN54AC244
range,
SN74AC244
MIN
MAX
MIN
MAX
2
6.5
9
1
12.5
1.5
10
2
6.5
9
1
12
2
10
2
6
10.5
1
11.5
1.5
11
2.5
7.5
10
1
13
2
11
3
7
10
1
12.5
1.5
10.5
2.5
7.5
10.5
1
13
2.5
11.5
• DALLAS, TEXAS 75265
A
µA
UNIT
ns
ns
ns
SCAS514E − JUNE 1995 − REVISED OCTOBER 2003
switching characteristics over recommended operating
VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
Y
tPZH
tPZL
OE
Y
tPHZ
tPLZ
OE
Y
free-air
MIN
TA = 25°C
TYP
MAX
1.5
5
1.5
5
1.5
temperature
SN54AC244
range,
SN74AC244
MIN
MAX
MIN
MAX
7
1
9.5
1
7.5
7
1
9
1
7.5
5
7
1
9
1.5
8
1.5
5.5
8
1
10.5
1.5
8.5
2.5
6.5
9
1
10.5
1
9.5
2
6.5
9
1
11
2
9.5
UNIT
ns
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance per buffer/driver
CL = 50 pF,
TYP
f = 1 MHz
45
UNIT
pF
PARAMETER MEASUREMENT INFORMATION
2 × VCC
S1
500 Ω
From Output
Under Test
CL = 50 pF
(see Note A)
Open
500 Ω
Output
Control
(low-level
enabling)
LOAD CIRCUIT
Input
VCC
50% VCC
50% VCC
0V
tPLH
tPHL
Output
VOH
50% VCC
VOL
50% VCC
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2 × VCC
Open
VCC
50% VCC
50% VCC
0V
tPLZ
tPZL
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
≈VCC
50% VCC
tPHZ
tPZH
Output
Waveform 2
S1 at Open
(see Note B)
VOLTAGE WAVEFORMS
VOL + 0.3 V
VOL
50% VCC
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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5
MCFP006B − JANUARY 1995 − REVISED JULY 2003
W (R-GDFP-F20)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.300 (7,62)
0.245 (6,22)
0.045 (1,14)
0.026 (0,66)
0.009 (0,23)
0.004 (0,10)
0.100 (2,54)
0.045 (1,14)
0.320 (8,13) MAX
1
0.022 (0,56)
0.015 (0,38)
20
0.050 (1,27)
0.540 (13,72)
MAX
0.005 (0,13) MIN
4 Places
10
11
0.370 (9,40)
0.250 (6,35)
0.370 (9,40)
0.250 (6,35)
4040180-4 /D 07/03
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only.
Falls within Mil-Std 1835 GDFP2-F20
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MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
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MECHANICAL
MPDI002C – JANUARY 1995 – REVISED DECEMBER 20002
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
1.060
(26,92)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
MS-100
VARIATION
AA
BB
AC
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
C
AD
8
0.070 (1,78)
0.045 (1,14)
0.045 (1,14)
0.030 (0,76)
D
D
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.430 (10,92) MAX
0.021 (0,53)
0.015 (0,38)
0.010 (0,25) M
14/18 PIN ONLY
20 pin vendor option
D
4040049/E 12/2002
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001, except 18 and 20 pin minimum body lrngth (Dim A).
D. The 20 pin end lead shoulder width is a vendor option, either half or full width.
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MECHANICAL DATA
MSOI003E – JANUARY 1995 – REVISED SEPTEMBER 2001
DW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
16 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
9
0.050 (1,27)
16
0.010 (0,25)
0.419 (10,65)
0.400 (10,15)
0.010 (0,25) NOM
0.299 (7,59)
0.291 (7,39)
Gage Plane
0.010 (0,25)
1
8
0°– 8°
0.050 (1,27)
0.016 (0,40)
A
Seating Plane
0.104 (2,65) MAX
0.012 (0,30)
0.004 (0,10)
PINS **
0.004 (0,10)
16
18
20
24
28
A MAX
0.410
(10,41)
0.462
(11,73)
0.510
(12,95)
0.610
(15,49)
0.710
(18,03)
A MIN
0.400
(10,16)
0.453
(11,51)
0.500
(12,70)
0.600
(15,24)
0.700
(17,78)
DIM
4040000/E 08/01
NOTES: A.
B.
C.
D.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
Falls within JEDEC MS-013
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MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
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MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Amplifiers
Applications
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
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