ANPEC APL5301-46B

APL5301/2
Low IQ, Low Dropout 300mA Fixed Voltage Regulator
Features
General Description
•
•
The APL5301/2 series are micropower, low noise, low
dropout linear regulators, which operate from 3V to
6V input voltage and deliver up to 300mA. Typical
dropout voltage is only 260mV at 300mA loading. Designed for use in battery-powered system, the low 50uA
quiescent current makes it an ideal choice. Design
with an internal P-channel MOSFET pass transistor,
the APL5301/2 maintain a low supply current, independent of the load current and dropout voltage.
Other features include reverse current protection, thermal-shutdown protection, current limit protection to
ensure specified output current and controlled shortcircuit current. The APL5301/2 regulators come in a
miniature SOP-8, SOT-23, SOT-23-5, SOT-89 and
SOT-89-5 packages.
•
•
Low Quiescent Current : 50uA (No load)
Low Dropout Voltage : 400mV
(VOUT(Nominal)=3.0V Version @300mA)
Very low Shutdown Current : < 0.5uA
Fixed Output Voltage : 1.3V ~ 5.0V
by step 0.1V increment
Stable with 1uF Output Capacitor
Stable with Aluminum, Tantalum or Ceramic
Capacitors .
Reverse Current Protection
No Protection Diodes Needed
•
Built in Thermal Protection
•
•
Built in Current Limit Protection
Controlled Short Circuit Current : 50mA
•
•
Fast Transient Response
Short Setting Time
SOP-8, SOT-23, SOT-23-5, SOT-89,
and SOT-89-5 Packages
•
•
•
•
•
Pin Configuration
V IN
T A B is V IN
3
Applications
•
•
•
1
2
1
2
G ND
V OUT
GND
V IN
SOT-23 (Top View)
APL5301
Notebook Computer
PDA or Portable Equipments
Noise-Sensitive Instrumentation Systems
1
GND
2
V IN
3
APL5301
5
BP
4
SHDN
GND SHDN
5
1
4
2
V OUT G N D
SOT-23-5 (Top View)
APL5301
V OUT
SOT-89 (Top View)
BP
V OUT
3
3
V IN
SOT-89-5 (Top View)
APL5301
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
1
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APL5301/2
Pin Configuration (Cont.)
G ND
1
8
GND
V IN
2
7
GND
V OUT
3
6
GND
BP
4
5
GND
SHDN
T A B is G N D
V IN
1
GND
2
SHDN
3
5
VOUT
3
SOP-8 (Top View)
1
2
V OUT
V IN
SOT-23 (Top View)
APL5301
4
2
3
V OUT
GND
V IN
BP
SOT-23-5 (Top View)
APL5302
APL5302
1
SOT-89 (Top View)
APL5302
Ordering and Marking Information
P ackage C ode
A : S O T -2 3
B : S O T -2 3 -5
D : S O T -8 9
D 5 : S O T -8 9 -5
K : S O P -8
Tem p. Range
C : 0 to 7 0 C
I : -4 0 to 8 5 C
H a n d lin g C °
ode
°
TR : Tape & R eel
V o lta g e C o d e :
1 3 : 1 .3 V ~ 3 4 : 3 .4 V 5 0 : 5 .0 V
L e a d F re e C o d e
L : L e a d F re e D e v ic e
B la n k : O rig in a l D e vic e
A P L 5 3 0 1 /2 L e a d F re e C o d e
H a n d lin g C o d e
Tem p. Range
P ackage C ode
V o lta g e C o d e
A P L 5 3 0 1 /2 -1 3 D /K :
A P L 5 3 0 1 /2
XXXXX 13
XXXXX
- D a te C o d e
;
1 3 - 1 .3 V
Marking Information
SOT-23 and SOT-23-5 packages
Product Name
APL5301-13A/B
APL5301-14A/B
APL5301-15A/B
APL5301-16A/B
APL5301-17A/B
APL5301-18A/B
APL5301-19A/B
APL5301-20A/B
APL5301-21A/B
APL5301-22A/B
APL5301-23A/B
APL5301-24A/B
APL5301-25A/B
APL5301-26A/B
APL5301-27A/B
APL5301-28A/B
APL5301-29A/B
APL5301-30A/B
APL5301-31A/B
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
Marking
317X
318X
319X
31AX
31BX
31CX
31DX
31EX
31FX
31GX
31HX
31IX
31JX
31KX
31LX
31MX
31NX
31OX
31PX
Product Name
APL5302-13A/B
APL5302-14A/B
APL5302-15A/B
APL5302-16A/B
APL5302-17A/B
APL5302-18A/B
APL5302-19A/B
APL5302-20A/B
APL5302-21A/B
APL5302-22A/B
APL5302-23A/B
APL5302-24A/B
APL5302-25A/B
APL5302-26A/B
APL5302-27A/B
APL5302-28A/B
APL5302-29A/B
APL5302-30A/B
APL5302-31A/B
2
Marking
327X
328X
329X
32AX
32BX
32CX
32DX
32EX
32FX
32GX
32HX
32IX
32JX
32KX
32LX
32MX
32NX
32OX
32PX
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APL5301/2
Marking Information (Cont.)
SOT-23 and SOT-23-5 packages
Product Name
APL5301-32A/B
APL5301-33A/B
APL5301-34A/B
APL5301-35A/B
APL5301-48A/B
APL5301-49A/B
APL5301-50A/B
Marking
31QX
31RX
31SX
31TX
31XX
31YX
31ZX
Product Name
APL5302-32A/B
APL5302-33A/B
APL5302-34A/B
APL5302-35A/B
APL5302-48A/B
APL5302-49A/B
APL5302-50A/B
Marking
32QX
32RX
32SX
32TX
32XX
32YX
32ZX
The last character “X” in the marking is for data code.
Pin Description
PIN
Name
VIN
No.
1
2
GND
3
4
5
SHDN(Note1)
BP(Note1)
VOUT
I/O
I
I
O
O
Description
Supply voltage input.
Ground pins of the circuitry, and all ground pins must be soldered
To PCB with proper power dissipation.
Shutdown control pin, low = off, high = nromal. Don’t leave open.
Bypass signal pin of the regulator.
Output pin of the regulator.
Note1 : This pin does not exist in 3-pin package.
Absolute Maximum Ratings
Symbol
VIN, VOUT
SHDN
RTH,JA
Parameter
Input Voltage or Out Voltage
Shutdown Control Pin
Thermal Resistance – Junction to Ambient
PD
Power Dissipation
TJ
Operating Junction Temperature
Control Section
Power Transistor
TSTG
TL
Storage Temperature Range
Lead Temperature (Soldering, 10 second)
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
3
Rating
6.5
Unit
V
6.5
V
357
°C/W
Internally Limited
W
°C
0 to 125
0 to 150
-65 to +150
°C
260
°C
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APL5301/2
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature, VIN=3.8V, CIN=COUT=1uF, SHDN=VIN,
TJ=0 to 125°C. Typical values refer to TJ=25°C.
APL5301/2
Symbol
Parameter
Test Conditions
Unit
Min.
Typ. Max.
VIN
VOUT
ILIMIT
Input Voltage
2.7
6.5
V
Output Voltage
VOUT+1.0V< VCC<6.0V, 0mA< IOUT VOUT -2%
VOUT VOUT +2%
Circuit Current Limit
VIN=VOUT+0.5V
500
mA
VOUT=0V
50
mA
ISHORT Short Current
IOUT Load Current
VIN=VOUT+0.5V
300
V
mA
REGLINE Line Regulation
VOUT+0.5V< VCC<6.0V,
IOUT=150mA
4
10
mV
REGLOA Load Regulation
VIN =VOUT+0.5V, 0mA< IOUT < IMAX
1
6
mV
VIN= VOUT+0.5V ,
IOUT=1mA-150mA in 1us
70
150
mV
mV
1.3V≤VOUT<1.5V
1.5V≤VOUT<2.0V
IOUT =300mA 2.0V≤VOUT<2.5V
2.5V≤VOUT<3V
3V≤VOUT≤ 5V
F≤1kHz, 1Vpp at VIN = VOUT+1.0V
1.2
1
0.8
0.6
0.4
55
1.6
1.2
0.9
0.7
0.5
V
No load
50
80
IOUT=300mA
150
180
Shutdown Supply
(Note3)
Current
Shutdown = low
IOUT=0, VCC=6.0V
0.01
1
Noise
100Hz<f<100kHz, typical load,
CBP=0.01uF, COUT = 1uF
200
µVrms
0.4
ms
150
°C
Over Temperature Shutdown
Hysteries
Hysteresis
10
°C
Output Voltage Temperature
Coefficient
50
ppm/°C
Load Transient
(Note2)
VDROP Dropout Voltage
PSRR Ripple Rejection
IQ
Quiescent Current
45
Shutdown Recovery
CBP=0.01uF,COUT=1uF, no load
(Note3)
Delay
OTS Over Temperature Shutdown
TC
COUT Output Capacitor
ESR
Shutdown Input
(Note3)
Threshold
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
VOUT+1.0V< VIN <6.0V
4
dB
µA
µA
0.8
1.0
2.6
µF
0.02
0.1
1
Ohm
0.4
1.6
2.5
V
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APL5301/2
Electrical Characteristics (Cont.)
Symbol
ISHDN
Parameter
Test Conditions
Shutdown input Bias
current(Note3)
Input Reverse Leakage
current
Reverse Protection
Threshold
APL5301/2
Min.
Unit
Typ.
Max.
VSHDN =VIN
0.01
100
nA
VOUT-VIN=0.1V
0.1
0.5
µA
11
50
mV
Note2 : Dropout voltage definition : VIN-VOUT when VOUT is 2% below the value of VOUT for VIN = VOUT+ 0.5V
Note3 : For 5-pin devices only.
Application Circuit
IN P U T
2 .7 V to 6 V
V IN
V OUT
VO UT
A P L 5 3 0 1 /2
C IN
1uF
BP
SHDN
on
C OUT
1uF
GND
o ff
C BP
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
5
0 .0 1 u F
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APL5301/2
Typical Characteristics
(All Curves are For Fix 3.3V)
Ground Pin Current vs. Load Current
Ground Pin Current vs. Load Current (uA)
Output Voltage vs. Temperature
Output Voltage (V)
3.32
3.31
3.3
3.29
3.28
-40
-15
10
35
60
85
160
140
120
100
80
60
40
20
0
0
50
150
200
250
300
Load Current (mA)
Temperature (°C )
Ground Pin Current vs. Input Voltage
Input Voltage vs. Output Voltage
3.5
160
IOUT=50mA
140
3
Output Voltage (V)
Ground Pin Current vs. Load Current (uA)
100
120
100
NO LOAD
80
60
40
2.5
2
1.5
1
0.5
20
0
0
0
1
2
3
4
5
0
6
Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
1
2
3
4
5
6
Input Voltage (V)
6
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APL5301/2
Typical Characteristics
Reverse Leakage Current vs. Output Voltage
Dropout Voltage vs. Load Current
1
Reverse Leakage Current (uA)
300
Dropout Voltage (mV)
250
200
150
100
50
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
0
50
100
150
200
250
0
300
Load Current (mA)
2
3
4
5
6
Output Voltage (V)
SHDN Threshold Voltage vs. Input Voltage
PSRR vs. Frequency
1.6
+0
-10
1.5
-20
1.4
PSRR (dB)
SHDN Threshold Voltage (V)
1
1.3
1.2
-30
VIN=4.3V
IOUT =50mA
COUT=1uF
CBP=0.1uF
-40
-50
-60
1.1
-70
-80
1
3.5
4
4.5
5
5.5
10
6
Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
20
50 100 200
500
1k
2k
5k
10k 20k
50k
200k
Frequency (HZ)
7
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APL5301/2
Typical Characteristics
Line-Transient Response
Load-Transient Response
VOUT
Output Voltage (50mV/div)
Output Voltage (20mV/div)
VOUT
VIN=4.3V
IOUT
50mA
5V
4V
IOUT=50mA
V IN
1mA
Time (100us)
Time (500us/div)
Entering Shutdown
Shutdown Exit Delay
2.5V
SHDN
SHDN
CBP=0.01uF
0V
VOUT
V OUT
0V
Time (0.1ms/div)
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
Time (0.1ms/div)
8
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APL5301/2
Typical Characteristics
Region of Stable ESR vs. Load Current
Recommended Minimum Footprint
10
Stable
Region
COUT=1uF
COUT ESR (Ω)
1
0.1
Untested
0.01
0
50
100
150
200
250
300
Load Current (mA)
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
9
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APL5301/2
Application Information
Capacitor Selection and Regulator
Stability
tery-powered systems, this will determine the useful
end-of-life battery voltage. Because the APL5301/2
use a p-channel MOSFET pass transistor, the dropout voltage is a function of drain-to-source on-resistance (RDS(ON)) multiplied by the load current.
The APL5301/2 use at least a 1uF capacitor on the
input, and this capacitor can be Aluminum, Tantalum
or Ceramic capacitor. The input capacitor with larger
value and lower ESR provides better PSRR and linetransient response. The output capacitor also can use
Aluminum, Tantalum or Ceramic capacitor, and a minimum value of 1uF and ESR above 0.06Ω is
recommended. The curve of the stable region in typical characteristics shows the appropriate output capacitor ESR for different load current stable operation.
A larger output capacitor can reduce noise and improve load-transient response, stability, and PSRR.
Note that some ceramic dielectrics exhibit large capacitance and ESR variation with temperature. When
using this capacitor, a minimum 2.2uF or more may
be required to ensure the stability at low temperature
operation. Use a bypass capacitor at BP pin for low
output noise. Increasing the capacitance will slightly
decrease the output noise, but increase the start-up
time. (See Shutdown Exit Delay and Output Noise
vs.Bypass Capacitor graph in the typical
characteristics)
Reverse Current Protection
The APL5301/2 have an internal reverse protection, it
does not need an external schottky diode to connect
the regulator input and output. If the output voltage is
forced above the input voltage by more than 11mV,
the IC will be shutdown and the ground pin current is
below 0.1uA.
Shutdown/Enable
The APL5301/2 have an active high enable function.
Force EN high (>1.6V) enables the regulator, EN low
(<0.4V) disables the regulator and enter the shutdown
mode. In shutdown mode, the quiescent current can
reduce below 1uA. The EN pin cannot be floating, a
floating EN pin may cause an indeterminate state on
the output. If it is no use, connect to VIN for normal
operation.
Load-Transient Considerations
Current Limit
The APL5301/2 load-transient response graphs in typical characteristics show the transient response. A
step change in the load current from 1mA to 50mA at
1us will cause a 60mV transient spike. Larger output
capacitor and lower ESR can reduce transient spike.
The APL5301/2 have a current limit protection. The
ouptut voltage will drop close to zero volt, when load
current reaches the limit, and then the load current
will be limited at 50mA after output voltage is below 0.
7V. When the load current back to the value where
limiting started, the output voltage and current will return to normal value. When output is shorted to
ground, the APL5301/2 will keep short circuit current
at 150mA .
Input-Output (Dropout)Voltage
The minimum input-output voltage difference (dropout)
determines the lowest usable supply voltage. In bat
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
10
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APL5301/2
Thermal Protection
Thermal protection limits total power dissipation in the
device. When the junction temperature exceeds
TJ=+150°C, the thermal sensor generates a logic signal to turn off the pass transistor and allows IC to
cool. When the IC’s junction temperature is down by
10°C, the thermal sensor will turn the pass transistor
on again, resulting in a pulsed output during continuous thermal protection. Thermal protection is designed
to protect the APL5301/2 in the event of fault
conditions. For continuous operation, do not exceed
the absolute maximum junction temperature of
TJ=+150°C.
Operating Region and Power Dissipation
The thermal resistance of the case to circuit board,
and the rate of air flow all control the APL5301/2’s
maximum power dissipation. The power dissipation
across the device is PD = IOUT (VIN-VOUT) and the maximum power dissipation is:
PDMAX = (TJ-TA) / (θJC +θCA)
where TJ-TA is the temperature difference between the
junction and ambient air, θJC is the thermal resistance
of the package, and θCA is the thermal resistance
through the printed circuit board, copper traces, and
other materials to the ambient air.
The GND pin of the APL5301 and APL5302 that the
packages ard SOT-23-5, SOT-89-5 AND SOP-8 provide an electrical connection to ground and channeling heat away. If power dissipation is large, connect
the GND pin to ground using a large pad or ground
plane, can improve the problem of over heat of IC.
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
11
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APL5301/2
Packaging Information
E
e1
0.015X45
SOP-8 pin ( Reference JEDEC Registration MS-012)
H
e2
D
A1
1
L
0.004max.
Dim
A
Mi ll im et er s
Inche s
A
Min.
1. 35
Max .
1. 75
Min.
0. 053
Max .
0. 069
A1
D
E
0. 10
4. 80
3. 80
0. 25
5. 00
4. 00
0. 004
0. 189
0. 150
0. 010
0. 197
0. 157
H
L
e1
e2
5. 80
0. 40
0. 33
6. 20
1. 27
0. 51
0. 228
0. 016
0. 013
0. 244
0. 050
0. 020
φ 1
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
1. 27B S C
0. 50B S C
8°
8°
12
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APL5301/2
Packaging Information
SOT-23
D
B
3
E
H
2
1
S
e
A
L
A1
Dim
A
C
M illim et er s
M in.
1. 0 0
Inc he s
M ax.
1. 3 0
M in.
0. 0 39
M ax.
0. 0 51
A1
0. 0 0
0. 1 0
0. 0 00
0. 0 04
B
0. 3 5
0. 5 1
0. 0 14
0. 0 20
C
0. 1 0
0. 2 5
0. 0 04
0. 0 10
D
2. 7 0
3. 1 0
0. 1 06
0. 1 22
E
1. 4 0
1. 8 0
0. 0 55
e
1. 9 0 B SC
H
2. 4 0
L
0. 3 7
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
0. 0 71
0. 0 75 B SC
3. 0 0
0. 0 94
0. 11 8
0. 0 01 5
13
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APL5301/2
Packaging Information
SOT-23-5
e1
5
4
E1
1
E
3
2
e
b
D
A2
A
a
A1
Dim
A
A1
A2
D
E
E1
L
L1
L2
N
α
L 2
L
Mi ll imet er s
Min .
0. 9 5
0. 0 5
0. 9 0
2. 8
2. 6
1. 5
0. 3 5
Inc hes
Ma x .
1. 4 5
0. 1 5
1. 3 0
3. 0 0
3. 0 0
1. 7 0
0. 5 5
Min .
0. 0 37
0. 0 02
0. 0 35
0. 11 0
0. 1 02
0. 0 59
0. 0 14
0. 2 0 BSC
0. 5
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
Ma x .
0. 0 57
0. 0 06
0. 0 51
0. 11 8
0. 11 8
0. 0 67
0. 0 22
0. 0 08 B SC
0. 7
0. 0 20
5
0°
L 1
0. 0 28
5
10 °
14
0°
10 °
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APL5301/2
Packaging Information
SOT-89 (Reference EIAJ ED-7500A Reg stration SC-62)
D
D1
a
E
H
1
2
3
L
C
B1
B
e
e1
A
a
D im
A
B
B1
C
D
D1
e
e1
E
H
L
α
M illim eters
M in.
1.40
0.40
0.35
0.35
4.40
1.35
Inches
M ax.
1.60
0.56
0.48
0.44
4.60
1.83
M in.
0.055
0.016
0.014
0.014
0.173
0.053
1.50 B SC
3.00 B SC
2.29
3.75
0.80
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
M ax.
0.063
0.022
0.019
0.017
0.181
0.072
0.059 BSC
0.118 B SC
2.60
4.25
1.20
10°
15
0.090
0.148
0.031
0.102
0.167
0.047
10°
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APL5301/2
Packaging Information
SOT-89-5
Dim
A
B
C
D
E
F
G
H
I
J
K
L
M illim eters
M in.
4.40
4.05
1.50
1.30
2.40
0.80
Inches
M ax.
4.60
4.25
1.70
1.50
2.60
-
M in.
0.17
0.16
0.06
0.05
0.09
0.03
3.00 REF
1.50 REF
0.40
1.40
0.35
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
M ax.
0.18
0.17
0.07
0.06
0.1
0.12 REF
0.06 REF
0.52
1.60
0.41
5 TYP
0.01
0.05
0.01
0.02
0.06
0.02
0.2 TYP
16
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APL5301/2
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
(IR/Convection or VPR Reflow)
tp
TP
C ritical Zone
T L to T P
T e m p e ra tu re
R am p-up
TL
tL
T sm ax
T sm in
R am p-down
ts
Preheat
25
t 25 °C to Peak
T im e
Classificatin Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Large Body
Small Body
Average ramp-up rate
3°C/second max.
(TL to TP)
Preheat
- Temperature Min (Tsmin)
100°C
- Temperature Mix (Tsmax)
150°C
- Time (min to max)(ts)
60-120 seconds
Tsmax to TL
- Ramp-up Rate
Tsmax to TL
- Temperature(TL)
183°C
- Time (tL)
60-150 seconds
Peak Temperature(Tp)
225 +0/-5°C
240 +0/-5°C
Time within 5°C of actual Peak
10-30 seconds
10-30 seconds
Temperature(tp)
Ramp-down Rate
6°C/second max.
6 minutes max.
Time 25°C to Peak Temperature
Pb-Free Assembly
Large Body
Small Body
3°C/second max.
150°C
200°C
60-180 seconds
3°C/second max
217°C
60-150 seconds
245 +0/-5°C
250 +0/-5°C
10-30 seconds
20-40 seconds
6°C/second max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
17
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APL5301/2
R e lia b ilit y te s t p r o g r a m
Te s t ite m
S O L D E R A B IL IT Y
H O LT
PCT
TST
ESD
L a tc h -U p
M e th o d
M IL -S T D -8 8 3 D -2 0 0 3
M IL -S T D -8 8 3 D -1 0 0 5 .7
J E S D -2 2 - B , A 1 0 2
M IL -S T D -8 8 3 D -1 0 11 .9
M IL -S T D -8 8 3 D -3 0 1 5 .7
JESD 78
D e s c rip tio n
2 45 °C , 5 S E C
1 0 0 0 H rs B ia s @ 1 2 5 ° C
1 6 8 H rs , 1 0 0 % R H , 1 2 1 ° C
-6 5 °C ~ 1 5 0 °C , 2 0 0 C y c le s
V H B M > 2 K V, V M M > 2 0 0 V
1 0 m s , I tr > 1 0 0 m A
Carrier Tape
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
18
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APL5301/2
Reel Dimensions
A p p lic a tion
A
B
3 30 ± 1
6 2 + 1.5
C
1 2.7 5+
0 .1 5
D
D1
F
SOP- 8
5 .5 ± 1
A p p lic a tion
S O T-89
A p p lic a tion
S O T-23 -5
1 .5 5 +0.1 1 .5 5 + 0.2 5
J
T1
T2
W
P
E
2 ± 0 .5
1 2.4 ± 0.2
2 ± 0 .2
12± 0. 3
8± 0 .1
1 .7 5±0 .1
Po
P1
Ao
Bo
Ko
t
4 .0 ± 0 .1
2 .0 ± 0 .1
6 .4 ± 0 .1
5 .2 ± 0 . 1
2 .1± 0 .1
0 .3 ±0 .01 3
A
B
C
J
T1
T2
E
70 ± 2
1 3.5 ± 0.15
3 ± 0 .1 5
14 ± 2
1 .3 ± 0 .3
W
1 2 + 0.3
1 2 - 0 .1
P
1 78 ±1
8 ± 0 .1
1 .7 5 ± 0 .1
F
D
D1
Po
P1
Ao
Bo
Ko
t
5 .5 ± 0 .05
1 .5± 0 .1
1 .5 ± 0 .1
4 .0 ± 0 .1
2 .0 ± 0 .1
4 .8 ± 0 .1
4 .5 ± 0 .1
1 .8 0 ± 0 .1
0 .3 ±0 .01 3
A
B
C
J
T1
T2
P
E
1 78 ±1
7 2 ± 1 .0
8 .4 ± 2
1 .5 ± 0 .3
W
8 .0 + 0.3
- 0.3
4 ± 0 .1
1 .7 5 ± 0 .1
F
D
D1
Po
P1
Ao
Bo
Ko
t
3 .5 ± 0 .05
1 .5 + 0.1
1 .5 + 0.1
4 .0 ± 0 .1
2 .0 ± 0 .1
3 .1 5 ± 0.1
3 .2 ± 0 .1
1 .4± 0 .1
0 .2 ±0 .03
1 3.0 + 0 .2 2 .5 ± 0 .15
(mm)
Cover Tape Dimensions
Application
SOP- 8
SOT- 23
SOT- 89
Carrier Width
12
8
12
Cover Tape Width
9.3
5.3
9.3
Devices Per Reel
2500
3000
1000
Customer Service
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright  ANPEC Electronics Corp.
Rev. B.1 - Mar., 2004
19
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