APL5546

APL5546
Dual Channel 500mA/500mA Regulator + Reset IC
Features
General Description
•
Low Quiescent Current : 110µA (No load)
The APL5546 is a dual-channel regulator with reset
•
Low Dropout Voltage :
function (specific voltage monitoring), and internal de-
VDROP1=500mV@500mA
lay circuit, set to detect 3.9V or 4.2V. Maximum in-
VDROP2=500mV@500mA
put voltage is 6V, and both output1 and output2 can
Fixed Output Voltage :
deliver up to 500mA. The typical dropout voltage of
•
VOUT1=3.3V/500mA
both channel is 500mV at 500mA loading. Design
VOUT2=3.3V/500mA
with an internal P-channel MOSFET pass transistor,
•
Stable with 4.7µF Output Capacitor
the APL5546 maintains a low supply current. Other
•
Stable with Aluminum, Tantalum or Ceramic
features include, thermal-shutdown protection, current
Capacitors
limit protection to ensure specified output current. The
•
Built in Thermal Protection
APL5546 come in miniature SOP-8 and SOP-8-P
•
Fast Transient Response
packages.
•
Short Setting Time
•
SOP-8, SOP-8-P with Thermal Pad Packages
•
Adjustment-free Reset Detection Voltage :
Pin Configuration
3.9V or 4.2V typ
•
SOP-8 (Top View)
Detection to Reset Release
Applications
•
SOP-8-P( Top View)
Easy to Set Delay Time from Voltage
V IN
1
8
CONT
V OUT1
2
7
GND
Cd
3
6
RESET
V DET
4
5
V OUT2
V IN
1
8
CONT
V OUT1
2
7
GND
Cd
3
6
RESET
V DET
4
5
V OUT2
= Thermal Pad
(connected to GND plane for better heat
dissipation)
Optical Storage System
Ordering and Marking Information
Package Code
K : SOP-8
KA : SOP-8-P
Temp. Range
C : 0 to 70 °C
I : -40 to 85°C
Handling Code
TR : Tape & Reel
Detection Voltage :
A : 3.9V
B : 4.2V
Lead Free Code
L : Lead Free Device
Blank : Original Device
APL5546 Lead Free Code
Handling Code
Temp. Range
Package Code
Detection Voltage
APL5546 K / KA:
APL5546X
XXXXX
X
- Detection Voltage
XXXXX - Date Code
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.3- Jul., 2006
1
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APL5546
Pin Description
PIN
Name
VIN
VOUT1
No.
1
2
3
Cd
4
5
6
7
8
VDET
VOUT2
RESET
GND
CONT
I/O
Description
O
O
Voltage supply input pin.
Regulator output pin.
Delay time capacitor pin, RESET pin output delay time can be set by
the capacitor connected to the Cd pin. tPLH = 130000∗C, tPLH :
transmission delay time (s), C:capacitor value (F)
Input pin of voltage detection.
Regulator output pin.
Input voltage detection output pin , high = VDET<VS , low = VDET>VS
GND pin
VOUT1 on/off-control pin, VOUT1 will be turn off when CONT pull to low.
I
O
O
I
Absolute Maximum Ratings
Symbol
VIN, VOUT
CONT
VDET
RTH,JA
RTH,JC
PD
TJ
Parameter
Input Voltage or Out Voltage
Rating
6.5
Unit
V
VOUT1 Shutdown Control Pin
6.5
V
RESET Pin Supply Voltage
Thermal Resistance – Junction to Ambient
SOP-8
SOP-8-P
Thermal Resistance – Junction to Case
SOP-8
SOP-8-P
Power Dissipation
6.5
V
150
80
°C/W
30
5
Internally Limited
°C/W
0 to 125
°C
Operating Junction Temperature
Control Section
Power Transistor
TSTG
TL
Storage Temperature Range
Lead Temperature (Soldering, 10 second)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
2
W
0 to 170
-65 to +150
°C
260
°C
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APL5546
Electrical Characteristics
Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=1µF,COUT1=4.7µF,
COUT2=4.7µF, CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .
Symbol
VIN
IQ
ICONT
VCONT
ICCQ
Parameter
Test Conditions
APL5546
Min.
Typ.
Input Voltage
Max.
6
Unit
V
Quiescent Current
IOUT1 =0mA, IOUT2 =0mA
100
µA
Shutdown Supply
Current
CONT = low,
IOUT2=0mA
70
µA
Shutdown Input Bias
VCONT =VIN
current
High Threshold Voltage
Low Threshold Voltage
VDET Input Current
VDET =5V
0.1
1.6
-0.3
µA
20
VIN+0.3
0.4
40
µA
3.3
3.366
V
V
Regilator1
VOUT1
Output Voltage
ILIMIT
Circuit Current Limit
Load Current
IOUT
VIN=5V
VIN=5V
3.234
800
500
REG LINE Line Regulation
REG LOAD Load Regulation
VDROP
PSRR
OTS
TC
COUT
mA
VOUT+0.5V< V IN<6.0V, IOUT=10mA
VIN =5V, 0mA< IOUT < IMAX
515X
Dropout Voltage(Note)
I
=
500mA
(VOUT(Nominal)=3.3V OUT
Version)
F≤1kHz, 1Vpp at IOUT=50mA
Ripple Rejection
C =10nf
Over Temperature
Shutdown
Over Temperature
Hysteresis
Shutdown Hysteresis
mA
4
25
0.1
500
45
Output Voltage
T = -20 ~ 80°C
Temperature Coefficient A
Output Capacitor
6
60
650
55
dB
170
°C
15
°C
100
ppm/°C
µF
4.7
ESR
mV
mV
%
mV
0.01
1
Ohm
Regulator2
VOUT2
Output Voltage
ILIMIT
Circuit Current Limit
Load Current
IOUT
VIN=5V
VIN=5V
3.234
3.3
3.366
800
500
mA
REG LINE Line Regulation
VOUT+0.5V< V IN<6.0V, IOUT=10mA
4
6
VIN =5V, 0mA< IOUT < IMAX
25
REG LOAD Load Regulation
60
(Note)
515X
0.1
Dropout Voltage
VDROP (VOUT(Nominal)=3.3V IOUT =500mA
500
650
Version)
Note : Dropout voltage definition : VIN- VOUT when V OUT is 2% below the value of V OUT for VIN=5V
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
3
V
mA
mV
mV
%
mV
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APL5546
Electrical Characteristics (Cont.)
Unless otherwise noted these specifications apply over full temperature , VIN=5V, CIN=1µF,COUT1=4.7µF,
COUT2=4.7µF, CONT=VIN, TJ=0 to 125°C . Typical values refer to TJ=25°C .
Symbol
Parameter
Test Conditions
APL5546
Unit
Min.
Typ.
45
55
dB
170
°C
Over Temperature Shutdown
Hysteresis
Hysteresis
15
°C
Output Voltage Temperature
Ta= -20 ~ 80°C
Coefficient
100
ppm/°C
Output Capacitor
4.7
µF
Max.
Regulator2
PSRR
Ripple Rejection
Over Temperature Shutdown
OTS
TC
COUT
F≤1kHz, 1Vpp at IOUT=50mA
C =10nf
ESR
RESET / RESET
VS
Detection Voltage
0.01
Ohm
VDET=H→L (APL5546A)
3.9
V
VDET=H→L (APL5546B)
4.2
V
100
ppm/°C
△VS/△T Vs Temperature Coefficient TA = A -20~+80°C
△VS
1
Hysteresis Voltage
VDET = H→L
VOL
Low-level Output Voltage
IOH
180
230
mV
VDET = 3.9V, RL = 4.7kΩ
22
60
mV
Output Leakage Current
VDET = 5V
0.5
1
µA
IOL1
Output Current1
VDET =3.9V, VRESET = 0.4V
10
14
mA
IOL2
Output Current2
VDET = 3.9V, VRESET = 0.4V
TA = -20~+80°C
8
14
mA
tPLH
“H” Transmission Delay Time Cd = 0µF
tPLH1
Reset Delay Time
tPHL
“L” Transmission Delay Time Cd = 0µF
VOPL
Threshold Operating Voltage VRESET = 0.4V
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
130
VDET = 3.7Và5V, Cd = 0.1µF
4
8
42
90
µs
13
18
ms
4
90
µs
0.95
1.25
V
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APL5546
Application Circuit
3.3V
V OUT1
V IN
1µ F
RL
V DET
APL5546
4.7k Ω
3.3V
RESET
Cd
V OUT2
CONT
GND
C OUT2
4.7 µ F
0.1 µ F
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
C OUT1
4.7 µ F
5
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APL5546
Timing Chart
V IN . V DET
5V
Vs
Vs
RESET
5V
t PLH + t PLH1
0V
CONT
H
L
V OUT1
5V
0V
V OUT2
5V
0V
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
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APL5546
Typical Characteristics
Quiescent Current vs. Output Current
Quiescent Current vs. Input Voltage
450
160
IOUT1=IOUT2=0mA
400
Quiescent Current (µA)
Quiescent Current (µA)
140
120
100
80
60
40
VIN = 4V
350
300
250
200
150
100
50
20
0
0
0
1
2
3
4
5
0
6
100
200
Input Voltage (V)
300
400
500
Output Current (mA)
Output Voltage vs. Input Voltage
Output Voltage vs. Temperature
3.320
3.5
3.330
IOUT1=IOUT2=0mA
3.320
3.310
V OUT1
3.300
VOUT1,V OUT2
3.300
2
1.5
1
3.290
3.290
V OUT2
3.280
3.280
VOUT2 (V)
3.310
2.5
VOUT1 (V)
Output Voltage (V)
3
3.270
3.270
0.5
3.260
3.260
0
0
1
2
3
4
0
20
40
60
80 100 120 140
Ambient Temperature (°C)
Input Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
3.250
-40 -20
5
7
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APL5546
Typical Characteristics
Dropout Voltage vs. Output Current
PSRR vs. Frequency
500
+0
VIN = 5V
-10 IOUT1 = IOUT2 = 50mA
400
-20
350
V OUT2
300
PSRR (dB)
Dropout Voltage (mV)
450
250
V OUT1
200
150
-30
-40
-50
VOUT1,V OUT2
-60
100
-70
50
0
0
100
200
300
400
-80
10
500
100
1k
10k
100k
Frequency (Hz)
Output Current (mA)
Load-Transient Response
Load-Transient Response
VOUT1(200mV/div)
VOUT2(200mV/div)
IL1=1mA ~ 500mA
COUT1=4.7µF(Aluminum)
Tr=1µs
IL2=1mA ~ 500mA
COUT2=4.7µF(Aluminum)
Tr=1µs
Time (0.1m/div)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
Time(0.1m/div)
8
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APL5546
Typical Characteristics
Line-Transient Response
Shutdown Response
RLOAD = 100 Ω
VIN = 4.5 ~ 5.5V
VOUT1 (2v/div)
VOUT1(20mV/div)
IOUT1=10mA
COUT1=4.7uF
VOUT2
CONT(2v/div)
VOUT2(20mV/div)
IOUT2=10mA
COUT2=4.7uF
Time(20µs/div)
Time (1ms/div)
Safe Operating Area (Power Dissipation Limit)
2
550
1.8
500
1.6
450
Output Current (mA)
Power Dissipation (mW)
Power Dissipation vs. Ambient Temperature
1.4
1.2
SOP-8-P
1
0.8
0.6
0.4
IL1=IL2, 2oZ Copper on SOP-8
Package Mounted on recommended
minimum footprint
400
TA=25°C
350
300
250
TA=85°C
200
150
0.2
100
0
25
50
75
100
125
150
1
175
1.5
1.75
2
2.25
2.5
2.75
Input-Output Voltage Differential VIN-VOUT(V)
Ambient Temperature (°C)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
1.25
9
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APL5546
Typical Characteristics
Safe Operating Area (Power Dissipation Limit)
800
IL1=IL2, 2oZ Copper on SOP-8-P
Package Mounted on recommended
minimum footprint
Output Current (mA)
700
600
TA=25°C
500
400
TA=85°C
300
200
100
1
1.25
1.5
1.75
2
2.25
2.5
2.75
Input-Output Voltage Differential VIN-VOUT(V)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
10
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APL5546
Application Information
Capacitor Selection and Regulator Stabil-
RESET
ity
The RESET pin is asserted whenever VDET falls below
The APL5546 uses at least a 1uF capacitor on the
the reset threshold voltage or if CONT is forced low at
input. This capacitor can use Aluminum, Tantalum or
some special IC(refer timing chart and pin description).
Ceramic capacitors. Input capacitor with large value
The reset function ensures the microprocessor is prop-
and low ESR provides better PSRR and line-transient
erly reset and powers up into a known condition after
response. The output capacitor also can use
a power failure. RESET will remain valid with VIN as
Aluminum, Tantalum or Ceramic capacitors, and it’s
low as 0.95V. The RESET output is a simple open-
minimum values is recommended 4.7uF, ESR muse
drain N channel MOSET structure. A pull-up resistor
be above 0.01Ω. Large output capacitor values can
must be used to pull this output up to some voltage.
reduce noise and improve load-transient response,
For most application, this voltage will be the same
stability, and PSRR. Note that some ceramic dielec-
power supply that supplies VIN to the APL5546. The
trics exhibit large capacitance and ESR variation with
APL5546 is relatively immune to negative-going
Temperature. If use this capacitor, it may be neces-
glitches below the reset threshold. Typically reset delay
sary to use 4.7uF or more to ensure stability at tem-
time is 13ms while using 0.1uF at Cd pin. If more
perature below -10°C.
transient immunity is needed, a Cd capacitor can be
placed as larger as possible.
Load-Transient Considerations
Input-Output (Dropout)Voltage
The APL5546 load-transient response graphs in Typical Characteristics show the transient response. A
step change in the load current from 1mA to 500mA
The minimun input-output voltage differential (dropout)
at 1u second will cause less than 200mV transient
determines the lowest usable supply voltage. The drop-
spike. Large output capacitor’s value and low ESR
out voltage is a function of drain-to-source on resis-
can reduce transient spike.
tance multiplied by the load current.
Shutdown/Enable
Current Limit
The APL5546 has an active high enable function. Force
APL5546 includes two separate current-limit circuitry
CONT high (>1.6V) enables the VOUT1 , CONT low (<0.
for each linear regulator. The current limit protection,
4V) disables the VOUT1 and VOUT2 can not be affected
which sense the current flows the P-channel MOSFET,
by CONT. Enter the shutdown mode, it also causes
and controls the output voltage. The point where limit-
the output voltage to discharge through a 500 Ω resis-
ing occurs is IOUT=800mA. The output can be shorted
tance to ground. In shutdown mode, the quiescent
to ground for an indefinite amount of time without dam-
current can reduce to 70uA. The CONT pin cannot be
aging to the part.
floating, a floating CONT pin may cause an indeterminate state on the output. If it is no use, connect to VIN
for normal operation.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
11
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APL5546
Application Information
Thermal Protection
Thermal protection limits total power dissipation in the
heat into ambient air. The vias are recommended to
APL5546. When the junction temperature exceeds
have proper size to retain solder, helping heat
TJ=+170°C, the thermal sensor generate a logic sig-
conduction.
nal to turn off the pass transistor and let IC to cool.
102 mil
When the IC’s junction temperature cools by 15°C,
the thermal sensor will turn the pass transistor on again,
resulting in a pulsed output during continuous thermal
protection. Thermal protection is designed to protect
118 mil
SOP-8-P
the IC in the event of fault conditions. For continual
operation, do not exceed the absolute maximum junction temperature rating of TJ=+180°C.
Die
Thermal
pad
Operating Region and Power Dissipation
The thermal resistance of the case and circuit board,
ambient and junction air temperature, and the rate of
air flow all control the APL5546 maximum power
Ambient
Air
Vias
dissipation. The power dissipation across the device
is P = IOUT (VIN-VOUT). The maximum power dissipation
Top
ground
pad
Internal
ground
plane
Printed
circuit
board
Figure 1
is:
PMAX = (TJ-TA) / (θJB +θBA )
where TJ-TA is the temperature difference between the
junction and ambient air.
θJB is the thermal resistance of the package, θBA is the
thermal resistance through the printed circuit board,
copper traces, and other materials to the surrounding
air. The GND pin provides an electrical connection to
ground and channeling heat away. Connect the GND
pin to ground using a large pad or ground plane as a
heat sink, it can improve maximize thermal dissipation.
See figure 1. The SOP-8-P utilizes a bottom thermal
pad to minimize the thermal resistance of the package,
making the package suitable for high current
applications. The thermal pad is soldered to the top
ground pad and is connected to the internal or bottom
ground plane by several vias. The printed circuit board
(PCB) forms a heat sink and dissipates most of the
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
12
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APL5546
Packaging Information
E
e1
0.015X45
SOP-8 pin ( Reference JEDEC Registration MS-012)
H
e2
D
A1
A
1
L
0.004max.
Dim
Millimeters
Inches
Min.
Max.
Min.
Max.
A
1.35
1.75
0.053
0.069
A1
0.10
0.25
0.004
0.010
D
4.80
5.00
0.189
0.197
E
3.80
4.00
0.150
0.157
H
5.80
6.20
0.228
0.244
L
0.40
1.27
0.016
0.050
e1
0.33
0.51
0.013
0.020
e2
1.27BSC
0.50BSC
φ 1
8°
8°
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
13
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APL5546
Packaging Information
E1
E
0.015X45
SOP-8-P pin ( Reference JEDEC Registration MS-012)
H
D1
e1
e2
D
A1
A
1
L
0.004max.
Dim
Millimeters
Min.
Inches
Max.
Min.
Max.
A
1.35
1.75
0.053
0.069
A1
0
0 .1 5
0
0.00 6
D
D1
4.80
5.00
0.189
0.197
E
3.80
E1
H
3 . 0 0R E F
0.118REF
4.00
0.150
5.80
6.20
0.228
0.244
L
0.40
1.27
0.016
0.050
e1
e2
0.33
0.51
0.013
0.02 0
2 . 6 0R E F
φ 1
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
0.157
0.102REF
1.27BSC
0.50BSC
8°
8°
14
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APL5546
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
(IR/Convection or VPR Reflow)
tp
TP
Critical Zone
T L to T P
Temperature
Ramp-up
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
t 25 °C to Peak
Tim e
Classificatin Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Large Body
Small Body
Average ramp-up rate
3°C/second max.
(TL to TP)
Preheat
- Temperature Min (Tsmin)
100°C
- Temperature Mix (Tsmax)
150°C
- Time (min to max)(ts)
60-120 seconds
Tsmax to TL
- Ramp-up Rate
Tsmax to TL
- Temperature(TL)
183°C
- Time (tL)
60-150 seconds
Peak Temperature(Tp)
225 +0/-5°C
240 +0/-5°C
Time within 5°C of actual Peak
10-30 seconds
10-30 seconds
Temperature(tp)
Ramp-down Rate
6°C/second max.
6 minutes max.
Time 25°C to Peak Temperature
Pb-Free Assembly
Large Body
Small Body
3°C/second max.
150°C
200°C
60-180 seconds
3°C/second max
217°C
60-150 seconds
245 +0/-5°C
250 +0/-5°C
10-30 seconds
20-40 seconds
6°C/second max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
15
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APL5546
Reliability test program
Test item
SOLDERABILITY
HOLT
PCT
TST
ESD
Latch-Up
Method
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
Description
245°C , 5 SEC
1000 Hrs Bias @ 125 °C
168 Hrs, 100 % RH , 121°C
-65°C ~ 150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms , Itr > 100mA
Carrier Tape
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Application
SOP- 8/-P
A
B
330 ± 1
F
5.5± 1
J
T1
T2
W
P
E
62 +1.5
C
12.75+
0.15
2 ± 0.5
12.4 ± 0.2
2 ± 0.2
12± 0. 3
8± 0.1
1.75±0.1
D
D1
Po
P1
Ao
Bo
Ko
t
2.0 ± 0.1
6.4 ± 0.1
5.2± 0. 1
1.55 +0.1 1.55+ 0.25 4.0 ± 0.1
2.1± 0.1 0.3±0.013
(mm)
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
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APL5546
Cover Tape Dimensions
Application
SOP- 8/-P
Carrier Width
12
Cover Tape Width
9.3
Devices Per Reel
2500
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright  ANPEC Electronics Corp.
Rev. A.3 - Jul., 2006
17
www.anpec.com.tw