TI UC2708N

UC1708
UC2708
UC3708
www.ti.com
SLUS171C – MARCH 1997 – REVISED SEPTEMBER 2007
DUAL NON-INVERTING POWER DRIVER
•
•
•
•
•
•
FEATURES
1
•
•
•
•
•
3.0A Peak Current Totem Pole Output
5 to 35V Operation
25ns Rise and Fall Times
25ns Propagation Delays
Thermal Shutdown and Under-Voltage
Protection
High-Speed, Power MOSFET Compatible
Efficient High Frequency Operation
Low Cross-Conduction Current Spike
Enable and Shutdown Functions
Wide Input Voltage Range
ESD Protection to 2kV
DESCRIPTION
The UC1708 family of power drivers is made with a high-speed, high-voltage, Schottky process to interface
control functions and high-power switching devices – particularly power MOSFETs. Operating over a 5 V to 35 V
supply range, these devices contain two independent channels. The A and B inputs are compatible with TTL and
CMOS logic families, but can withstand input voltages as high as VIN. Each output can source or sink up to 3 A
as long as power dissipation limits are not exceeded.
Although each output can be activated independently with its own inputs, they can be forced low in common
through the action of either a digital high signal at the Shutdown terminal or by forcing the Enable terminal low.
The Shutdown terminal will only force the outputs low, it will not effect the behavior of the rest of the device. The
Enable terminal effectively places the device in under-voltage lockout, reducing power consumption by as much
as 90%. During under-voltage and disable (Enable terminal forced low) conditions, the outputs are held in a
self-biasing, low-voltage, state.
The UC3708 and UC2708 are available in plastic 8-pin MINI DIP and 16-pin bat-wing DIP packages for
commercial operation over a 0°C to 70°C temperature range and industrial temperature range of –25°C to 85°C
respectively. For operation over a –55°C to 125°C temperature range, the UC1708 is available in hermetically
sealed 8-pin MINI CDIP, 16 pin CDIP and 20 pin CLCC packages. Surface mount devices are also available.
BLOCK DIAGRAM
VIN
Enable
5.6 V
Reg
Internal
Bias
Logic Gnd
Thermal
Shutdown
Output A
Pwr Gnd A
Input A
Input B
Output B
Shutdown
Pwr Gnd B
NOTE: Shutdown feature is not available in J or N packages only.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2007, Texas Instruments Incorporated
UC1708
UC2708
UC3708
www.ti.com
SLUS171C – MARCH 1997 – REVISED SEPTEMBER 2007
CONNECTION DIAGRAMS
DIL-8 (Top View)
J Or N Package
SOIC-16 (Top View)
DW Package
Pwr Gnd A
NC
Input A
Gnd
Input B
NC
Output A
VIN
Input A
Output A
Enable
VIN
Logic Gnd
NC
NC
NC
Shutdown
VIN
Output B
Output B
Input B
NC
DIL-16 (Top View)
JE Or NE Package
Input A
Output A
Enable
VIN
ENABLE
4
2
1
PWR GND A
3
20 19
18
VIN
Logic Gnd
Logic Gnd
LOGIC GND
5
17
NC
Logic Gnd
Logic Gnd
NC
6
16
NC
VIN
NC 7
15
NC
Shutdown
14
VIN
Submit Documentation Feedback
13
PWR GND B
Note: In JE package, Pin 4 is Logic Ground.
Pins 5, 12, and 13 are no connect.
10 11 12
NC
Pwr Gnd B
9
OUTPUT B
8
NC
NC
Output B
SHUTDOWN
INPUT B
Input B
2
NC
Pwr Gnd A
INPUT A
CLCC-20 (Top View)
L Package
NC
NC
Pwr Gnd B
OUTPUT A
Enable
Copyright © 1997–2007, Texas Instruments Incorporated
Product Folder Link(s): UC1708 UC2708 UC3708
UC1708
UC2708
UC3708
www.ti.com
SLUS171C – MARCH 1997 – REVISED SEPTEMBER 2007
ABSOLUTE MAXIMUM RATINGS (1)
VALUE
UNIT
Supply Voltage, VIN
Output Current (Each Output, Source or Sink)
V
A
3
A
–0.3 to (VIN + 0.3)
V
–0.3 to 6.2
V
–0.3 to (VIN + 0.3)
V
Peak Transient
Ouput Voltage
Enable and Shutdown Inputs
A and B Inputs
Operating Junction Temperature
35
0.5
Steady-State
150
°C
–65 to 150
°C
300
°C
(2)
Storage Temperature Range
Lead Temperature (Soldering, 10 Seconds)
(1)
(2)
All voltages are with respect to Logic Gnd pin. All currents are positive into, negative out of, device terminals.r
Consult Unitrode Integrated Circuits databook for information regarding thermal specifications and limitations of packages.
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, VIN=10V to 35V, and these specifications apply for: –55°C<TA<125°C for the UC1708,
–25°C<TA<85°C for the UC2708, and 0°C<TA<70°C for the UC3708, TA = TJ
PARAMETER
VIN
TEST CONDITIONS
Supply current
MIN
TYP
MAX
Outputs low
18
26
Outputs high
14
18
Enable = 0 V
1
4
A, B and shutdown inputs low level
0.8
A, B and shutdown inputs high level
2.0
VA,B = 0.4V
–1
A, B Input current high
VA,B = 2.4V
–200
A, B Input leakage current high
VA,B = 35.3V
Shutdown input current low
VSHUTDOWN = 0.4V
20
VSHUTDOWN = 2.4V
170
A
100
A
500
A
0.6
1.5
mA
–460
200
A
200
A
2.8
3.6
V
2.4
3.4
V
IOUT = –50mA
2.0
V
IOUT = –500mA
2.5
V
IOUT = 50mA
0.5
V
IOUT = 500mA
2.5
VSHUTDOWN = 6.2V
VENABLE = 6.2V
–600
Enable threshold rising
Enable threshold falling
Output Low Saturation
mA
200
Enable input current high
VOUT
–0.6
A
VENABLE = 0V
Output High Saturation
V
50
Enable input current low
VIN –
VOUT
mA
V
A, B Input current low
Shutdown input current high
UNIT
1.0
Thermal Shutdown
155
Copyright © 1997–2007, Texas Instruments Incorporated
Product Folder Link(s): UC1708 UC2708 UC3708
Submit Documentation Feedback
V
°C
3
UC1708
UC2708
UC3708
www.ti.com
SLUS171C – MARCH 1997 – REVISED SEPTEMBER 2007
SWITCHING CHARACTERISTICS (see Figure 1)
(VIN = 20V, delays measured to 10% output change.)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
25
40
UC1708
25
45
UC2708/UC3708
25
40
UC1708
25
50
UC2708/UC3708
25
45
UNIT
FROM A,B INPUT TO OUTPUT:
CL = 0pF
Rise Time Delay (TPLH)
CL = 1000pF
CL = 2200pF
CL = 0pF
10% to 90% Rise (TTLH)
CL = 1000pF (1)
CL = 2200pF
55
75
UC1708
25
80
UC2708/UC3708
25
50
UC1708
40
85
UC2708/UC3708
40
55
25
40
25
45
35
50
15
20
25
45
40
55
CL = 0pF
Fall Time Delay (TPHL)
CL = 1000pF
(1)
CL = 2200pF
CL = 0pF
90% to 10% Fall (TTHL)
CL = 1000pF
(1)
CL = 2200pF
(1)
ns
ns
ns
ns
ns
ns
ns
ns
These parameters, specified at 1000pF, although ensured over recommended operating conditions, are not tested in production.
SWITCHING CHARACTERISTICS (see Figure 1)
(VIN = 20V, delays measured to 10% output change.)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FROM SHUTDOWN INPUT TO OUTPUT:
CL = 0pF
Rise Time Delay (TPLH)
CL = 1000pF (1)
CL = 2200pF
25
75
UC1708
30
80
UC2708/UC3708
30
75
UC1708
35
85
UC2708/UC3708
35
75
CL = 0pF
10% to 90% Rise (TTLH)
50
75
UC1708
25
80
UC2708/UC3708
25
50
UC1708
40
85
UC2708/UC3708
40
55
CL = 0pF
25
45
CL = 1000pF (1)
30
50
CL = 2200pF
35
55
CL = 0pF
25
20
CL = 1000pF (1)
25
45
CL = 2200pF
40
55
F = 200kHz, 50% duty cycle, both channels; CL = 0pF
23
25
F = 200kHz, 50% duty cycle, both channels; CL = 2200pF
38
45
CL = 1000pF (1)
CL = 2200pF
Fall Time Delay (TPHL)
90% to 10% Fall (TTHL)
Total Supply Current
(1)
4
ns
ns
ns
ns
ns
ns
ns
ns
mA
These parameters, specified at 1000pF, although ensured over recommended operating conditions, are not tested in production.
Submit Documentation Feedback
Copyright © 1997–2007, Texas Instruments Incorporated
Product Folder Link(s): UC1708 UC2708 UC3708
UC1708
UC2708
UC3708
www.ti.com
SLUS171C – MARCH 1997 – REVISED SEPTEMBER 2007
20 V
4.3 V
INPUT
0V
Input
47 mF
10 mF
12 V
AC Input
LH0063
50 W
200 kHz
tr ³0.5 V/RS
tf ³0.5/RS
Duty Cycle - 50%
50%
20 V
UC1708
MPF
6660
50%
47 W
90%
90%
Output
OUTPUT
PWR
GND
50 W
CL
10%
10%
0V
TPHL
TPLH
TTHL
TTLH
Logic
Gnd
Figure 1. AC Test Circuit and Switching Time Waveforms
Enable
5.6 V
VIN
To A/B
Output
8 kW
450 mA
2.5 pF
A/B
Input
Shutdown
500 W
5.6 V
Internal
Bias
10 kW
10 kW
5.6 V
5.6 V
Under
Voltage
Lockout
To A/B
Output
NOTE: Shutdown feature available only in JE, NE or DW Packages.
Figure 2. Equivalent Input Circuits
Copyright © 1997–2007, Texas Instruments Incorporated
Product Folder Link(s): UC1708 UC2708 UC3708
Submit Documentation Feedback
5
PACKAGE OPTION ADDENDUM
www.ti.com
9-Aug-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-0051401Q2A
ACTIVE
LCCC
FK
20
1
TBD
5962-0051401QEA
ACTIVE
CDIP
J
16
1
TBD
5962-0051401QPA
ACTIVE
CDIP
JG
8
1
TBD
5962-0051401V2A
ACTIVE
LCCC
FK
20
1
TBD
5962-0051401VEA
ACTIVE
CDIP
J
16
1
TBD
5962-0051401VPA
ACTIVE
CDIP
JG
8
1
UC1708J
ACTIVE
CDIP
JG
8
1
UC1708J883B
ACTIVE
CDIP
JG
8
Lead/Ball Finish
MSL Peak Temp (3)
POST-PLATE N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
A42 SNPB
N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42
N / A for Pkg Type
TBD
A42
N / A for Pkg Type
TBD
A42 SNPB
N / A for Pkg Type
1
TBD
A42 SNPB
N / A for Pkg Type
UC1708JE
ACTIVE
CDIP
J
16
1
TBD
A42 SNPB
N / A for Pkg Type
UC1708JE883B
ACTIVE
CDIP
J
16
1
TBD
A42 SNPB
N / A for Pkg Type
UC1708L883B
ACTIVE
LCCC
FK
20
1
TBD
UTR
POST-PLATE N / A for Pkg Type
UC2708D
OBSOLETE
TBD
Call TI
UC2708DW
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
UC2708DWG4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
UC2708DWTR
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
UC2708DWTRG4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
UC2708J
OBSOLETE
UC2708JE
OBSOLETE
UC2708N
ACTIVE
PDIP
P
8
50
UC2708NE
ACTIVE
PDIP
N
16
25
UC2708NEG4
ACTIVE
PDIP
N
16
UC2708NG4
ACTIVE
PDIP
P
UTR
TBD
Call TI
Call TI
Call TI
TBD
Call TI
Call TI
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
UTR
UC2708Q
OBSOLETE
TBD
Call TI
UC3708DW
ACTIVE
SOIC
UTR
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
UC3708DWG4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
UC3708DWTR
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
UC3708DWTRG4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
UC3708N
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
UC3708NE
ACTIVE
PDIP
N
16
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
UC3708NEG4
ACTIVE
PDIP
N
16
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
UC3708NG4
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
Addendum-Page 1
Call TI
PACKAGE OPTION ADDENDUM
www.ti.com
9-Aug-2008
Orderable Device
Status (1)
UC3708Q
OBSOLETE
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
UTR
TBD
Lead/Ball Finish
Call TI
MSL Peak Temp (3)
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
UC2708DWTR
SOIC
DW
16
2000
330.0
16.4
10.85
10.8
2.7
12.0
16.0
Q1
UC3708DWTR
SOIC
DW
16
2000
330.0
16.4
10.85
10.8
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
UC2708DWTR
SOIC
DW
16
2000
346.0
346.0
33.0
UC3708DWTR
SOIC
DW
16
2000
346.0
346.0
33.0
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.430 (10,92)
MAX
0.010 (0,25) M
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
0.063 (1,60)
0.015 (0,38)
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification.
Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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dsp.ti.com
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logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
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