SY58627L DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control Preliminary General Description The SY58627L high-speed, low jitter receive buffer is optimized for backplane and transmission line data-path management applications. The SY58627L is capable of receiving serial data up to 6.4Gbps across up to 36 inches of FR4. The SY58627L differential input includes Micrel’s unique, 3-pin input termination architecture that directly interfaces to any differential signal as small as 100mVpk (AC- or DC-coupled) without any termination resistor networks in the signal path. The outputs are 50Ω source-terminated CML optimized to drive 400mVpk into 50Ω (100Ω load across the output pair). The I/O termination is connected to a dedicated VTT pin for added bias flexibility. The SY58627L receiver input provides four levels of equalization to compensate for degraded signals resulting from transmission losses. The equalization is programmed with a three-bit interface. The SY58627L operates at 3.3V ±10% supply and is guaranteed over the full industrial temperature range of -40°C to +85°C. The SY58627L is part of Micrel’s high® speed, Precision Edge product line. All data sheets and support documentation can be found on Micrel’s web site at: www.micrel.com. Precision Edge® Features • Selectable equalizing network to optimize incoming data eye pattern • Four selectable equalization levels • Receives up to 36” FR4 PCB trace, or longer combinations of FR4+cable+interconnect • DC through 6.4Gbps data rate throughput • Integrated loopback capability • Unique, flexible I/O: - Patented, Internal termination to VTTIN pin interfaces to any differential AC- or DC-coupled signals - 50Ω source-terminated CML outputs minimize round-trip reflections - Wide input voltage range: 100mV to 1.3VPK - Output disable - DC-offset control with VTT I/O • Input Loss-of-Signal - Hysteresis included • 3.3V ±10% supply voltage • -40°C to +85°C temperature range • Available in 32-pin (5mm x 5mm) MLFTM package Applications • • • • • ATE, T&M backplane management Serial backplane management Combination FR4+cable+interconnect receiver Fibre Channel, GigE, SONET/SDH data transmission Electrical interface and interconnect applications that require DC-offset control Precison Edge is a registered trademark of Micrel, Inc. MLF and MicroLeadFrame are trademarks of Amkor Technology, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com January 2006 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Functional Block Diagram Janaury 2006 2 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Ordering Information(1) Part Number Package Type Operating Range Package Marking Lead Finish SY58627LMG MLF-32 Industrial SY58627L with Pb-Free bar-line indicator NiPdAu Pb-Free SY58627LMGTR(2) MLF-32 Industrial SY58627L with Pb-Free bar-line indicator NiPdAu Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. 2. Tape and Reel. Pin Configuration 32-Pin MLF Janaury 2006 TM (MLF-32) 3 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Pin Description Pin Number 3, 4 6 7 27 23 15 10 11, 12 Janaury 2006 Pin Name Pin Function RXIN, /RXIN Differential receiver input pair: This input pair is the differential signal input to the device. It accepts AC- or DC-coupled signals as small as 100mV (200mVPP). The loss-of-signal (LOS Level) includes a small amount of hysteresis to prevent the lossof-signal output from oscillating when no signal is present. RXIN and /RXIN internally terminate to the VTTIN pin through 50Ω. Please refer to the “Input Interface Applications” section for more details. RXIN, /RXIN differential inputs recommended be ≥ 90mVPK to ensure valid outputs. Consider disabling the outputs when the differential input is not present, or < 90mVPK (e.g.: Hot Swap Applications). VTTIN Input termination center-tap: RXIN and /RXIN terminate to VTTIN. The VTTIN pin provides a center-tap to the internal termination network for maximum interface flexibility, and DC-offset capability. Please refer to the “Input Interface Applications” section for more details. VREF-AC Reference voltage: This output biases to VCC-0.84V. It is used for AC-coupling the input pair (RXIN, /RXIN). Connect VREF-AC directly to the VTTIN pin. Bypass with 0.01µF low ESR capacitor to VCC. Maximum sink/source current is ±1.5mA. Due to the limited drive capability, the VREF-AC pin is only intended to drive the VTTIN pin. Leave VREF-AC pin floating when not used. Please refer to the “Input Interface Applications” section for more details. VTH Input logic threshold control voltage for logic control threshold settings other than LVTTL/CMOS. This input control pin can be externally biased to set the proper threshold for all the logic control pins, /RXEN, LBSEL, 3-bit equalization control, and /RXLBEN. For standard LVTTL/CMOS control, simply leave the VTH pin floating and the threshold voltage defaults to VCC/2 (When VEE = 0V). For LVPECL thresholds, set VTH to VCC-1.3V. /RXEN TTL/CMOS (or VTH controlled) compatible control input for the RXQ output pair. When pulled HIGH, the RXQ output pair is disabled. This input is internally connected to a 25kΩ pull-down resistor and will default to a logic LOW state (Enable) if left open. When disabled, the RXQ output goes LOW, and /RXQ output goes HIGH. Default threshold is VCC/2 when VTH pin is floating. /RXLBEN TTL/CMOS (or VTH controlled) compatible control input for RXLBQ output pair. When pulled HIGH, the RXLBQ output pair is disabled. This input is internally connected to a 25kΩ pull-down resistor and will default to a logic LOW state (Enable) if left open. When disabled, the RXLBQ output goes LOW, and /RXLBQ output goes HIGH. Default threshold is VCC/2 when VTH pin is floating. In normal operating mode, when the RXLBQ output pair is not needed, disable the RXLBQ output pair (/RXLBEN = HIGH) to minimize noise. LBSEL TXLBIN, /TXLBIN Loopback MUX select control: The TTL/CMOS (or VTH controlled) compatible input selects the input to the Loopback mode multiplexer. When LBSEL input is logic HIGH, Loopback mode is selected, and the TXLBIN input pair is selected to pass through the RXQ and RXLBQ output pairs. Note that the LBSEL pin is internally connected to a 25kΩ pull-down resistor and will default to a logic LOW state if left open (normal operation). The Loopback MUX includes internal input isolation to minimize crosstalk. Loopback differential input pair: AC-coupled, CML-compatible input. This input pair includes internal termination connected to an internal VBB for an AC-coupled bias configuration. For local Loopback operation, the TXLBIN input pair receives a signal from the SY58626L transmitter TXLBQ output pair. The input signal from TXLBIN does not have any equalization. When the SY58627L Loopback mode is selected (LBSEL = HIGH), the signal at TXLBIN is directed to the RXQ and RXLBQ output pairs. 4 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Pin Description (Continued) Pin Number 13, 14 21, 19 26 20 Pin Name Pin Function Receiver loopback CML compatible output pair. When the SY58627L is in local Loopback mode (LBSEL = 1), RXLBQ output is directed from TXLBIN (no equalization). When the SY58627L is in normal mode (LBSEL = LOW) and the RXLBQ output is not required, disable the RXLBQ output (/RXLBEN = HIGH) to minimize switching noise. This differential output pair is optimized to drive 400mVPK swing into a 50Ω load (100Ω across the pair). The RXLBQ output pair includes 50Ω internal source termination resistors. RXLBQ, /RXLBQ Receiver differential CML compatible output pair: This CML-compatible output pair is the equalized signal seen at the RXIN input pair and is optimized to drive 400mVPK swing into a 50Ω load (100Ω across the pair). The RXQ output pair includes 50Ω internal source termination resistors. When the SY58627L is in Loopback mode (LBSEL = HIGH), then the RXQ output signal is directed from the unequalized TXLBIN input. RXQ, /RXQ LOS Please contact factory Applications Engineers. Output termination center-tap: Each side of the RXQ differential output pair terminates to the VTTOUT pin through 50Ω. The VTTOUT pin provides a center-tap to the output termination network for maximum interface flexibility, and DC-offset capability. Please refer to the “CML Output Interface Applications” section for more details. VTTOUT TTL/CMOS (or VTH controlled) compatible, 3-bit control interface. There are four levels of equalization, as shown in the “Equalization Select Truth Table.” When the MSB is logic HIGH, the RXQ output pair will not include any equalization. 28 EQ2( MSB) 29 EQ1 001 = medium equalization setting 30 EQ0 010 = medium-high equalization setting 000 = lowest equalization setting 011 = highest equalization setting 1XX = equalization bypass 1, 8, 9, 16, 17, 24, 25 VCC Positive Power Supply: Connect to +3.3V power supply. Bypass with 0.1µF//0.01µF low ESR capacitors as close to VCC pins as possible. 2, 5, 18, 22, 31, 32 VEE, Exposed Pad Ground: Ground pins and exposed pad must be connected to the same ground plane. Equalization Select Truth Table Typical FR4 Length Equalization 0 9” Low Medium Low Disable EQ (MSB = EQ2) Equalization Select (EQ1) Equalization Select (EQ0) 0 0 Janaury 2006 0 0 1 18” 0 1 0 24” Medium High 0 1 1 36” High 1 X X NA Disabled 5 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Absolute Maximum Ratings(1) Operating Ratings(2) Supply Voltage (VCC) ...............................................-0.5V to +4.0V Input Voltage (VIN) ...................................................... -0.5V to VCC Input Current (RXIN, /RXIN, ≤120mins) ............................... 67mA CML Output Current (IOUT) Continuous (≤120mins)..................................................... 67mA Surge .............................................................................. 100mA Termination Current VT .................................................................................. ±100mA VREF-AC Current Source/sink current on VREF-AC.......................................... ±2mA Lead Temperature (soldering, 20 sec.) ..............................+260°C Storage Temperature (TS) ..................................... -65°C to 150°C Supply Voltage (VCC) .................................... +3.0V to +3.6V Ambient Temperature (TA) ............................ -40°C to +85°C (3) Package Thermal Resistance TM MLF (θJA) Still-Air ...............................................................34°C/W MLFTM (ΨJB) Junction-to-Board ..............................................20°C/W DC Electrical Characteristics(4) TA = -40°C to +85°C; unless otherwise stated. Symbol Parameter VCC Power Supply IEE Power Supply Current RIN Input Resistance (RXIN-to-VTTIN) RDIFF_IN Differential Input Resistance (RXIN-to-/RXIN) VIN_TRANS Transmission Line Input Voltage Swing (RXIN, /RXIN) Input signal swing applied to transmission line input up to 36 in. (driver side of RXIN) 0.20 VIN Input Voltage Swing (RXIN, /RXIN) See Figure 4a. 0.1 VDIFF_IN Differential Input Voltage Swing |RXIN-/RXIN| See Figure 4b. 0.2 VIH Input High Voltage (RXIN, /RXIN) VEE+1.6 VCC V VIL Input LOW Voltage (RXIN, /RXIN) VEE+1.4 VIH-0.1 V VTTIN RXIN-to-VTTIN (RXIN, /RXIN) 1.5 V VTTIN Range VTTIN Voltage Range Voltage applied to VTTIN pin VCC-1.5 VCC+1.5 V VTTOUT Range VTTOUT Voltage Range Voltage applied to VTTOUT pin VCC-0.4 LOS Loss-of-Signal Input Levels LOS Assert Note 5 LOS De-assert Note 5 Input Return Loss VREF-AC Condition Min Typ Max Units 3.0 3.3 3.6 V 210 260 mA 45 50 55 Ω 90 100 110 Ω Max VCC, includes 50Ω internal source resistors, no external load current 100MHz to 3.5GHz Output Reference Voltage VPK 1.3 VPP VCC VCC-0.84 V mVPK 10 VCC-0.95 VPK dB VCC-0.7 V Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. Janaury 2006 6 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L 3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. θJA and ΨJB values are determined for a 4-layer board in still air unless otherwise stated. 4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. TJ < 125°C. 5. Please contact factory Applications Engineers. Janaury 2006 7 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L RXQ and RXLBQ Output DC Electrical Characteristics(6) VCC = 3.3V ±10%; VEE = 0V; TA = -40°C to + 85°C; RL = 100Ω across output pair; unless otherwise stated. Symbol Parameter Condition VOH RXQ & RXLBQ Output High Voltage RL = 50Ω to Vcc Output Voltage Swing (RXQ, /RXQ) (RXLBQ, /RXLBQ) See Figure 4a. VOUT See Figure 4b. VDIFF_OUT RXQ & RXLBQ Differential Output Voltage Swing |RXQ-/RXQ| |RXLBQ-/RXLBQ| ROUT Output Impedance Min Typ Max Units VCC-0.040 VCC-0.010 VCC V 325 400 mVPK 650 800 mVPP 45 50 55 Ω Min Typ Max Units V Logic Control DC Electrical Characteristics(6) VCC = 3.3V ±10%; VEE = 0V; TA = -40°C to + 85°C; unless otherwise stated. Symbol Parameter Condition VIH Input HIGH Voltage All control input pins VTH+0.2 VCC VIL Input LOW Voltage All control input pins VEE VTH–0.2 V IIH Input HIGH Current 300 µA IIL Input LOW Current VTH Threshold Input Voltage -300 Voltage applied to pin (VEE = 0V) 1.4 µA VCC/2 2.6 V TXLBIN Input DC Electrical Characteristics(6) VCC = 3.3V ±10%; VEE = 0V; TA = -40°C to + 85°C; RL = 100Ω across output pair; unless otherwise stated. Symbol Parameter RDIFF_IN Differential Input Resistance (TXLBIN-to-/TXLBIN) Condition Min Typ Max Units 90 100 110 Ω VIN Input Voltage Swing (TXLBIN, /TXLBIN) See Figure 4a. 0.1 1.3 VPK VDIFF_IN Differential Input Voltage Swing |TXLBIN-/TXLBIN| See Figure 4b. 0.2 VPP Notes: 6. The circuit is designed to meet the DC specifications, shown in the above table, after thermal equilibrium has been established. 500lfpm Airflow. TJ < 125°C. Janaury 2006 8 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L AC Electrical Characteristics(7) VCC = 3.3V ±10%; VEE = 0V; TA = -40°C to + 85°C; RL = 100Ω across output pair; unless otherwise stated. Symbol Parameter Condition Min Freq Data Rate Throughput (RXQ & RXLBQ) NRZ Data DC tpd Differential Propagation Delay RXIN-to-RXQ, no equalization 150 TXLBIN-to-RXQ Typ 250 Max Units 6.4 Gbps 450 ps 250 tEN RXQ Enable/Disable Time /RXEN 425 tLB_EN RXLBQ Enable/Disable Time /RXLBEN 425 tLBSEL Loopback Select Time 350 tPROG Programming Logic Control Time LBSEL 3-bit equalization control update-to-valid RXQ tpd Tempco Differential Propagation Delay Temperature Coefficient ps 650 ps ps 600 ps 1 ns 120 fs/oC tSKEW Part-to-Part Skew Note 8 200 ps tJITTER Random Jitter (RJ) Note 9 Note 11 psRMS Deterministic Jitter (DJ) Note 10 Note 11 psPP Output Rise/Fall Time (20% to 80%) At full output swing 80 ps tr, tf 20 50 Notes: 7. High-frequency AC-parameters are guaranteed by design and characterization. 8. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at the respective inputs. 9. Random jitter is measured with a K28.7 pattern at: ≤6.4Gbps. 23 10. Deterministic jitter is measured with both K28.5 and 2 -1 PRBS pattern, at 4.25Gbps/6.4Gbps. 11. Contact factory for updated random jitter and deterministic jitter limits. Janaury 2006 9 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Loopback The SY58627L features a loopback test mode, activated by setting LBSEL to logic HIGH. Using the SY58627L with the SY58626L enables local loopback and link side loopback, shown in Figures 2b and 2c. This mode enables an external loopback path, bypassing circuitry on both local and link side. Please refer to Table 1 and Figure 3 for Loopback Control information. Detailed Description The SY58627L is a high speed, low jitter receive buffer with integrated loopback capability. This buffer also provides input signal detect and output disable. Four selectable levels of equalization are included with the receiver. Equalization allows for faster data rates and longer distances by reducing the effects of intersymbol interference (ISI) caused by long cable and trace lengths. Input equalization supports data rates up to 6.4Gbps. DC-Offset Capability The SY58627L transmitter includes the VTTIN and VTTOUT pin for maximum interface flexibility and DCoffset capability for the input and output, respectively. This feature allows for interfacing with different logic families without the use of AC-coupling. The output buffer has internal 50Ω source terminated CML outputs for minimizing round-trip reflections. Transmitter Disable and Shutdown The SY58627L disable function is initiated by pulling /RXEN to logic HIGH. In disable mode, RXQ goes to a LOW state and /RXQ goes to a HIGH state. The threshold for /RXEN is set with the VTH pin. When the VTH pin is floating, the VTH levels are TTL/CMOScompatible with a threshold voltage at VCC/2 (VEE = 0V). For PECL compatible levels, apply a VCC-1.3V voltage at the VTH pin. Please refer to, “Typical Operating Characteristics” for more details. Figure 2a. Normal Operation Figure 2b. Local Loopback Mode Janaury 2006 10 M9999-012606-A [email protected] or (408) 955-1690 SY58627L Link Side Loopback Mode Normal Mode Micrel, Inc. LBSEL /RXLBEN /RXEN RXQ RXLBQ 0 0 0 RXIN RXIN 0 0 1 0 RXIN 0 1 0 RXIN 0 0 1 1 0 0 1 0 0 TXLBIN TXLBIN 1 0 1 0 TXLBIN 1 1 0 TXLBIN 0 1 1 1 0 0 Table 1. Transmit Loopback Control Signal Figure 2c. Link Side Loopback Mode Figure 3. Loopback Control Janaury 2006 11 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Typical Operating Characteristics VCC = 3.3V ±10%; VIN > 400mV; TA = 25°C, RL = 100Ω across output pair; unless otherwise stated. 8in FR4 Output with SY58627L 23 (4.25Gbps PRBS 2 ) Output Swing (100mV/div.) Output Swing (100mV/div.) 8in FR4 Output without SY58627L 23 (4.25Gbps PRBS 2 ) Time (50ps/div.) 8in FR4 Output without SY58627L 23 (6.4Gbps PRBS 2 ) 8in FR4 Output with SY58627L 23 (6.4Gbps PRBS 2 ) Output Swing (100mV/div.) Output Swing (100mV/div.) Time (50ps/div.) Time (50ps/div.) Janaury 2006 Time (20ps/div.) 12 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Typical Operating Characteristics (Continued) VCC = 3.3V ±10%; VIN > 400mV; TA = 25°C, RL = 100Ω across output pair; unless otherwise stated. 1m FR4 Output with SY58627L (2.5Gbps PRBS 223) Output Swing (100mV/div.) Output Swing (100mV/div.) 1m FR4 Output without SY58627L (2.5Gbps PRBS 223) Time (100ps/div.) 1m FR4 Output without SY58627L (4.25Gbps PRBS 223) 1m FR4 Output with SY58627L (4.25Gbps PRBS 223) Output Swing (100mV/div.) Output Swing (100mV/div.) Time (100ps/div.) Time (50ps/div.) 1m FR4 Output without SY58627L (6.4Gbps PRBS 223) 1m FR4 Output with SY58627L (6.4Gbps PRBS 223) Output Swing (100mV/div.) Output Swing (100mV/div.) Time (100ps/div.) Time (25ps/div.) Time (100ps/div.) Janaury 2006 13 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Typical Operating Characteristics (Continued) VCC = 3.3V ±10%; VIN > 400mV; TA = 25°C, RL = 100Ω across output pair; unless otherwise stated. 5m Cable(1) Output with SY58627L (4.25Gbps PRBS 223) Output Swing (100mV/div.) Output Swing (100mV/div.) 5m Cable(1) Output without SY58627L 23 (4.25Gbps PRBS 2 ) Time (50ps/div.) 5m Cable(1) Output without SY58627L (6.4Gbps PRBS 223) 5m Cable(1) Output with SY58627L (6.4Gbps PRBS 223) Output Swing (100mV/div.) Output Swing (100mV/div.) Time (50ps/div.) Time (20ps/div.) Time (20ps/div.) Output Disable /RXQ HIGH RXQ LOW HIGH /RXEN LOW Time (250ns/div.) Note: 1. Measurements made with 26AWG Amphenol Skew Clear Eye Opener Plus cable. Janaury 2006 14 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Single-Ended and Differential Swings Figure 4a. Single-Ended Voltage Swing Figure 4b. Differential Voltage Swing Input and Output Stages Figure 5a. Simplified RXIN Differential Input Stage Figure 5b. Simplified RXQ Differential Output Stage Figure 5c. Simplified TXLBIN Differential Input Stage Figure 5d. Simplified RXLBQ Differential Output Stage Janaury 2006 15 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Input Interface Applications option: may connect VTTIN to VCC Figure 6a. LVPECL Interface (DC-Coupled) Figure 6b. LVPECL Interface (AC-Coupled) Figure 6c. CML Interface (DC-Coupled) Figure 6d. CML Interface (AC-Coupled) Figure 6e. LVDS Interface (DC-Coupled) Figure 6f. TXLBIN Interface (AC-Coupled) Janaury 2006 16 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L RXQ Output Interface Applications Figure 7a. CML DC-Coupled Termination Figure 7b. CML DC-Coupled Termination Figure 7c. CML AC-Coupled Termination RXLBQ Output Interface Applications Figure 7d. CML DC-Coupled Termination Figure 7e. CML DC-Coupled Termination Figure 7f. CML AC-Coupled Termination Related Product and Support Information Part Number Function Data Sheet Link SY58626L DC-to-6.4Gbps Backplane Transmit Buffer with Selectable Output Pre-emphasis, I/O DC-Offset Control, and 200mV-3VPP Output Swing www.micrel.com/product-info/products/sy58626l.shtml MLF™ Application Note www.amkor.com/products/notes_papers/MLFAppNote.pdf New Products and Applications www.micrel.com/product-info/products/solutions.shtml HBW Solutions Janaury 2006 17 M9999-012606-A [email protected] or (408) 955-1690 Micrel, Inc. SY58627L Package Information 32-Pin MLF™ (MLF-32) Package Notes: 1. 2. 3. Package meets Level 2 Moisture Sensitivity Classification. All parts are dry-packed before shipment. Exposed pad must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2006 Micrel, Incorporated. Janaury 2006 18 M9999-012606-A [email protected] or (408) 955-1690