MICREL SY88343DL

SY88343DL
3.3V, 3.2Gbps CML Limiting Post Amplifier
with High-Gain TTL Loss-of-Signal
General Description
Features
The SY88343DL low-power, high-sensitivity, limiting,
post amplifier is designed for use in fiber-optic receivers.
The device connects to typical transimpedance
amplifiers (TIAs). The linear signal output from TIAs can
contain significant amounts of noise and may vary in
amplitude over time. The SY88343DL quantizes these
signals and outputs CML level waveforms.
The SY88343DL operates from a single +3.3V power
supply, over temperatures ranging from –40oC to +85oC.
With its wide bandwidth, high gain, and signals with data
rates up to 3.2Gbps and as small as 5mVPP can be
amplified to drive devices with CML inputs or ACcoupled CML/PECL inputs.
The SY88343DL generates a high-gain loss-of-signal
(LOS) open-collector TTL output. This function has a
high-gain input stage for increased LOS sensitivity. A
programmable loss-of-signal level set pin (LOSLVL) sets
the sensitivity of the input amplitude detection. LOS
asserts high if the input amplitude falls below the
threshold set by LOSLVL and de-asserts low otherwise.
The enable bar input (/EN) de-asserts the true output
signal without removing the input signal. The LOS
output can be fed back to the /EN input to maintain
output stability under a loss-of-signal condition.
Typically, 3.5dB LOS hysteresis is provided to prevent
chattering.
All support documentation can be found on Micrel’s web
site at: www.micrel.com.
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Single 3.3V power supply
155Mbps to 3.2Gbps operation
Low-noise CML data outputs
High-gain LOS
Chatter-free open-collector TTL Loss-of-Signal (LOS)
output with internal 4.75kΩ pull-up resistor
TTL /EN input
Programmable LOS level set (LOSLVL)
Ideal for mutil-rate applications
Available in a tiny (3mm X 3mm) 16-pin MLF®
package
Applications
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APON, BPON, EPON, GEPON, and GPON
Gigabit Ethernet
1X and 2X Fibre Channel
SONET/SDH : OC 3/12/24/48 – STM 1/4/8/16
High-gain line driver and line receiver
Markets
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FTTP
Optical transceivers
Datacom/Telecom
Low-gain TIA interface
Long reach FOM
MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2006
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Micrel, Inc.
SY88343DL
Typical Application
Ordering Information
Part Number
Package Type
Operating Range
Package Marking
Lead Finish
SY88343DLMG
MLF-16
Industrial
SY88343DL with Pb-Free bar line indicator
NiPdAu
Pb-Free
SY88343DLMGTR(1)
MLF-16
Industrial
SY88343DL with Pb-Free bar line indicator
NiPdAu
Pb-Free
Note:
1. Tape and Reel.
Pin Configuration
16-Pin MLF® (MLF-16)
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SY88343DL
Pin Description
Pin Number
MLF™
Pin Name
Type
15
/EN
TTL Input: Default is
HIGH.
1
DIN
Data Input
True data input.
4
/DIN
Data Input
Complementary data input.
6
VREF
14
LOSLVL
Input
2, 3,
GND,
Exposed
Pad
Ground
7
LOS
Open-collector TTL
output w/internal
4.75kΩ pull-down
resistor
9
/DOUT
CML Output
Complementary data output.
12
DOUT
CML Output
True data output.
5, 8,
13, 16
VCC
Power Supply
10, 11
April 2006
Pin Functioon
/Enable: This input enables the outputs when it is LOW. Note that this
input is internally connected to a 25kΩ pull-up resistor and will default to
logic HIGH state if left open.
Reference Voltage: Bypass with 0.1µF low ESR capacitor from VREF to
VCC to stabilize LOSLVL and VREF.
Loss-of-Signal Level Set: a resistor from this pin to VCC sets the
threshold for the data input amplitude at which LOS will be asserted.
Device ground. GND and Exposed pad are to be tied to the same
ground plane.
Loss-of-Signal: asserts high when the data input amplitude falls below
the threshold sets by LOSLVL.
Positive power supply.
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SY88343DL
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VCC) .................................... 0V to +4.0V
Input Voltage (DIN, /DIN) ................................... 0 to VCC
Output Current (IOUT)……………………………+/- 25mA
/EN Voltage ........................................................ 0 to VCC
VREF Current……………………………-800uA to + 500uA
LOSLVL Voltage.............................................. VREF to VCC
Lead Temperature (soldering, 20sec.) .................. 260°C
Storage Temperature (Ts) .....................-65°C to +150°C
Supply Voltage (VCC)..............................+3.0V to +3.6V
Ambient Temperature (TA)....................–40°C to +85°C
Junction Temperature (TJ) ..................–40°C to +125°C
Junction Thermal Resistance
MLFTM (θJA)
Still-air ..................................................... 61°C/W
MLFTM (ΨJB)
Junction-to-board .....................................38oC/W
DC Electrical Characteristics
VCC = 3.0V to 3.6V; RL = 50Ω to VCC; TA = –40°C to +85°C.
Symbol
Parameter
Condition
ICC
Power Supply Current
No output load
LOSLVL
LOSLVL Voltage
VOH
CML Output HIGH Voltage
VOL
CML Output LOW Voltage
VOFFSET
Differential Output Offset
ZO
Single-Ended Output Impedance
VREF
Reference Voltage
VIHCMR
Input Common Mode Range
Min
Typ
45
VREF
VCC = 3.3V
Max
Units
62
mA
VCC
V
V
VCC-0.020
VCC-0.005
VCC
VCC-0.475
VCC-0.400
VCC-0.350
V
±80
mV
60
Ω
40
50
VCC-1.28
GND+2.0
V
VCC
V
Max
Units
TTL DC Electrical Characteristics
VCC = 3.0V to 3.6V; RL = 50Ω to VCC; TA = –40°C to +85°C.
Symbol
Parameter
VIH
/EN Input HIGH Voltage
VIL
/EN Input LOW Voltage
IIH
/EN Input HIGH Current
Condition
Min
2.0
0.8
V
VIN = 2.7V
20
µA
VIN = VCC
100
µA
IIL
/EN Input LOW Current
VIN = 0.5V
VOH
LOS Output HIGH Level
VCC > 3.3V, IOH-MAX < 160µA
VCC < 3.3V, IOH-MAX < 160µA
VOL
LOS Output LOW Level
Typ
-300
µA
2.4
V
2.0
V
IOL = +2mA
0.5
V
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional
operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential (GND)
on the PCB. ΨJB uses 4-layer (θJA) in still-air-number, unless otherwise stated.
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SY88343DL
AC Electrical Characteristics
VCC = 3.0V to 3.6V; RL = 50Ω to VCC; TA = –40°C to +85°C.
Symbol
Parameter
Condition
tr, tf
Output Rise/Fall Time
(20% to 80%)
tJITTER
Min
Typ
Max
Note 4
60
120
Units
ps
Deterministic
Note 5
15
psPP
Random
Note 6
5
psRMS
Differential Input Voltage Swing
Figure 1
VOD
Differential Output Voltage Swing
VID > 12mVPP, Figure 1
TOFF
LOS Release Time
TON
LOS Assert Time
VID
5
700
1800
mVPP
800
950
mVPP
2
10
µs
2
10
µs
LOSAL
Low LOS Assert Level
RLOSLVL = 15kΩ, Note 8
3.0
mVPP
LOSDL
Low LOS De-assert Level
RLOSLVL = 15kΩ, Note 8
4.5
mVPP
HYSL
Low LOS Hysteresis
RLOSLVL = 15kΩ, Note 7
3.5
dB
LOSAM
Medium LOS Assert Level
RLOSLVL = 5kΩ, Note 8
5.0
mVPP
LOSDM
Medium LOS De-assert Level
RLOSLVL = 5kΩ, Note 8
7.5
11
mVPP
HYSM
Medium LOS Hysteresis
RLOSLVL = 5kΩ, Note 7
2
3.5
4.5
dB
LOSAH
High LOS Assert Level
RLOSLVL = 100Ω, Note 8
8
12
LOSDH
High LOS De-assert Level
RLOSLVL = 100Ω, Note 8
18
23
mVPP
HYSH
High LOS Hysteresis
RLOSLVL = 100Ω, Note 7
2
3.5
4.5
dB
B-3dB
3dB Bandwidth
AV(Diff)
Differential Voltage Gain
S21
Single-ended Small-Signal Gain
2
mVPP
2
GHz
32
38
dB
26
32
dB
Notes:
4. Amplifier in limiting mode. Input is a 200MHz square wave.
5. Deterministic jitter measured using 3.2Gbps K28.5 pattern, VID = 10mVPP.
6. Random jitter measured using 3.2Gbps K28.7 pattern, VID = 10mVPP.
7. This specification defines electrical hysteresis as 20log (LOS De-assert/LOS Assert). The ratio between optical hysteresis and
electrical hysteresis is found to vary between 1.5 and 2, depending upon the level of received optical power and ROSA
characteristics. Based on that ratio, the optical hysteresis corresponding to the electrical hysteresis range 2dB-4.5dB, shown in
the AC characteristics table, will be 1dB-3dB Optical Hysteresis.
8. See “Typical Operating Characteristics” for a graph showing how to choose a particular RLOSLVL for a particular LOS assert and
its associated de-assert amplitude.
April 2006
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SY88343DL
Typical Operating Characteristics
April 2006
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SY88343DL
Functional Block Diagram
Detailed Description
Loss-of-signal
The SY88343DL generates a chatter-free LOS opencollector TTL output with an internal 4.75kΩ pull-up
resistor, as shown in Figure 4. LOS is used to
determine that the input amplitude is large enough to
be considered a valid input. LOS asserts high if the
input amplitude falls below the threshold set by
LOSLVL and de-asserts low otherwise. LOS can be fed
back to the enable bar (/EN) input to maintain output
stability under a loss of signal condition. /EN deasserts the true output signal without removing the
input signals. Typically, 3.5dB LOS hysteresis is
provided to prevent chattering.
Loss-of-signal Level Set
A programmable LOS level set pin (LOSLVL) sets the
threshold of the input amplitude detection. Connecting
an external resistor between VCC and LOSLVL sets the
voltage at LOSLVL. This voltage ranges from VCC to
VREF. The external resistor creates a voltage divider
between VCC and VREF, as shown, in Figure 5.
Hysteresis
The SY88343DL typically provides 3.5dB LOS
electrical hysteresis. By definition, a power ratio
measured in dB is 10log (power ratio). Power is
calculated as V2IN/R for an electrical signal. Hence,
the same ratio can be stated as 20log (voltage ratio).
While in linear mode, the electrical voltage input
changes linearly with the optical power and therefore,
the ratios change linearly. Thus, the optical hysteresis
in dB is half the electrical hysteresis in dB given in the
data sheet. Since the SY88343DL is an electrical
device, this data sheet refers to hysteresis in electrical
terms. With 3.5dB LOS hysteresis, a voltage factor of
1.5 is required to assert or de-assert LOS.
The SY88343DL high-sensitivity limiting post amplifier
operates from a single +3.3V power supply, over
temperatures from –40oC to +85oC. Signals with data
rates up to 3.2Gbps and as small as 5mVPP can be
amplified. Figure 1 shows the allowed input voltage
swing. The SY88343DL generates a LOS output.
LOSLVL sets the sensitivity of the input amplitude
detection.
Input Amplifier/Buffer
Figure 2 shows a simplified schematic of the
SY88343DL’s input stage. The high-sensitivity of the
input amplifier allows signals as small as 5mVPP to be
detected and amplified. The input amplifier also allows
input signals as large as 1800mVPP. Input signals are
linearly amplified with a typical 38dB differential
voltage gain. Since it is a limiting amplifier, the
SY88343DL outputs typically 800mVPP voltage-limited
waveforms for input signals that are greater than
12mVPP. Applications requiring the SY88343DL to
operate with high-gain should have the upstream TIA
placed as close as possible to the SY88343DL’s input
pins to ensure the best performance of the device.
Output Buffer
The SY88343DL’s CML output buffer is designed to
drive 50Ω lines. The output buffer requires appropriate
termination for proper operation. An external 50Ω
resistor to VCC for each output pin provides this. Figure
3 shows a simplified schematic of the output stage.
April 2006
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SY88343DL
Figure 1. VIS and VID Definition
April 2006
Figure 2. Input Structure
Figure 3. Output Structure
Figure 4. Input Structure
Figure 5. LOSLVL Setting Circuit
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SY88343DL
Package Information
16-Pin (3mm x 3mm) MLF® (MLF-16)
PCB Thermal Consideration for 16-Pin MLF® Package
Package Notes:
1. Package meets Level 2 qualification.
2. All parts are dry-packaged before shipment.
3. Exposed pad must be soldered to a ground for proper thermal management.
April 2006
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Micrel, Inc.
SY88343DL
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for
its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2006 Micrel Incorporated
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