MICREL SY88933ALKI

SY88933AL
3.3V, 1.25Gbps PECL High-Sensitivity
Limiting Post Amplifier w/TTL Signal Detect
General Description
Features
The SY88933AL high-sensitivity limiting post amplifier
is designed for use in fiber-optic receivers. The device
connects to typical transimpedance amplifiers (TIAs).
The linear signal output from TIAs can contain
significant amounts of noise and may vary in amplitude
over time. The SY88933AL quantizes these signals
and outputs PECL level waveforms.
The SY88933AL operates from a single +3.3V power
supply, over temperatures ranging from –40oC to
+85oC. With its wide bandwidth and high gain, signal
with data rates up to 1.25Gbps and as small as 5mVPP
can be amplified to drive devices with PECL inputs.
The SY88933AL generates a high gain signal-detect
(SD) open-collector TTL output. The SD function has a
high gain input stage for increased sensitivity. A
programmable signal-detect level set pin (SDLVL) sets
the sensitivity of the input amplitude detection. SD
asserts high if the input amplitude rises above the
threshold set by SDLVL and de-asserts low otherwise.
The enable input (EN) de-asserts the true output signal
without removing the input signal. The SD output can
be fed back to the EN input to maintain output stability
under a loss-of-signal condition. Typically, 3.4dB SD
hysteresis is provided to prevent chattering.
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
•
•
•
•
•
•
•
•
•
Single 3.3V power supply
DC-to-1.25Gbps operation
Low-noise PECL data outputs
High gain SD
Chatter-free open-collector TTL signal detect (SD)
output with internal 4.75kΩ pull-up resistor
TTL EN input
Programmable SD level set (SDLVL)
Available in a tiny 10-pin MSOP package
Pin-compatible with SY88933V
Applications
•
•
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GPON/BPON/EPON/GEPON
Gigabit Ethernet
531Mbps and 1062Mbps Fibre Channel
OC-3 and OC-12 SONET/SDH
High-gain line driver and line receiver
Low-gain TIA interface
Markets
• FTTX
• Optical transceiver
• Datacom/telecom
MLF and MicroLeadFrame are registered trademarks of Amkor Technology.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
February 2007
M9999-021207-B
[email protected] or (408) 955-1690
Micrel, Inc.
SY88933AL
Typical Application Circuit
February 2007
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Micrel, Inc.
SY88933AL
Ordering Information
Package
Type
Operating
Range
Package Marking
Lead
Finish
SY88933ALKG
K10-1
Industrial
933A with Pb-Free bar line indicator
NiPdAu
Pb-Free
SY88933ALKGTR(1)
K10-1
Industrial
933A with Pb-Free bar line indicator
NiPdAu
Pb-Free
SY88933ALKI
K10-1
Industrial
933A
SnPb
K10-1
Industrial
933A
SnPb
Part Number
SY88933ALKITR
(1)
Note:
1. Tape and Reel.
Pin Configuration
10-Pin MSOP (K10-1)
Pin Description
Pin Number
Pin Name
Type
Pin Function
1
EN
TTL Input: Default is
HIGH.
Enable: This input enables the outputs when it is HIGH. Note that
this input is internally connected to a 25kΩ pull-up resistor and will
default to a logic HIGH state if left open.
2
DIN
Data Input
True data input.
3
/DIN
Data Input
Complementary data input.
4
VREF
5
SDLVL
Input
6
GND
Ground
7
SD
Open-collector TTL
output w/internal
4.75kΩ pull-up
resistor
8
/DOUT
PECL Output
Complementary data output.
9
DOUT
PECL Output
True data output.
10
VCC
Power Supply
Positive power supply.
February 2007
Reference voltage: Placing a capacitor here to VCC helps stabilize
SDLVL.
Signal-Detect Level Set: a resistor from this pin to VCC sets the
threshold for the data input amplitude at which SD will be asserted.
Device ground.
Signal-Detect: asserts high when the data input amplitude rises
above the threshold set by SDLVL.
3
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Micrel, Inc.
SY88933AL
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VCC) .................................. 0V to +7.0V
Input Voltage (DIN, /DIN) ..................................0 to VCC
Output Current (IOUT)
Continuous..................................................... 50mA
Surge ........................................................... 100mA
EN Voltage ........................................................0 to VCC
VREF Current .................................... –800µA to +500µA
SDLVL Voltage ...............................................VREF to VCC
Lead Temperature (soldering, 20sec.) ................ 260°C
Storage Temperature (Ts) .................. –65°C to +150°C
Supply Voltage (VCC)............................+3.0V to +3.6V
Ambient Temperature (TA) ..................–40°C to +85°C
Junction Temperature (TJ) ................–40°C to +120°C
Junction Thermal Resistance
MSOP (θJA) Still-air ................................. 113°C/W
DC Electrical Characteristics
VCC = +3.0V to +3.6V; RLOAD = 50Ω to VCC–2V; TA = –40°C to +85°C; typical values at VCC = +3.3V, TA = +25oC.
Symbol
Parameter
Condition
Min
Typ
ICC
Power Supply Current
No output load
SDLVL
SDLVL Voltage
VOH
PECL Output HIGH Voltage
VCC-1.085 VCC-0.955 VCC-0.880
VOL
PECL Output LOW Voltage
VCC-1.850 VCC-1.705 VCC-1.555
V
VIHCMR
Common Mode Range
GND+2.0
V
VREF
Reference Voltage
VCC-1.48 VCC-1.32 VCC-1.16
26
VREF
Max
Units
39
mA
VCC
V
VCC
V
V
TTL DC Electrical Characteristics
VCC = 3.0V to 3.6V; RLOAD = 50Ω to VCC-2V; TA = –40°C to +85°C.
Symbol
Parameter
Condition
Min
Typ
Max
Units
VIH
EN Input HIGH Voltage
VIL
EN Input LOW Voltage
0.8
V
IIH
EN Input HIGH Current
20
µA
IIL
EN Input HIGH Current
VIN = 0.5V
-0.3
mA
VOH
SD Output HIGH Level
VCC > 3.3V, IOH-MAX < 160uA
2.4
V
VCC < 3.3V, IOH-MAX < 160uA
2.0
VOL
SD Output LOW Level
2.0
VIN = 2.7V
VIN = VCC
V
100
IOL = +2mA
µA
V
0.5
V
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
February 2007
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SY88933AL
AC Electrical Characteristics
VCC = 3.0V to 3.6V; RLOAD = 50
to VCC–2V; TA = –40°C to +85°C; typical values at VCC = +3.3V, TA = +25oC.
Symbol
Parameter
PSRR
Power Supply Rejection Ratio
tr, tf
Output Rise/Fall Time
(20% to 80%)
Note 3
tJITTER
Condition
Min
Typ
Max
35
Units
dB
260
ps
Deterministic
Note 4
15
pspp
Random
Note 5
5
psRMS
VID
Differential Input Voltage Swing
Figure 1
VOD
Differential Output Voltage Swing
VID > 18mVpp, Figure 1
TOFF
SD Release Time
2
10
µs
TON
SD Assert Time
2
10
µs
SDAL
Low SD Assert Level
3.4
6.5
mVpp
SDDL
Low SD De-assert Level
RSDLVL = 15kΩ, Note 6
1.0
2.3
HYSL
Low SD Hysteresis
RSDLVL = 15kΩ, Note 7
1
3.4
4.5
dB
SDAM
Medium SD Assert Level
RSDLVL = 5kΩ, Note 6
6.2
8
mVpp
SDDM
Medium SD De-assert Level
RSDLVL = 5kΩ, Note 6
3
4.2
HYSM
Medium SD Hysteresis
RSDLVL = 5kΩ, Note 7
2
3.4
4.5
dB
SDAH
High SD Assert Level
RSDLVL = 100Ω, Note 6
16.4
20
mVpp
SDDH
High SD De-assert Level
RSDLVL = 100Ω, Note 6
8
10.8
HYSH
High SD Hysteresis
RSDLVL = 100Ω, Note 7
2
3.4
B-3dB
3dB Bandwidth
1
GHz
AV(Diff)
Differential Voltage Gain
42
dB
S21
Single-Ended Small-Signal Gain
36
dB
5
1800
1500
RSDLVL = 15kΩ, Note 6
30
mVpp
mVpp
mVpp
mVpp
mVpp
4.5
dB
Notes:
3. Amplifier in limiting mode. Input is a 200MHz square wave.
4. Deterministic jitter measured using 1.25Gbps K28.5 pattern, VID = 10mVpp.
5. Random jitter measured using 1.25Gbps K28.7 pattern, VID = 10mVpp.
6. See “Typical Operating Characteristics” for a graph showing how to choose a particular RSDLVL for a particular SD assert and
its associated de-assert amplitude.
7. This specification defines electrical hysteresis as 20log (SD Assert/SD De-assert). The ratio between optical hysteresis and
electrical hysteresis is found to vary between 1.5 and 2 depending upon the level of received optical power and ROSA
characteristics. Based on that ratio, the optical hysteresis corresponding to the electrical hysteresis range 1dB-4.5 dB, shown
in the AC characteristics table, will be 0.5dB-3dB optical hysteresis
February 2007
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[email protected] or (408) 955-1690
Micrel, Inc
SY88933AL
Typical Characteristics
February 2007
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SY88933AL
Functional Block Diagram
Detailed Description
The SY88933AL low-power limiting post amplifier
operates from a single +3.3V power supply, over
temperatures from –40oC to +85oC. Signals with data
rates up to 1.25Gbps, and as small as 5mVpp, can be
amplified. Figure 1 shows the allowed input voltage
swing. The SY88933AL generates an SD output. SDLVL
sets the sensitivity of the input amplifier section.
Input Amplifier/Buffer
Figure 2 shows a simplified schematic of the
SY88933AL’s input stage. The high-sensitivity of the
input amplifier allows signals as small as 5mVpp to be
detected and amplified. The input amplifier also allows
input signals as large as 1800mVpp. Input signals are
linearly amplified with a typical 42dB differential voltage
gain. Since it is a limiting amplifier, the SY88933AL
outputs typically 1500mVpp voltage-limited waveforms
for input signals that are greater than 12mVpp.
Applications requiring the SY88933AL to operate with
high-gain should have the upstream TIA placed as close
as possible to the SY88933AL’s input pins to ensure the
best performance of the device.
Output Buffer
The SY88933AL’s PECL output buffer is designed to
drive 50Ω lines. The output buffer requires appropriate
termination for proper operation. An external 50Ω
resistor to VCC–2V for each output pin provides this.
Figure 3 shows a simplified schematic of the output
stage.
February 2007
Signal-Detect
The SY88933AL generates a chatter-free SD opencollector TTL output with an internal 4.75kΩ pull-up
resistor as shown in Figure 4. SD is used to determine
that the input amplitude is large enough to be
considered a valid input. SD asserts high if the input
amplitude rises above the threshold set by SDLVL and
de-asserts low otherwise. SD can be fed back to the
enable (EN) input to maintain output stability under a
loss of signal condition. EN de-asserts the true output
signal without removing the input signals. Typically,
3.4dB SD hysteresis is provided to prevent chattering.
Signal-Detect Level Set
A programmable SD level set pin (SDLVL) sets the
threshold of the input amplitude detection. Connecting
an external resistor between VCC and SDLVL sets the
voltage at SDLVL. This voltage ranges from VCC to VREF.
The external resistor creates a voltage divider between
VCC and VREF, as shown in Figure 5.
Hysteresis
The SY88933AL provides typically 3.4dB SD electrical
hysteresis. By definition, a power ratio measured in dB
is 10log (power ratio). Power is calculated as V2IN/R for
an electrical signal. Hence, the same ratio can be stated
as 20log (voltage ratio). While in linear mode, the
electrical voltage input changes linearly with the optical
power and hence, the ratios change linearly. Therefore,
the optical hysteresis in dB is half the electrical
hysteresis in dB given in the data sheet. The
SY88933AL is an electrical device, and this data sheet
refers to hysteresis in electrical terms. With 3.4dB SD
hysteresis, a voltage factor of 1.5 is required to assert or
de-assert SD.
7
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Micrel, Inc
SY88933AL
Figure 1. VIS and VID Definitions
Figure 2. Input Structure
Figure 3. Output Structure
Figure 4. SD Output Structure
Figure 5. SDLVL Setting Circuit
Note: Recommended value for RSDLVL is 15kΩ or less.
Related Product and Support Documentation
Part Number
Function
Data Sheet Link
Application Notes
Notes on Sensitivity and Hysteresis in Micrel
Post Amplifiers
http://www.micrel.com/product-info/app_hints+notes.shtml
February 2007
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M9999-021207-B
[email protected] or (408) 955-1690
Micrel, Inc
SY88933AL
Package Information
10-Pin MSOP (K10-1)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for
its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
February 2007
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M9999-021207-B
[email protected] or (408) 955-1690