MICREL SY89645LK4G

SY89645L
Precision Low Skew, 1-to-4 LVCMOS/LVTTLto-LVDS Fanout Buffer
General Description
The SY89645L is a 3.3V, fully differential, low skew, 1:4
LVDS fanout buffer that accepts LVTTL or LVCMOS
inputs. It is capable of processing clock signals as fast
as 650MHz. The LVDS signals are optimized to provide
less than 40ps of output skew.
The single-ended input takes a 3.3V LVTTL or
LVCMOS, with a signal swing as small as 1.2V. The
outputs are 280mV LVDS, with fast rise and fall times,
guaranteed to be less than 400ps.
The SY89645L operates from a 3.3V + 5% power
supply and is guaranteed over the full industrial
temperature range (–40°C to +85°C). The SY89645L is
part of Micrel’s Precision Edge® product line. Data
sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Block Diagram
Precision Edge®
Features
•
•
•
•
•
•
•
•
•
•
Four identical LVDS outputs
CLKIN accepts LVCMOS or LVTTL input levels
Maximum output frequency: 650MHz
Translates LVCMOS/LVTTL input signals to LVDS
levels
<40ps output-to-output skew
<3ns propagation delay
<400ps rise/fall times
3.3V ±5% operating supply
Industrial temperature range: –40°C to +85°C
Available in 20-pin TSSOP
Applications
• Communications
• High-performance computing
• Clock and data distribution
Markets
•
•
•
•
•
Datacom
Telecom
Storage
ATE
Test and Measurement
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
September 2006
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Micrel, Inc.
SY89645L
Ordering Information(1)
Part Number
Package
Type
Operating
Range
Package Marking
Lead
Finish
SY89645LK4G
K4-20-1
Industrial
SY89645LK4G with
Pb-Free bar-line indicator
NiPdAu
Pb-Free
K4-20-1
Industrial
SY89645LK4G with
Pb-Free bar-line indicator
NiPdAu
Pb-Free
SY89645LK4GTR
(2)
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.
2. Tape and Reel.
Pin Configuration
20-Pin TSSOP (K4-20-1)
Pin Description
Pin Number
Pin Name
1, 9, 13
GND
2
CLK_EN
Pin Function
Power Supply Ground.
Clock Enable. When LOW, Q outputs are forced low, /Q outputs are forced high.
The synchronous nature of the enable function forces the output clocks to enable or
disable following a rising and a falling edge of the input clock. When HIGH, clock
outputs follow input clock. Internal 50kΩ pull-up resistor. VTH = VCC/2. See “Clock
Enable (CLK_EN) Description” section.
3, 5, 6, 7, 8
NC
4
CLKIN
LVCMOS/LVTTL Clock Input. This is the input to the device. Input accepts singleended input signals as small as 1.2V. VTH = VCC/2. Internal 50Ω pull-down resistor.
10, 18
VCC
Positive Supply Pins. Connect to 3.3V supply, bypass with low ESR capacitors, as
close to pins as possible.
11, 12
/Q3, Q3
14, 15
/Q2, Q2
16, 17
/Q1, Q1
LVDS Differential Output Pairs: Differential buffered copies of the input signal. The
output swing is typically 280mV. Normally terminated with 100Ω across the output
pairs (Q and /Q). See “LVDS Output Termination” section.
19, 20
/Q0, Q0
September 2006
No Connect.
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SY89645L
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VCC) ............................... –0.5V to +4.6V
Input Voltage (VIN) ............................ –0.5V to VCC +0.3V
LVDS Output Current (IOUT)..................................±10mA
Lead Temperature (soldering, 20sec.) .................. 260°C
Storage Temperature (Ts) ....................–65°C to +150°C
Supply Voltage (VIN)...................... +3.135V to +3.465V
Ambient Temperature (TA) ................... –40°C to +85°C
Package Thermal Resistance(3)
TSSOP
Junction-to-Ambient (θJA)
Still-air, multi-layer board ................ 75°C/W
Junction-to-Case (θJC) ........................... 21°C/W
DC Electrical Characteristics(4)
VDD = 3.3V ±5%, TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
VCC
Positive Supply Voltage Range
ICC
Power Supply Current
Condition
Min
Typ
Max
3.135
3.3
3.465
V
43
60
mA
Typ
Max
Units
No Load
Units
LVCMOS/LVTTL DC Electrical Characteristics(4)
VCC = 3.3V ±5%, TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
VIH
Input HIGH Voltage
CLKIN, CLK_EN
2
VCC+0.15
V
VIL
Input LOW Voltage
CLKIN, CLK_EN
-0.3
0.8
V
IIH
Input HIGH Current
CLKIN
CLK_EN
VCC = VIN = 3.465V
150
70
µA
µA
IIL
Input LOW Current
CLKIN
CLK_EN
VCC = 3.465V, VIN = 0V
VCC = 3.465V, VIN = 0V
VCC = VIN = 3.465V
-70
-150
µA
µA
LVDS Outputs DC Electrical Characteristics(4)
VCC = 3.3V ±5%, RL = 100Ω across the outputs, TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
VOUT
Output Voltage Swing
See Figure 1a
200
280
Max
Units
mV
VDIFF_OUT
Differential Output Voltage Swing
See Figure 1b
400
560
mV
VOCM
Output Common Mode Voltage
1.125
1.25
1.375
V
∆VOCM
Change in Common Mode
Voltage
5
25
mV
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for
extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. ψJB and θJA values are determined for a 4-layer board in still-air number, unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
September 2006
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SY89645L
AC Electrical Characteristics(5)
VCC = +3.3V ±5%, RL = 100Ω across the outputs, TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
1.8
3.0
ns
40
ps
500
ps
400
ps
fMAX
Maximum Frequency
VOUT > 140mV
650
tPD
Propagation Delay
fMAX ≤ 650MHz, Note 6
1.0
tSKEW
Output Skew
Note 7
Part-to-Part Skew
Note 8
Output Rise/Fall Times
(20% to 80%)
fMAX ≤ 266MHz
Duty Cycle
fMAX ≤ 266MHz
45
55
%
fMAX > 266MHz
40
60
%
tr, tf
150
MHz
250
Notes:
5.
All parameters measured at fMAX ≤ 650MHz, unless otherwise stated.
6.
Measured from VCC/2 of the input to the differential output crossing point.
7.
Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VCC/2 of the input to the differential
output crossing point.
8.
Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same
type of inputs on each device, the outputs are measured at the differential cross points.
Timing Diagram
Clock Enable (CLK_EN) Description
The enable function is synchronous so that the clock outputs will be enabled or disabled following a rising and a
falling edge of the input clock.
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SY89645L
Typical Operating Characteristics
VCC = 3.3V ± 5%; VIN > 2V; TA = 25°C, RL = 100Ω across output pair; unless otherwise stated.
September 2006
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SY89645L
Single-Ended and Differential Swings
LVDS Output Interface Applications
Figure 1a. Single-Ended Voltage Swing
LVDS specifies a small swing of 280mV typical, on a
nominal 1.25V common mode above ground. The
common mode voltage has tight limits to permit large
variations in ground between an LVDS driver and
receiver. Also, change in common mode voltage, as a
function of data input, is kept to a minimum, to keep
EMI low.
Figure 1b. Differential Voltage Swing
Figure 2a. LVDS Differential Measurement
Figure 2b. LVDS Common Mode Measurement
September 2006
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M9999-091906-A
[email protected] or (408) 955-1690
Micrel, Inc.
SY89645L
Package Information
20-Pin TSSOP (K4-20-1)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its
use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury
to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and
Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2006 Micrel, Incorporated.
September 2006
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M9999-091906-A
[email protected] or (408) 955-1690