Advance Information MC13181/D Rev. 0, 08/2002 MC13181 Wireless Power Management Integrated Circuit (Scale 2:1) Package Information Plastic Package Case 1307 (QFN-24) Ordering Information Device Marking Package MC13181R2 13180 QFN-24 The MC13181 Wireless Power Management Integrated Circuit (PMIC) is a monolithic IC designed for hand-held electronics products in conjunction with the Motorola Bluetooth chipset (the MC13180 Bluetooth Radio and MC71000 Bluetooth Protocol Controller) or stand-alone in other products. The MC13181 is ideal for devices operating from a 3.6 V single-cell Lithium-ion battery or other energy systems in the 2.85 to 6.5 V range. The IC features three independently enabled Low Drop Out (LDO) Linear Voltage Regulators for powering baseband, audio, RF/IF, and interface circuitry. A comparator with logic-enabled hysteresis and one scaled input is provided for use as a low-battery detector to protect against destructive battery discharge; it can alternately be used for general system interfacing. A supervisory circuit is integrated to provide a reset signal to the Protocol Controller indicating valid supply. An over-temperature shutdown function is integrated to protect against excessive power dissipation. A Shutdown input line is provided to allow for disabling of all active circuitry to minimize battery loading and to provide single line master disable. Logic inputs accept Vih levels from 1.5 V to VCC. Typical Applications • Add-On Bluetooth Adaptor Cards for Cellular Phones • Cellular Phones • USB Dongle • GPS or PDA • Cordless Headsets • Other portable devices requiring multiple independent regulators in one package This document contains information on a pre-production product. Specifications and Pre-production information herein are subject to change without notice. © Motorola, Inc., 2002. All rights reserved. Features • Low-Battery Detector • Three LDO Voltage Regulators: 2.65 V, 65 mA for RF/IF 1.85 V, 30 mA for Baseband 3.0/3.3 V, 60 mA for USB, Audio CODEC, or other circuitry Integrated Pass Device Independent Enable Lines Optimized for Low-Cost Bypass Capacitors • Microprocessor Supervisor Circuit • General Purpose Inverter, OR Gate and Comparator • Maximum VCC Rated up to 7.0 V (6.5 V recommended) • Voltage-Robust, Level Shifted Logic Inputs to VCC (6.5 V) • Seamless Integration with Motorola's Bluetooth Chipset • Thermal Shutdown VCC 2 1.265 V Ref 2.65 EN LDO 2.65 2.65 V 65 mA 1.85_EN 1.85 V 30 mA Select 3.0/3.3_EN 3.0/3.3 V 60 mA Hys LDO 1.85 LDO 3.0/3.3 Shutdown Thermal Shutdown Reset Reset Figure 1. Simplified Block Diagram 2 MC13181 Advance Information MOTOROLA Electrical Specifications 1 Electrical Specifications Table 1. Maximum Ratings Ratings Symbol Value Unit Power Supply Input Voltage VI 0 to 7.0 V Voltage Input Vin -0.3 to VCC +0.3 V Output Voltage Vout -0.3 to VCC +0.3 V - Infinite - Thermal Resistance, Junction to Ambient Rθja 115 °C/W Storage Temperature Range Tstg -40 to 150 °C TJ 125 °C Tsolder 10 sec Output Short Circuit Duration Operating Junction Temperature Lead Soldering Temperature @ 260°C NOTE: Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics tables or Contact Description section. Table 2. Maximum Package Power Dissipation The power dissipation level at which the junction temperature reaches its maximum operating value, i.e., 125°C. Characteristic Symbol Min Typ Max Unit Power Dissipation, in air Pd - - 345 mW Power Dissipation, 4-layer board Pd - - 1000 mW Table 3. Recommended Operating Conditions Characteristic Supply Voltage Temperature Range Symbol Min Typ Max Unit VCC 2.85 - 6.5 V TA -40 - 85 °C Table 4. Electrical Characteristics (VCC = 3.6 V, Cin = 1.0 µF, Cout = 1.0 µF, TA = 25°C for typical values, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Vout 1.813 1.85 1.887 V Line Regulation (VCC2 = 2.85 V to 6.5 V, Iout = 15 mA) REGline - 1.0 10 mV Load Regulation (Iout = 10 µA to 30 mA) REGload - 15 45 mV LDO_1.85 Output Voltage in 1.85 V Mode MOTOROLA MC13181 Advance Information 3 Electrical Specifications Table 4. Electrical Characteristics (Continued) (VCC = 3.6 V, Cin = 1.0 µF, Cout = 1.0 µF, TA = 25°C for typical values, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit PSRR 40 - - dB Output Noise Voltage @ Io = 20 mA (f = 10 kHz to 100 kHz) Vn - 30 - µVrms Short Circuit Current Limit (Vout = 0 V) Ilim - 90 - mA Supply Current in ON mode (Iout = 0 mA) ISS - 30 40 µA Output Capacitor Cout 1 - - µF ESR of Output Capacitor ESR - 5.0 - Ω - 1.0 - % Ripple Rejection (Ripple 0.5 Vpp, VCC = 2.95 V, Io = 15 mA) f = 1.0 kHz Output Voltage Transient Response (10% to 100% of Imax) Output Turn On Time from Enable to 90% of final value Ton - 20 100 µs Output Voltage Temperature Coefficient TC - 100 - ppm / °C Output Voltage V 2.60 2.65 2.70 V Dropout Voltage VCC-Vout - 1.0 - mV/ mA Line Regulation (VCC1 = 2.85 V to 6.5 V, Iout = 32.5 mA) REGline - 3.0 10 mV Load Regulation (Iout = 10 µA to 65 mA) REGload - 15 45 mV - 60 41 34 - LDO_2.65 Ripple Rejection, (VCC Ripple = 0.5 Vpp, Io = 32.5 mA) f = 1.0 kHz f = 10 kHz f = 1 MHz PSRR dB Output Noise Voltage @ Io = 50 mA (f = 10 kHz to 100 kHz) Vn - 30 - µVrms Short Circuit Current Limit (Vout = 0 V) Ilim - 200 - mA Supply Current in ON mode (Iout = 0 mA) ISS - 100 125 µA Output Capacitor Cout 1.0 - - µF ESR of Output Capacitor ESR - 4.0 - W - 1.0 - % - 20 100 µs Output Voltage Transient Response (10% to 100% of Imax) Output Turn On Time from Enable to 90% of final value 4 Ton MC13181 Advance Information MOTOROLA Electrical Specifications Table 4. Electrical Characteristics (Continued) (VCC = 3.6 V, Cin = 1.0 µF, Cout = 1.0 µF, TA = 25°C for typical values, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit TC - 100 - ppm / °C Output Voltage in 3.0 V Mode Select High Vout 3.0 3.06 3.12 V Output Voltage in 3.3 V Mode Select Low Vout 3.234 3.3 3.366 V Dropout Voltage VCC-Vout - 1.0 - mV/ mA Line Regulation (VCC = 3.5 V to 6.5 V, Iout = 30 mA) REGline - 2.5 10 mV Load Regulation (Iout = 10 µA to 60 mA) REGload - 8.0 45 mV 40 - - Output Voltage Temperature Coefficient LDO_3.0/3.3 Ripple Rejection, (Ripple 0.5 Vpp, VCC = Vout + 0.6 V, Io = 30 mA) f = 1.0 kHz PSRR dB Output Noise Voltage @ Io = 50 mA (f = 10 kHz to 100 kHz) Vn - 30 - µVrms Short Circuit Current Limit (Vout = 0 V) Ilim - 200 - mA Supply Current in ON mode (VCC = Vout + 0.6 V, Iout = 0 mA) Iss - 10 65 µA Output Capacitor Cout 1.0 - - µF ESR of Output Capacitor ESR - 4.0 - W - 1.0 - % Output Voltage Transient Response (10% to 100% of Imax) Output Turn On Time from Enable to 90% of final value Ton - 50 100 µs Output Voltage Temperature Coefficient TC - 100 - ppm / °C VTH 1.65 1.70 1.75 V 8.0 - 14 170 300 RESETB Circuit with Programmable Delay ResetB Threshold ResetB Active Timeout period with Delay Cap = 5.6 nF with Delay Cap = 68 nF ms Treset Output Voltage Low Vol 0 - 0.1 V Output Voltage High Voh - VLDO_1. - V - mA 85 Output Current RESETB (source or sink) MOTOROLA |Io| MC13181 Advance Information 1.0 - 5 Electrical Specifications Table 4. Electrical Characteristics (Continued) (VCC = 3.6 V, Cin = 1.0 µF, Cout = 1.0 µF, TA = 25°C for typical values, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit Voffset -5.0 - 5.0 mV Input Impedance (Vin + and Vin -) Rin - 1600 Input Voltage Range Vin + Vin+ 1.0 - VCC2 1V 1.0 - VCC2 Comparator with Programmable Hysteresis Input Offset Voltage kΩ V Input Voltage Range Vin - (scaling factor of approximately 0.44) Vin- Output Voltage Low Vol 0 - 0.1 V Output Voltage High Voh - VLDO_1.85 - V Slew Rate CL = 50 pF Positive Slope Negative Slope SR - 100 200 - Output Current DETECT (source or sink) |Io| 1.0 - - - 30 - VCC1 2.2 - 6.5 V Vref 1.250 1.265 1.278 V TCVref - 0.022 - mV/°C VREF_LINE - 0.08 - mV/V - 470 - nF Tstartup - 1.0 - ms VCC2 2.2 - 6.5 V Output Voltage Low Vol - - 0.1 V Output Voltage High Voh 1.55 - VCC2 V - 50 - mV - - 0.1 V V V/µs Hysteresis Voltage Pin HYS SELECT Low (hysteresis enabled) mA mV Voltage Reference (Cout = 470 nF Ceramic) VCC Operating Range Output Voltage Temperature Coefficient Line Regulation Output Capacitor Startup Time OR Gate VCC Operating Range Inverter Gate Hysteresis Voltage Output Voltage Low 6 Vol MC13181 Advance Information MOTOROLA Electrical Specifications Table 4. Electrical Characteristics (Continued) (VCC = 3.6 V, Cin = 1.0 µF, Cout = 1.0 µF, TA = 25°C for typical values, unless otherwise noted.) Characteristic Output Voltage High Symbol Min Typ Max Unit Voh - VLDO_1. - V 85 Common Quiescent Current VCC1 (all LDO enables low) Icq1 - 30 42 µA Quiescent Current VCC2 (all LDO enables low) Icq2 - 7.0 13 µA Quiescent Current VCC (SHUTDOWN_B low) Icq sd - 1.8 - µA Input Voltage Low (enable, shutdown, Q1_B, Q2, hys sel, 3.0/3.3 select) Vil 0 - 0.15 V Input Voltage High (enable, shutdown, Q1_B, Q2, hys sel, 3.0/3.3 select) Vih 1.5 - VCC2 V Pull Down Resistor (enable, Q2, select) Rpd - 1.0 - MΩ VCC Differential (VCC2 > VCC1) VCC2-VCC1 - 0 0.3 V VCC Differential (VCC1 > VCC2) VCC1-VCC2 - 0 VCC1 V MOTOROLA MC13181 Advance Information 7 Electrical Specifications VOUT1.85 (1.85 V, 30 mA) (with optional connections for Low Battery detection) AGND2 (REFOUT) VIN+ (VCC2) VIN- DETECT HYSSEL 24 23 22 21 LDO 2.65 VOUT2.65 (2.65 V, 65 mA) *1.0 µF 1 VOUT *0.1 µ F VCC1 VOUT IREF EN GND GND EN VIN 18 1.85_EN 17 2.65_EN 16 SHUTDOWN_B 15 RESET_B 14 3.0/3.3_SEL 13 3.0/3.3_EN SHUTDOWN_B TSD_B 1M SHUTDOWN_B TSD_B SHUTDOWN_B 1M SHUTDOWN_B 3 1.0 µF Thermal Shutdown VCC2 REFOUT AGND1 VOUT 734 k REF *470 nF VOUT1.85 VIN VIN GND 2 19 LDO_1.85 882 k Globally Distributed REFOUT (1.265 V) 20 VCC2 VOUT1.85 EN *1.0 µ F Threshold = 1.7 V TSD_B VCC REF VOUT 4 VOUT1.85 VIN CAP RESET_B GND SGND Local Substrate Moat 5 RESET SHUTDOWN_B TSD_B VOUT1.85 Q1_B S_INV VCC2 6 VCC2 Q1_B 1M INV GND V-SEL OR EN VOUT 1M 1M VCC2 LDO_3.0/3.3 7 *1.0 µF 8 *1.0 µF 9 10 11 12 Q1_B Q2 S_OR User Defined 1.0 µF * Mount part close to IC VOUT3.0/3.3 (3.0/ 3.3 V, 60 mA) VCC2 DELAY_CAP Figure 2. Simplified Functional Diagram 8 MC13181 Advance Information MOTOROLA Pin Function Descriptions 2 Pin Function Descriptions Table 5. Pin Function Description Pin Symbol/ Type 1 VOUT2.65 Description Equivalent Internal Circuit VOUT2.65 Regulator Output, LDO_2.65, 2.65 V, 65 mA Output VCC1 Vref 1 Cext 162 k ESD 2 REFOUT Bypass with low ESR 1.0 µF tantalum capacitor [Note 1] 152 k REFOUT,1.265 V Reference Voltage Output, Bypass with low ESR 470 nF [Note 1] VCC1 2.0 k Band Gap 1.0 k 2 Cext Notes 274 k 3 VCC1 VCC1, Positive Supply, Power Supply Input for Reference Generation and LDO_2.65 to VCC 3* * also pin 8 C bypass (2) 4 AGND1 AGND1 Ground, Analog Ground for Reference Generation and LDO_2.65 ESD 4 A ground 1 Bypass with a 0.1 µF close to the part and a 1.0 µF low ESR. Tie to ground ESD 5 SGND SGND Ground, Substrate for LDO_2.65 and Reference Generator 5 S ground Tie to ground ESD 6 S_INV S_INV, Inverter Output LDO_1.85 referenced to VLDO_1.85 6* ESD * also pins 15 & 22 NOTES: 1. All capacitors are assumed to be low ESR tantalum. De-rating factor on capacitance value is assumed to be -20% to 10% over all cases of tolerance and temperature. 2. Contact assignments are subject to change. MOTOROLA MC13181 Advance Information 9 Pin Function Descriptions Table 5. Pin Function Description (Continued) Pin Symbol/ Type 7 VOUT3.0/3.3 Description Equivalent Internal Circuit VOUT3.0/3.3 Regulator, LDO_3.0/3.3, 60 mA Output VCC2 Vref 7 Cext 3.0/3.3 select 23 k Notes Bypass with low ESR 1.0 µF tantalum capacitor [Note 1] ESD 160 k 115 k 8 VCC2 9 DELAY_CAP VCC2, Positive Supply, Power Supply Input for non-VCC1 blocks same as pin 3 Bypass with a 0.1 µF close to the part and a 1.0 µF low ESR. DELAY_CAP, Reset Delay Cap Input Vref 9 Cdelay 500 nA ESD 10 Q1_B Q1_B, Input to Inverter and Complementary Input to OR Gate can tolerate high to VCC VCC2 500 nA 10* ESD * also pins 16 & 21 11 Q2 Q2, Input to OR Input can tolerate high to VCC VCC2 500 nA 1.0 M 11* ESD * also pins 13, 14, 17 & 18 NOTES: 1. All capacitors are assumed to be low ESR tantalum. De-rating factor on capacitance value is assumed to be -20% to 10% over all cases of tolerance and temperature. 2. Contact assignments are subject to change. 10 MC13181 Advance Information MOTOROLA Pin Function Descriptions Table 5. Pin Function Description (Continued) Pin Symbol/ Type 12 S_OR Description Equivalent Internal Circuit S_OR, OR Output Notes referenced to VCC2 12 13 3.0/3.3_EN 3.0/3.3_EN, LDO_3.0/ 3.3 Enable same as pin 11 high = enable 14 3.0/3.3_SEL 3.0/3.3_SEL, Input logic control for 3.0 or 3.3 V from LDO_3.0/3.3 same as pin 11 high = 3.0 V, low = 3.3 V 15 RESET_B RESET_B, Reset PushPull Output same as pin 6 referenced to VLDO_1.85 16 SHUTDOWN _B SHUTDOWN_B, Single Pin Master Disable same as pin 10 Low = IC Shutdown 17 2.65_EN 2.65_EN, LDO_2.65 Enable same as pin 11 high = enable 18 1.85_EN 1.85_EN, LDO_1.85 Enable same as pin 11 high = enable 19 VOUT1.85 VOUT1.85 Regulator, LDO_1.85, 1.85 V, 30 mA Output, VCC2 Vref 19 Cext 90 k ESD Bypass with low ESR 1.0 µF tantalum capacitor [Note 1] 200 k 20 AGND2 AGND2 Ground, Analog Ground Ground Tie to ground 21 HYSSEL HYSSEL, Input logic control for Comparator Hysteresis same as pin 10 Low = hysteresis enabled, High = hysteresis disabled 22 DETECT DETECT, Comparator Push-Pull Output same as pin 6 referenced to VLDO_1.85 NOTES: 1. All capacitors are assumed to be low ESR tantalum. De-rating factor on capacitance value is assumed to be -20% to 10% over all cases of tolerance and temperature. 2. Contact assignments are subject to change. MOTOROLA MC13181 Advance Information 11 Pin Function Descriptions Table 5. Pin Function Description (Continued) Pin Symbol/ Type 23 VIN- Description VIN-, Inverting Input to Comparator through divider string Equivalent Internal Circuit to VCC Typically, VIN- will be connected to VCC and VIN+ to the reference to detect low battery. 23 882 k 24 VIN+ VIN+, Non-inverting Input to Comparator Notes ESD en 717 k Hys. 17 k to ref 24 ESD NOTES: 1. All capacitors are assumed to be low ESR tantalum. De-rating factor on capacitance value is assumed to be -20% to 10% over all cases of tolerance and temperature. 2. Contact assignments are subject to change. 12 MC13181 Advance Information MOTOROLA Circuit Features 3 Circuit Features 3.1 Low Drop Out Regulators (LDO) All three regulators are designed for use with low-value, low-cost bypass capacitors. Low ESR tantalum capacitors are recommended (high performance ceramic capacitors with extremely low ESR, «1Ω, should be avoided at regulator outputs to ensure stability, see Table 4 (Electrical Characteristics) for allowable ESR range for each regulator). The output capacitors should be 1.0 µF minimum and should be mounted close to the IC. Better transient performance can be achieved with a larger output capacitor. In general turn-on and turn-off time will increase in proportion to the capacitor value. the regulators may not meet specified turn-on time with a larger capacitor. Table 6. LDO Regulators LDO Voltage (V) Current (mA) SEL Cout (µF) LDO_1.85 1.85 30 - 1.0 LDO_2.65 2.65 65 - 1.0 LDO_3.0/3.3 3.0 60 high 1.0 LDO_3.0/3.3 3.3 60 low 1.0 Additional filter capacitors should be placed across each VCC input. A 0.1 µF ceramic close to the IC and a 1.0 µF tantalum (placement is less critical) are recommended. All three regulators are designed for high Power Supply Rejection Ratio, low standby current, good line and load regulation, and fast turn on. The first regulator, LDO_1.85, supplies 1.85V. It is capable of a nominal output current of 30 mA. This regulator is ideal for powering low-voltage digital or baseband circuitry. The second regulator, LDO_2.65, supplies 2.65 V at up to 65 mA. This regulator is intended to supply power for RF/IF circuitry. This regulator is optimized for slightly better close-in PSRR performance, and derives its power from the VCC1 input pin. The input to the MC13180, which this LDC supplies current, requires at least 2.55 V. The additional voltage of LDO_2.65 allows for a series resistor, shunt capacitor filter into incorporate to further improve PSRR on that line. The resistor must be 0.220 Ω minimum, and the capacitor 1.0 to 2.2 µF. The maximum resistor value should be chosen so that maximum current will result in a voltage drop of 0.1 V or less. The third regulator, LDO_3.0/3.3, can be set to either 3.0 V out to 3.3 V out through a single select line. This output can source 60 mA. This regulator can be used to supply USB power or power an audio CODEC or some other peripheral as needed. If the input voltage drops below the overhead needed for regulation, the output of this regulator will track the input down to 2.7 V. The LDO_1.85 and LDO_3.0/3.3 regulators derive their power from the VCC2 input pin. This allows filtering to be tailored for the load circuitry, and to isolate the noisy digital (1.85 V) peripheral (3.0/3.3 V) from the RF (2.65 V) and reference of the IC. Each regulator has an independent, active-high enable line. This line can accept a “high” (to turn on the regulator) input of 1.5 V up to either VCC, and can be tied directly to VCC if the enable function is not to be used (shutdown will still function). If a given regulator is not needed in the application, the appropriate enable input can be tied low (<1.5 V) and the output capacitor eliminated. Care should be taken if the enable pin is to be driven from a processor powered by the corresponding regulator. MOTOROLA MC13181 Advance Information 13 Circuit Features 3.2 Reference Regulator The Reference Regulator supplies a precise 1.265 V for use by the other on-chip regulators. To maintain spectral purity on the LDO regulators, this internal reference is not intended for external loading. A pin is provided for an off-chip 0.47 µF capacitor for bypassing. The reference regulator derives its power from the VCC1 pin. Since the reference regulator supplies reference to the other regulators, power should not be applied to VCC2 if VCC1 is unpowered. 3.3 Shutdown The active-low shutdown input disables all regulators and logic. In the shutdown state, the total IC current consumption is 2.0 µA. Shutdown also disconnects the input resistor of the divider on the VIN- input to the comparator. As this would typically be connected to VCC for battery voltage detection. Shutting down MC13181 removes this approximately 5.0 µA current. Care should be taken if this pin is to be driven from a processor operating on a voltage supplied by MC13181. 3.4 Reset Circuit The RESET_B output goes high after a delay, based on the delay capacitor. It is initiated when VLDO_1.85 rises above the reset threshold of 1.70 V. When VLDO_1.85 falls below the reset threshold, RESET_B goes low with no delay. To calculate the value of the delay capacitor needed for a given delay, the formula C/I = dV/dT can be used. At the start of the delay, the capacitor is shorted nearly to 0 V, and then charged with a 500 nA current source until its voltage reaches the reference voltage, 1.265 V. T delay = C * V / I, simplifies to T delay (ms) ~= 2.53 x C (nF) or, C (nF) ~= T / 2.53 (T in ms) Note: The threshold voltage, resistance of the shorting FET and the current source will vary with temperature and VCC2, so the resulting delay will vary by 2:1 or more. 3.5 Comparator with Programmable Hysteresis The MC13181 includes a general purpose comparator. The IC's VIN- input incorporates internal resistors scaling (by a factor of approximately 0.44) the voltage to the minus input of the comparator. The IC's VIN+ input is directly connected to the plus input of the comparator. A typical application connects the VIN- input to VCC2 and VIN+ to the reference output for Under-Voltage Detection. The scaling resistors thereby set the threshold to 2.88 V with no additional components required. Hysteresis, of typically 30 mV, can be enabled or disabled via the HYSSEL pin (low is enable), allowing versatility for general purpose applications. The comparator may be used for general purpose applications, if the fixed divider ratio is accounted for. The inputs should not go lower than 1.0 V. The plus input should not exceed VCC2 - 1.0 V and the minus input should not exceed VCC2. The output of the comparator is push-pull, referenced to VLDO_1.85. 14 MC13181 Advance Information MOTOROLA Circuit Features 3.6 OR Gate & Inverter The IC incorporates a general purpose inverter and OR gate. The Q1_B input is the input to the inverter and one of the OR gate inputs. The S_INV output will be the logical inversion of the input. The S_OR output will be the logical OR of the inverse of Q1_B and Q2. Q2 has an internal pull-down. See Figure 3. A truth table of this function is shown in Table 7: Table 7. Inverter/OR Logic Truth Table Q1_B Q2 S_OR S_INV 0 0 1 1 0 1 1 1 1 0 0 0 1 1 1 0 1.85 V Q1_B S_INV VCC2 S_OR Q2 1.0 M Figure 3. Inverter/OR Logic Block Diagram Both inputs feature voltage robust level shifting and a Vih may range from 1.5 V through VCC2. The inverter output is referenced to VLDO_1.85. The OR gate output is referenced to VCC2. 3.7 Thermal Shutdown Internal thermal shutdown circuitry is provided to protect the IC and the system in the event that the maximum junction temperature is exceeded. When activated (typical threshold is set at 150°C), the three LDO regulators turn off until they are reactivated. This feature is provided to prevent failures from inadvertent overheating. Hysteresis allows stable thermal recovery. Care should be taken in design to ensure that regulator loading and ambient thermal conditions are managed to avoid excessive power dissipation and thermal shutdown in normal operation. PC board layout should include connection to exposed thermal pad on IC and ensure adequate heat dissipation. MOTOROLA MC13181 Advance Information 15 Packaging 4 Packaging PIN 1 INDEX AREA 0.1 C 2X 4 A M 0.1 C 0.1 C G 2X 1.0 0.8 4 1.00 0.75 0.05 C 6 (0.24) 0.05 0.00 (0.5) C SEATING PLANE DETAIL G M VIEW ROTATED 90° CLOCKWISE B DETAIL M PIN 1 IDENTIFIER 2.25 1.95 0.1 C A B 19 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. THE COMPLETE JEDEC DESIGNATOR FOR THIS PACKAGE IS: HF-PQFP-N. 4. CORNER CHAMFER MAY NOT BE PRESENT. DIMENSIONS OF OPTIONAL FEATURES ARE FOR REFERENCE ONLY. 5. CORNER LEADS CAN BE USED FOR THERMAL OR GROUND AND ARE TIED TO THE DIE ATTACH PAD. THESE LEADS ARE NOT INCLUDED IN THE LEAD COUNT. 6. COPLANARITY APPLIES TO LEADS, CORNER LEADS, AND DIE ATTACH PAD. 7. FOR ANVIL SINGULATED QFN PACKAGES, MAXIMUM DRAFT ANGLE IS 12°. EXPOSED DIE ATTACH PAD 24 0.25 1 18 2.25 1.95 0.1 C A B 13 6 N 12 24X 0.5 20X 7 0.5 0.3 24X VIEW M-M 0.30 0.18 0.1 0.05 M C A B M C (45°) (90°) DETAIL T (0.25) 2X 0.39 0.31 0.065 0.015 24X (1.227) 2X DETAIL N PREFERRED CORNER CONFIGURATION 0.1 0.0 DETAIL M DETAIL T PREFERRED PIN 1 BACKSIDE IDENTIFIER PREFERRED PIN 1 BACKSIDE IDENTIFIER 4 (45°) (90°) DETAIL S 0.60 0.24 2X (0.4) (0.18) 0.60 0.24 DETAIL N CORNER CONFIGURATION OPTION 4 0.39 0.31 0.1 MIN DETAIL M DETAIL S PIN 1 BACKSIDE IDENTIFIER OPTION PIN 1 BACKSIDE IDENTIFIER OPTION 5 Figure 4. Outline Dimensions for QFN-24 (Case 1307-01, Issue B) 16 MC13181 Advance Information MOTOROLA NOTES MOTOROLA MC13181 Advance Information 17 HOW TO REACH US: Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to USA/EUROPE/LOCATIONS NOT LISTED: design or fabricate any integrated circuits or integrated circuits based on the information in this Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217 1-303-675-2140 or 1-800-441-2447 document. JAPAN: for any particular purpose, nor does Motorola assume any liability arising out of the application or Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products use of any product or circuit, and specifically disclaims any and all liability, including without Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu Minato-ku, Tokyo 106-8573 Japan 81-3-3440-3569 limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 TECHNICAL INFORMATION CENTER: for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, 1-800-521-6274 HOME PAGE: http://www.motorola.com/semiconductors affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. The Bluetooth trademarks are owned by their proprietor and used by Motorola, Inc., under license. All other product or service names are the property of their respective owners. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. © Motorola, Inc. 2002 MC13181/D