SANYO LA75520K

Ordering number : ENA0648
Monolithic Linear IC
LA75520K
IF Signal Processing (VIF+SIF) IC
that Supports the PAL Video
Standard for TV Sets and VCRs
Overview
The LA75520K is a fully adjustment-free VIF + SIF signal processing IC for TV sets and VTRs that supports the PAL
video standard. It supports 38.0MHz, 38.9MHz, and 39.5MHz as the IF frequencies, as well as PAL sound multi-system
(M/N, B/G, I and D/K), and contains an on-chip sound carrier trap. The IC employs a 4MHz frequency (which can be
switched to 4.43MHz) as the reference frequency of the adjustment free circuit, and controls the VCO, AFT, and sound
filter using an external input signal.
Features
• Internal VCO adjustment free circuit eliminating the need for an external VCO coil.
• Internal sound carrier trap enables easy configuration of PAL sound multi-system at low cost.
• Considerably reduces the number of required peripheral parts.
• Use of digital AFT eliminates a problem of AFT tolerance.
• Package: DIP24S (300mil)
Functions
• VIF amplifier
• Adjustment-free VCO and PLL detector circuit
• Digital AFT circuit
• RF AGC
• Buzz canceller
• EQAMP
• Internal sound carrier trap
• First SIF detector circuit
• PLL-FM detector circuit
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
80807 MS PC 20070110-S00002 No.A0648-1/12
LA75520K
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Allowable power dissipation
Symbol
Conditions
Ratings
Unit
VCC
Pd max
6
Ta ≤ 70°C, Mounted on a substrate.*
700
V
mW
Operating temperature
Topr
-20 to +70
°C
Storage temperature
Tstg
-55 to +150
°C
* Mounted on a substrate : 76.1×114.3×1.6mm3, glass epoxy board.
Operating Conditions at Ta = 25°C
Parameter
Recommended supply voltage
Operating supply voltage
Symbol
Conditions
Ratings
VCC
VCC op
Unit
5.0
V
4.5 to 5.5
V
Electrical Characteristics at Ta = 25°C, VCC = 5.0V, fp = 38.9MHz
Parameter
Symbol
Conditions
Ratings
No.
min
typ
Unit
max
VIF block
Circuit current
I4
V1
75
85
95
mA
V
Max RF AGC voltage
V14H
V2
4.0
4.5
5.0
Min RF AGC voltage
V14L
V3
0.0
0.5
1.0
V
V4
26
32
38
dBμV
Input sensitivity
AGC range
Max allowable input
Quiescent video output voltage
Sync signal edge voltage
Vi
Video out 2
GR
V5
58
63
dB
Vi max
V6
95
100
dBμV
V5
V7
2.2
2.5
2.8
V
V5 tip
V8
0.8
1.0
1.2
V
VO
V9
1.0
1.2
1.4
Vp-p
Black noise threshold voltage
VBTH
V10
0.5
0.8
1.1
V
Black noise clamp voltage
VBCL
1.8
Video output level
V11
1.2
1.5
Video S/N
S/N
B/G
V12
46
50
dB
C-S best
IC-S
P/S = 10dB
V13
38
43
dB
Differential gain
DG
VIN = 80dBμ
Differential phase
DP
Quiescent AFT voltage
V12
V14
3
6.5
V15
3
5
V
%
deg
15pin to VCC
V16
2.0
2.5
3.0
V
Max AFT voltage
V12H
LOAD 22kΩ/22kΩ
V17
4
4.5
5
V
Min AFT voltage
V12L
LOAD 22kΩ/22kΩ
V18
0
0.5
1
AFT sensitivity
SF
LOAD 22kΩ/22kΩ
V19
8.5
12.5
16.5
APC pull-in range (U)
Fpu
V20
2.0
2.4
APC pull-in range (L)
Fpl
V21
VCO control sensitivity
β
V22
VIF input resistance
Ri
38.9MHz
V23
VIF input capacity
3
V
mV/kHz
MHz
-2.4
-2.0
MHz
6
12
kHz/mV
1.0
1.5
kΩ
3
6
Ci
38.9MHz
V24
N trap1 (4.5M)
NT1
wrt 1MHz
V25
-30
-35
dB
N trap2 (4.8M)
NT2
wrt 1MHz
V26
-19
-24
dB
BG trap1 (5.5M)
BT1
wrt 1MHz
V27
-27
-32
dB
BG trap2 (5.85M)
BT2
wrt 1MHz
V28
-20
-25
dB
I trap1 (6.0M)
IT1
wrt 1MHz
V29
-25
-30
dB
I trap2 (6.55M)
IT2
wrt 1MHz
V30
-15
-20
dB
DK trap1 (6.5M)
DT1
wrt 1MHz
V31
-25
-30
NGD1
wrt 1MHz
V32
30
80
145
ns
NGD1-1
wrt 1MHz
V33
110
200
290
ns
Group delay 1 NTSC (3.0M)
Group delay 1-1 NTSC (3.5M)
Group delay 2 BG (4M)
Group delay 2-1 BG (4.4M)
Group delay 3 I (4M)
pF
dB
BGD2
wrt 1MHz
V34
50
130
210
ns
BGD2-1
wrt 1MHz
V35
120
200
280
ns
IGD3
wrt 1MHz
V36
0
80
130
ns
Continued on next page.
No.A0648-2/12
LA75520K
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
No.
min
typ
Unit
max
Group delay 3-1 I (4.4M)
IGD3-1
wrt 1MHz
V37
80
120
160
ns
Group delay 4 DK (4M)
DGD4
wrt 1MHz
V38
10
30
50
ns
Group delay 4-1 DK (4.4M)
DGD4-1
wrt 1MHz
V39
30
60
90
ns
Video f characteristics MN1
VFMN1
M/N 1 to 2MHz
V40
-1.0
0.0
1.0
dB
Video f characteristics MN2
VFMN2
M/N 2 to 3MHz
V41
-1.0
0.0
1.0
dB
Video f characteristics MN3
VFMN3
M/N 3.58MHz
V42
-3.0
-1.5
0.0
dB
Video f characteristics BG1
VFBG1
B/G 1 to 3MHz
V43
-1.0
0.0
1.5
dB
Video f characteristics BG2
VFBG2
B/G 3 to 4MHz
V44
-1.5
0.0
1.5
dB
Video f characteristics BG3
VFBG3
B/G 4.43MHz
V45
-2.5
-1.0
0.5
dB
V46
-1.0
0.0
1.0
dB
Video f characteristics I1
VFI1
I 1 to 3MHz
Video f characteristics I2
VFI2
I 3 to 4MHz
V47
-1.0
0.0
1.5
dB
Video f characteristics I3
VFI3
I 4.43MHz
V48
-1.5
0.0
1.5
dB
V49
-1.0
0.0
1.0
dB
Video f characteristics DK1
VFDK1
D/K 1 to 3MHz
Video f characteristics DK2
VFDK2
D/K 3 to 4MHz
V50
-1.0
0.0
1.5
dB
Video f characteristics DK3
VFDK3
D/K 4.43MHz
V51
-1.5
0.0
1.5
dB
Group delay 2-2 BG shift (4M)
BGD2-2
wrt 1MHz
V52
50
100
150
ns
Group delay 2-3 BG shift (4.4M)
BGD2-3
wrt 1MHz
V53
110
180
250
ns
So1
Vi = 1mV
F1
21
43
86
mVrms
So2
Vi = 10mV
86
mVrms
1st SIF Block
SIF carrier output level 1
SIF carrier output level 2
1st SIF max input
Si max
F2
21
43
F3
110
120
dBμV
1st SIF input resistance
Ris
33.4MHz
F4
2
2.4
kΩ
1st SIF input capacity
Cis
33.4MHz
F5
3
6
pF
SIF Block
Limiting sensitivity (SPLIT)
Vi (lim) (SP)
P = 80dBμ CW
S1
20
25
30
dBμV
Limiting sensitivity (INTER)
Vi (lim) (IN)
P = 80dBμ P/S
S2
29
35
41
dB
FM detection output voltage
VO (FM)
f = 5.5MHz, ΔF = ±30kHz
730
mVrms
S3
390
560
AM removal ratio
AMR
S4
50
60
Distortion factor
THD
S5
FM detection output S/N
P = 80dBμ CW
S6
55
dB
0.8
%
60
dB
GD
S7
6
dB
PAL De-emphasis
Pdeem
S8
-3
dB
NT De-emphasis
Ndeem
S9
-3
dB
V7_9th
C1
PAL/NT audio voltage gain difference
S/N (FM)
0.3
Control Block
SIF system SW threshold voltage A/B
2.2
2.5
2.8
V
38MHz/38.9MHz threshold voltage
V10th1
C2
0.7
1.0
1.3
V
38.9MHz/39.5MHz threshold voltage
V10th2
C3
3.7
4.0
4.3
V
Inter-carrier system
V13th
C4
0.3
V
AFT mute level/SIF trap shift
V15th1
C5
0.7
1.0
1.3
V
V15th2
C6
2.2
2.5
2.8
V
V15th3
C7
3.7
4.0
4.3
V
95
dBμV
threshold voltage 1
AFT mute level/SIF trap shift
threshold voltage 2
AFT mute level/SIF trap shift
threshold voltage 3
Others
Ref clock input level
Reference frequency SW threshold
Reflev
R11
4.0MHz
O1
83
90
O2
150
270
kΩ
resistance
Continued on next page.
No.A0648-3/12
LA75520K
Package Dimensions
21.0
7.62
13
12
1
(3.25)
0.95
0.51min
3.3 3.9 max
0.9
0.25
6.4
24
(0.71)
1.78
0.48
SANYO : DIP24S(300mil)
Allowable power dissipation, Pd max – mW
unit : mm (typ)
3067B
Pd max -- Ta
1400
1200
1100
Specified board : 114.7×76.1×1.6mm3
glass epoxy
When mounted on a board
1000
800
600
400
200
0
– 20
0
20
40
60
70
80
Ambient temperature, Ta – °C
No.A0648-4/12
LA75520K
System changeover
a. SIF system SW
The SIF system can be changed over by setting A (pin 7) and B (pin 9) to GND and OPEN respectively.
A
B
GND
GND
GND
OPEN
OPEN
GND
OPEN
OPEN
BG
I
DK
MN
O
O
O
O
FM DET
LEVEL
De-emphasis
6dB
75μs
0dB
50μs
0dB
50μs
0dB
50μs
Note : Circles mean that the system indicated with a circle is selected
b. IF system SW
The IF frequency becomes 38.9MHz when pin 10 is open.
The IF frequency becomes 38.0MHz when pin 10 is set to GND.
The IF frequency becomes 39.5MHz when pin 10 is set to VCC.
c. Split/inter carrier SW
Inter-carrier is selected by setting the 1st SIF input (pin 13) to GND.
d. Reference frequency changeover SW
The reference frequency becomes 4.43MHz when pin 11 is OPEN.
The reference frequency becomes 4.0MHz when 270kΩ is connected between pin 11 and GND.
e. AFT mute level, trap point shift SW
By changing the pin 15 voltage, the potential and TRAP point at which AFT is muted can be set to either just or shift
(about +220kHz).
Pin 15 potential
AFT mute potential
VCC to 4V
MIDDLE (VCC/2)
TRAP point shift
Just
4V to 2.5V
MIDDLE (VCC/2)
Shift
2.5V to 1V
HI (VCC)
Just
1V to GND
HI (VCC)
Shift
* VCC=5V
f. FM detector function not used
To stop FM detection VCO without using the SIF circuit, short-circuit pin 1 – GND with resistance of 1kΩ or less.
No.A0648-5/12
LA75520K
Pin Assignment
DE-EMPHASIS C 1
24 AUDIO OUTPUT
SIF AGC FILTER 2
23 FILTER CONTROL C
FM PLL FILTER 3
22 AUDIO BIAS FILTER
21 SIF CARRIER OUTPUT
VCC 4
20 RF AGC VR
VIDEO OUTPUT 5
19 GND
EQ FILTER 6
LA75520K
SIF SYSTEM SW A 7
18 VIF IN1
17 VIF IN2
APC FILTER 8
16 VIF AGC FILTER
SIF SYSTEM SW B 9
VIF FREQUENCY SW 10
15 AFT MUTE LEVEL
REFERENCE CP INPUT 11
14 RF AGC OUTPUT
13 1st SIF INPUT
AFT OUTPUT 12
Top View
Block Diagram and Sample Application
VIF/SIF
INPUT
SOUND CARRIER
OUTPUT
RF AGC
OUTPUT
SW15
AUDIO
OUTPUT
SAWF(P)
23
SAWF
(S)
0.022μF
1μF
1μF
24
22
21
20
19
18
RF
AGC
17
16
15
14
13
IF
AGC
VIDEO
DET
COM
SW15
VCO
INT
OMD
FM
DET
PHASE
CTL
APC
9
SYSTEM SW
A
10
11
SW13
SYSTEM
OPEN
SPLIT
SHORT
INTER
0
V2
HI(VCC)
+250kHz
0
+250kHz
Pin7
Pin9
SIF SYSTEM
Hi
Hi
B/G
Hi
Lo
I
Lo
Hi
D/K
Lo
Lo
M
12
AFT OUTPUT
SW10
V3
V2
V1
SYSTEM SW
B
VIF FREQ.
270kΩ SW11
8
1000pF
7
0.47μF
6
51Ω
3.3kΩ 0.033μF
330pF
0.01μF
0.01μF
4.0MHz
MIDDLE(VCC/2)
EQ
AMP
VIDEO
OUTPUT
4.43MHz
SHORT
V3
MODE
CTRL
5
REFERENCE
ATF MUTE LEVEL B/G TRAP SHIFT
SW
SIF
AMP
4
SW11
OPEN
V1
AFT
TRAP
3
38.0MHz
V4
AMP
2
38.9MHz
V1
AGC
SPLI
1
39.5MHz
V2
V2
V1
1 stSIF
AMP
TRAP
AGC
VIF FREQUENCY
V3
V3
SW13
VIF
AMP
DEEMP
AMP
SW10
V4
VCC(5V)
4.43/4MHz
PCA01178
No.A0648-6/12
LA75520K
Input Impedance Test Circuit (VIF and first SIF input impedance)
Impedance analyzer
24
23
22
21
20
19
18
0.01μF
0.01μF
0.01μF
1st SIF IN
0.01μF
0.01μF
0.01μF
0.01μF
0.01μF
0.01μF
0.01μF
0.01μF
VIF IN
17
16
15
14
13
8
9
10
11
12
22kΩ
22kΩ
100μF
VCC
0.01μF
0.01μF
0.01μF
0.01μF
7
0.01μF
6
0.01μF
5
0.01μF
4
1kΩ
3
0.01μF
2
0.01μF
0.01μF
1
0.01μF
LA75520K
No.A0648-7/12
LA75520K
Pin Functions
Pin No.
1
Pin name
DE-EMPHASIS C
Function
Equivalent Circuit
De-emphasis capacitor connection pin
This is used to switch the equivalent resistance
(5kΩ or 7.5kΩ) internally in the IC to select the time
constant.
4kΩ
1
This switching is linked to the SIF input switch.
To disable de-emphasis, disconnect the capacitor.
0.01μF
Connection of an external capacitance of 0.01μF
enables switching between 50 and 75μs.
When the FM detector circuit is not to be used, the
FM VCO can be stopped by connecting it to ground
with a resistor of 1kΩ or less.
2
SIF AGC FILTER
AGC filter pin for SIF carrier
0.01μF is recommended for C1.
2kΩ
2
C1
3
FM PLL FILTER
PLL filter pin of FM detector
This is used to configure an external lag lead filter.
Example: Connect 330pF in parallel with the filter on
the left (0.033μF + 3.3kΩ).
8kΩ
3
0.033μF
330pF
3.3kΩ
3
4
VCC
Power supply
5
EQ OUT
Equalizer circuit. This circuit is used to correct the
6
EQ FILTER
video signal frequency characteristics.
Notes on equalizer amplifier design
• The equalizer amplifier is designed as a voltage
follower amplifier with a gain of about 0 dB. When
used for frequency characteristics correction, a
2kΩ
R1:1kΩ
5
capacitor, inductor, and resistor must be
connected in series between pin 6 and ground.
R1
Equalizer amplifier gain AV = Z + 1
R1 is the IC internal resistance, and is 1kΩ. In the
application design, simply select Z to correspond
to the desired characteristics. However, since the
EQ amplifier gain will be maximum at the resonant
point defined by Z, care is required to assure that
distortion does not occur.
6
C
L
Z
R
Continued on next page.
No.A0648-8/12
LA75520K
Continued from preceding page.
Equivalent Circuit
6dB.
8
APC FILTER
Pin7
Pin9
MODE
H
H
B/G
H
L
I
L
H
D/K
L
L
M/N
7
9
80kΩ 1kΩ
The truth-values are as follows.
30kΩ
The internal trap is also linked to these switches.
50kΩ
In M/N mode, the audio output level is increased by
1kΩ
settings of these two pins supports four systems.
50kΩ
9
Function
SIF system selection switch pins. Combining the
1kΩ
SIF SYSTEM SW A
80kΩ 1kΩ
Pin name
7
30kΩ
Pin No.
PLL APC filter connection pin. The APC count is
switched internally in the IC.
The VCO is normally controlled by route A.
from
APC
When unlocked and during weak field reception, the
VCO is controlled by route B and the loop gain is
increased.
For this APC filter we recommend a resistor of 51Ω
A
DET
1kΩ
1kΩ
and capacitor of 0.47μF.
The buzz characteristics can be improved by
connecting a capacitor of 100pF or so between pins
B
5 and 8.
8
VIF FREQUENCY
Switch pin for selecting the IF frequency
SW
When this pin is open, 1/2VCC exists.
50kΩ
VCC : 39.5MHz
Open : 38.9MHz
11kΩ
50kΩ
GND : 38.0MHz
11
10
REFERENCE CP
Reference signal input pin necessary for adjusting
INPUT
the internal sound carrier trap, AFT, etc.
Either 4.0 or 4.43 MHz can be selected. Use the
configuration shown in example 1 when using
4.43MHz and configuration shown in example 2
when using 4.0MHz.
Since no oscillator can be configured simply by
connecting the X’tal resonator to pin 11, input the
reference signal from an external source without
200kΩ
10
fail.
Example 1
Example 2
11
1000pF
4.43MHz
11
1000pF
270kΩ
11
4.0MHz
Continued on next page.
No.A0648-9/12
LA75520K
Continued from preceding page.
Pin No.
12
Pin name
AFT OUTPUT
Function
Equivalent Circuit
AFT output pin. The AFT center voltage is
generated by an external bleeder resistor. The AFT
gain is increased by increasing the resistance of this
external bleeder resistor.
R
500Ω
For the resistor we recommend a resistance equal
to or greater than 22kΩ.
For the filter C1 we recommend a capacitance of
12
500Ω
0.1μF.
R
13
1st SIF INPUT
C1
First SIF input pin. A DC cut capacitor must be used
in the input circuit.
(a) If a SAW filter is used :
The first SIF sensitivity can be increased by
inserting an inductor between the SAW filter and the
2kΩ
IC to neutralize the SAW filter output capacitance
and the IC input capacitance.
(b) When used in an intercarrier system :
13
Connect this pin to ground.
14
RF AGC OUTPUT
RF AGC output pin. This output controls the tuner
VCC
RF AGC.
This is the open collector output and a protective
200Ω resistor is inserted. Determine the external
200Ω
14
bleeder resistor value in accordance with the
specifications of the tuner.
15
AFT MUTE LEVEL
A switch pin for selecting the mute potential when
muting is applied to the AFT due to PLL unlock, etc.
At the same time, it is used to control the trap point
shift of the audio trap (in the B/G mode). When the
frequency characteristics of the video band are to
be made as flat as possible with the split input, the
trap can be shifted to the high range although the
attenuation of the sound carrier will drop. Therefore,
when used in combination with the SAW filter, verify
that the level is high enough before use.
Voltage
ATF MUTE
TRAP SHIFT
66kΩ
15
34kΩ
Voltage
VCC to 4V
VCC/2
0
4V to 2.5V
VCC/2
+250kHz
2.5V to 1V
VCC
0
1V to GND
VCC
+250kHz
* When VCC = 5 V
Continued on next page.
No.A0648-10/12
LA75520K
Continued from preceding page.
Pin No.
16
Pin name
IF AGC
Function
Equivalent Circuit
IF AGC filter connection pin.
The signal peak-detected by the built-in AGC
5kΩ
detector is converted to the AGC voltage at pin 16.
Additionally, a second AGC filter (a lag-lead filter)
used to create the dual time constants is provided
1kΩ
internally in the IC.
Use a 0.022μF capacitor as the external capacitor
(C1), and adjust the value according to the sag,
AGC speed, and other characteristics.
1kΩ
16
C1
17
VIF IN2
VIF amplifier input pin
18
VIF IN1
The input circuit is a balanced circuit, and the input
1kΩ
R ≈ 1.0kΩ
1kΩ
impedance is as follows:
17
18
19
GND
20
RF AGC VR
RF AGC volume connection pin
This pin sets the tuner RF AGC operating point.
Also, the FM output and the video output can both
be muted at the same time by connecting this pin to
1kΩ
1kΩ
ground.
20
21
SIF CARRIER OUT
First SIF output pin
This is an emitter-follower output with a 200Ω
resistor attached in series.
200Ω
22
AUDIO BIAS
Connection pin for a filter used to hold the FM
FILTER
detector output DC voltage fixed. Normally, a 1μF
21
300Ω 40kΩ
300Ω
electrolytic capacitor should be used. The
40kΩ
capacitance (CI) should be increased if the low
band (around 50Hz) frequency characteristics need
to be improved.
22
+
C1
Continued on next page.
No.A0648-11/12
LA75520K
Continued from preceding page.
Pin No.
Pin name
23
FILTER CONTROL
Internal filter (trap) control pin
Function
C
Connect a capacitor with a capacitance between
Equivalent Circuit
0.47 to 1μF, depending on the video S/N as well as
the levels of the AM and PM noise.
23
24
AUDIO OUTPUT
Sound output pin
Emitter follower output
24
1kΩ
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of August, 2007. Specifications and information herein are subject
to change without notice.
PS No.A0648-12/12