SEMTECH SC1458AEVB

SC1458
Dual Output Low Noise LDO
Linear Regulator
POWER MANAGEMENT
Features
Description
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The SC1458 is a family of dual output, ultra-low dropout
linear voltage regulators designed for use in battery
powered wireless applications. Both versions of the
SC1458 require an input voltage level between 2.5V and
5.5V. The SC1458A supplies 2.5V on OUTA and 1.8V on
OUTB, while SC1458B supplies 2.85V on both outputs.
(For other voltage options see the SC560).
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Input voltage range — 2.5 to 5.5V
Output voltages — 2.8V and 1.8V (SC1458A), 2.85V
and 2.85V (SC1458B)
Maximum output current — 300mA (each LDO)
Low 200mV maximum dropout at 200mA load
Quiescent current — 100μA (both LDOs enabled)
Shutdown current — 100nA
Output noise < 50μVRMS (SC1458B)
PSRR > 65dB at 1kHz (SC1458B)
Space saving package — MLPD-W6, 3mm x 3mm
Over-temperature protection
Short-circuit protection
Under-voltage lockout
Reset monitor for output A (SC1458A)
Applications
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The SC1458A provides a PGOOD output to hold a processor
in reset when the voltage on OUTA is not in regulation.
The SC1458B provides superior low-noise performance by
using an external bypass capacitor to filter the bandgap
reference. Both versions have a single enable pin that
controls both LDO outputs. The startup sequence delays
the start of OUTB by 128μs after OUTA is enabled.
Each version also provides protection circuitry such as
current limiting, under-voltage lockout, and thermal
protection to prevent device failures. Stability is
maintained by using 1μF capacitors on the output pins.
The MLPD package and 0402 ceramic capacitors minimize
the required PCB area.
PDAs and cellular phones
GPS devices
Palmtop computers and handheld instruments
TFT/LCD applications
Wireless handsets
Digital cordless phones and PCS phones
Personal communicators
Two-way pagers
Wireless LAN
Typical Application Circuit
SC1458A
VIN
VIN
From μP
September 12, 2007
To μP
PGOOD
EN
OUTA
OUTA
2.5V, 300mA
GND
OUTB
OUTB
1.8V, 300mA
CIN
COUTA
COUTB
2.2μF
1μF
1μF
1
SC1458
Pin Configuration
1
Ordering Information
TOP
VIEW
2
3
6
5
T
Device
Package
SC1458AWLTRT(1)(2)
MLPD-W6 3x3
SC1458BWLTRT(1)(2)
MLPD-W6 3x3
SC1458AEVB
Evaluation Board
SC1458BEVB
Evaluation Board
Notes:
(1) Available in tape and reel only. A reel contains 3,000 devices.
(2) Available in lead-free package only. Device is WEEE and RoHS
compliant.
4
MLPD-W6; 3x3, 6 LEAD
θJA = 50°C/W
Marking Information
BROn
yyww
xxxx
Voltage Options
Device
Marking ID
VLDOA
VLDOB
SC1458A
BROA
2.5V
1.8V
SC1458B
BROB
2.85V
2.85V
BROn = See Voltage Options Table for Details
yyww = Datecode
xxxx = Semtech Lot Number
2
SC1458
Absolute Maximum Ratings
Recommended Operating Conditions
VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.5
Ambient Temperature Range (°C) . . . . . . . . -40 < TA < +85
VEN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)
VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 < VIN < 5.5
VPGOOD (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (VIN + 0.3)
Pin Voltage — All Other Pins (V) . . . . . . . . . -0.3 to (VIN + 0.3)
VOUTA, VOUTB, Short Circuit Duration . . . . . . . . . .Continuous
Thermal Information
ESD Protection Level(1) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal Resistance, Junction to Ambient(2) (°C/W) . . . . 50
Maximum Junction Temperature (°C) . . . . . . . . . . . . . . +150
Storage Temperature Range (°C) . . . . . . . . . . . . -65 to +150
Peak IR Reflow Temperature (10s to 30s) (°C) . . . . . . . +260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES:
(1) Tested according to JEDEC standard JESD22-A114-B.
(2) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Electrical Characteristics
Unless otherwise noted VIN = 3.6V, CIN = 2.2μF, COUTA = COUTB = 1μF, VEN = VIN, TA = -40 to +85°C. Typical values are at TA = 25°C. All specifications
apply to both LDOs unless otherwise noted.
Parameter
Input Supply Voltage Range
Symbol
Conditions
VIN
Typ
Max
Units
2.5
5.5
V
-3
3
%
Output Voltage Accuracy
ΔVOUT
Maximum Output Current
IMAX
Dropout Voltage(1)
VD
IOUT = 200mA, VOUT = 2.5V
100
200
mV
Shutdown Current
ISD
TA = 25°C
0.1
1
μA
Quiescent Current
IQ
IOUTA = IOUTB = 0mA, TA = 25°C
100
Load Regulation
VLOAD
IOUT = 1mA to IMAX
Line Regulation
VLINE
IOUT = 1mA
Current Limit
ILIM
Noise(2)
eN
VIN = VOUT + 0.3V to 5.5V, IOUT = 0 to 300mA
Min
300
mA
μA
20
mV
-6
6
mV
350
850
mA
VIN = 3.7V, IOUT = 50mA , 10Hz < f < 100kHz,
CBYP = 22nF
50
μVRMS
VIN = 3.7V, IOUT = 50mA , 10Hz < f < 100kHz
300
μVRMS
3
SC1458
Electrical Characteristics (continued)
Parameter
Power Supply Rejection Ratio(2)
PGOOD Delay(3)
PGOOD Threshold(3)
Symbol
Conditions
65
PSRR
VIN = 3.7V, IOUT = 50mA, f = 1kHz,
CBYP = 22nF
VIN = 3.7V, IOUT = 50mA, f = 1kHz
40
tPGOOD
Min
Typ
Max
Units
dB
160
200
240
ms
82
87
92
%
V TH(PGOOD)
VOUT(LDOA) falling
tSU
From OFF to 87% VOUT, IOUT = 50mA,
CBYP = 22nF
1
ms
Power Up Delay Between LDOA
and LDOB
tDELAY
Delay between 0.87VOUTA and VOUTB start-up
128
μs
Under Voltage Lockout
VUVLO
VIN Rising
Start-Up Time
UVLO Hysteresis
Over Temperature Protection
Threshold
Over Temperature
Hysteresis
2.15
VUVLO-HYS
TOT
Rising threshold
TOT-HYS
2.25
2.35
V
100
mV
160
°C
20
°C
Digital Inputs
Logic Input High Threshold
VIH
VIN = 5.5V
1.25
V
Logic Input Low Threshold
VIL
VIN = 2.5V
0.4
V
Logic Input High Current
IIH
VIN = 5.5V
1
μA
Logic Input Low Current
IIL
VIN = 5.5V
1
μA
VOL
ISINK = 500μA, VIN = 3.7V
20
mV
Digital Outputs
PGOOD Output Voltage Low
7
Notes:
(1) Dropout voltage is defined as VIN - VOUT, when VOUT is 100 mV below the value of VOUT for VIN = VOUT +0.5V.
(2) SC1458B only
(3) SC1458A only
4
SC1458
Typical Characteristics
Load Regulation LDOA
4
Load Regulation LDOB
VOUTA = 2.5V, VIN = 3.6V
4
3.5
Output Voltage Variation (mV)
Output Voltage Variation (mV)
3.5
3
TA=85°C
2.5
2
TA=25°C
1.5
TA=-40°C
1
3
TA=85°C
2.5
2
TA=25°C
1.5
TA=-40°C
1
0.5
0.5
0
VOUTB = 2.85V, VIN = 3.6V
0
0
50
100
150
Output Current (mA)
200
250
0
50
100
Line Regulation LDOA
1
VOUTA = 2.5V, IOUTA = 1mA
1.2
250
VOUTB = 2.85V, IOUTB = 1mA
1
0.8
Output Voltage Variation (mV)
0.6
0.4
0.2
0
-0.2
TA=-40°C
-0.4
TA=25°C
-0.6
TA=85°C
-0.8
-1
2.7 2.9
3.1
3.3
3.5 3.7
0.6
0.4
0.2
TA=-40°C
0
TA=25°C
-0.2
-0.4
-0.6
TA=85°C
-0.8
3.9 4.1 4.3 4.5 4.7
Input Voltage (V)
4.9
5.1 5.3
-1
2.7
5.5
2.9
3.1
Dropout Voltage LDOA
3.3
3.5
3.7 3.9 4.1 4.3 4.5
Input Voltage (V)
4.7
4.9 5.1 5.3
5.5
Dropout Voltage LDOB
VOUTA = 2.5V, IOUTA = 200mA
300
VOUTB = 2.85V, IOUTB = 200mA
250
250
T=85°C
TA=85°C
200
150
TA=25°C
VIN - VOUT (mV)
VIN - VOUTA (mV)
Output Voltage Variation (mV)
200
Line Regulation LDOB
0.8
300
150
Output Current (mA)
TA=-40°C
100
150
T=25°C
T=-40°C
100
50
50
0
2.2
200
2.25
2.3
2.35
2.4
2.45
2.5
2.55
Input Voltage (V)
2.6
2.65
2.7
2.75
2.8
0
2.2
2.25
2.3
2.35
2.4
2.45
2.5
2.55
2.6
2.65
2.7
2.75
2.8
Input Voltage (V)
5
SC1458
Typical Characteristics (continued)
PSRR vs. Frequency
0
-10
-10
-20
-20
-30
-40
-30
-40
-50
-50
-60
-60
-70
10
VOUT = 2.85V, IO = 50mA, CBYP=22nF
0
PSRR (dB)
PSRR (dB)
PSRR vs. Frequency
VOUT = 2.5V, IOUT = 50mA
100
1000
10000
-70
10
100
Output Noise vs. Load Current
350
TA=85°C
300
TA=25°C
90
VOUTB = 2.85V, IO = 50mA, CBYP=22nF
80
TA=-40°C
250
10000
Output Noise vs. Load Current
VOUT = 2.5V, VIN = 3.6V, no CBYP
Output Voltage Noise (uV)
Output Voltage Noise (uV)
400
1000
Frequency (Hz)
Frequency (Hz)
200
150
100
T=85°C
70
T=25°C
60
50
T=-40°C
40
30
20
50
10
0
0
50
100
150
200
250
0
0
50
Load Transient Response (Rising Edge)
100
150
200
250
Output Current (mA)
Output Current (mA)
Load Transient Response (Falling Edge)
VOUT = 2.5V, VIN = 3.6V
VOUT = 2.5V, VIN = 3.6V
(0.1A/div)
(0.1A/div)
(20mV/div)
(20mV/div)
Time (1ms/div)
Time (1ms/div)
6
SC1458
Pin Descriptions
Pin #
Pin Name
Pin Function
SC1458A
SC1458B
1
1
OUTB
2
2
VIN
3
3
OUTA
Output for LDOA
4
4
GND
Analog and digital ground
5
5
EN
6
T
PGOOD
6
BYP
T
Thermal
Pad
Output for LDOB
Input supply voltage terminal
Logic Input — active high enables the SC1458.
Open drain logic output — monitors output of LDOA, switches low when the output drops out
of regulation.
LDO bypass output — bypass with a 22nF capacitor.
Pad is for heatsinking purposes — not connected internally. Connect exposed pad to ground
using multiple vias.
7
SC1458
Block Diagram
VIN
2
Power On
And
Control
Logic
5
EN
6
BYP or
PGOOD
3
OUTA
1
OUTB
Bandgap SC1458B
Reference
SC1458A
ENA
LDOA
ENB
GND
4
LDOB
8
SC1458
Applications Information
General Description
Active Shutdown
The SC1458 is a dual output linear regulator intended
for applications where low dropout voltage, low supply
current, and low output noise are critical. The device
provides a very simple, low cost solution for two separate
regulated outputs using very little PCB area due to its
small package size and the need for only three external
capacitors.
The SC1458 has internal active shutdown circuitry
included for both LDOs. Shutdown behavior is controlled
by discharging the output capacitor on the LDO output
by an on-chip FET when the LDO is disabled.
Protection Circuitry
Both linear regulators are powered from a single input
voltage supply rail, and each provides 300mA of output
current. Output voltages are set internally, eliminating the
need for external resistors.
The device provides the following protection features to
ensure that no damage is incurred in the event of a fault
condition.
Under-Voltage Lockout
Over-Temperature Protection
Short-Circuit Protection
An active high enable pin (EN) controls operation of both
regulators. Pulling this pin low causes the device to enter a
very low power shutdown mode, where it typically draws
100nA from the input supply.
Under-Voltage Lockout
The Under-Voltage LockOut (UVLO) circuit protects the
device from operating in an unknown state if the input
voltage supply is too low.
The device is available in two versions: SC1458A and
SC1458B. The SC1458A version has pin 6 configured as a
power good signal (PGOOD), which monitors the output
of LDOA. The SC1458B device has pin 6 configured as an
external bypass pin (BYP). This is suitable for applications
which require low output noise and excellent PSRR
characteristics.
When the VIN drops below the UVLO threshold, the
LDOs are disabled and discharged — PGOOD is held
low (SC1458A only). When VIN is increased above the
hysteresis level, the LDOs are enabled into their previous
states (timing described in Figure 1), provided EN has
remained high. When powering-up with VIN below the
UVLO threshold, the LDOs will remain off and PGOOD
will be held low (SC1458A only).
•
•
•
Power-On Control
When EN transitions high, the output of LDOA is enabled.
After a delay of 128μs, the output of LDOB is enabled.
In the case of the SC1458A, when the output voltage of
LDOA reaches 87% of its regulation point, the delay timer
starts and the PGOOD signal transitions high after a delay
of 200ms. The power up/down sequence is shown in
Figure 1.
EN
87%
OUTA
200 ms
PGOOD
128μs
OUTB
Figure 1 — Timing Diagram
87%
Over-Temperature Protection
An internal over-temperature (OT) protection circuit is
provided that monitors the internal junction temperature.
When the temperature exceeds the OT threshold as
defined in the Electrical Characteristics section, the OT
protection disables all the LDO outputs and holds the
PGOOD signal low. When the junction temperature drops
below the hysteresis level, the LDOs are re-enabled into
their previous states and PGOOD is set high, provided EN
has remained high (SC1458A only).
Short-Circuit Protection
Each LDO output has short-circuit protection. If the
output current exceeds the current limit, the output
voltage will drop and the output current will be limited
until the short is removed. If a short-circuit occurs on the
output of LDOA, the output of LDOB will also be disabled
9
SC1458
Applications Information (continued)
1.8
Component Selection
A capacitance of 1μF or larger on each output is
recommended to ensure stability. Ceramic capacitors
of type X5R or X7R should be used because of their
low ESR and stable temperature coefficients. It is also
recommended that the input be bypassed with a 2.2μF,
low ESR X5R or X7R capacitor to minimize noise and
improve transient response. Note: Tantalum and Y5V
capacitors are not recommended.
A bypass capacitor (minimum of 22nF) should be
connected between the BYP and GND pins to meet all
noise-sensitive requirements. Increasing the capacitance
to 100nF will further improve PSRR and output noise
(SC1458B only).
Thermal Considerations
Although each of the two LDOs in the SC1458 can
provide 300mA of output current, the maximum power
dissipation in the device is restricted by the miniature
package size. The graphs in Figure 2 and Figure 3 can
be used as a guideline to determine whether the input
voltage, output voltages, output currents, and ambient
temperature of the system result in power dissipation
within the operating limits or if further thermal relief is
required.
1.5
TJ(Max)=150°C
1.2
TJ(Max)=125°C
0.9
0.6
0.3
0
-40
-20
0
20
40
60
80
100
Ambient Temperature (oC)
Figure 3 — Maximum PD vs. TA
The following procedure can be followed to determine if
the thermal design of the system is adequate. The junction
temperature of the SC1458 can be determined in known
operating conditions using the following equation:
TJ = TA +(PD x θJA)
where
TJ = Junction Temperature (°C)
TA = Ambient Temperature (°C)
PD = Power Dissipation (W)
θJA = Thermal Resistance Junction to Ambient (°C/W)
Example
An SC1458A is used to provide outputs of 2.5V, 150mA
from LDOA and 1.8V, 200mA from LDOB. The input
voltage is 4.2V, and the ambient temperature of the
system is 60°C.
0.5
PD= 0.15(4.2 – 2.5) + 0.2(4.2 – 1.8)
= 0.74W
0.4
0.3
0.2
0.1
______
TA=+25°C, PD(MAX)= 1.9W
- - - - TA=+85°C, PD(MAX)= 1.0W
0
3
3.5
4
4.5
Input Voltage (V)
and
Maximum Recommended
Input Voltage
Maximum Total Output Current (A)
0.6
Maximum Power Dissipation (W)
until the fault is removed and the load current returns to
a specified level.
5
5.5
Figure 2 — Safe Operating Limit
TJ = 60 + (0.74 x 50) = 97°C
6
Figure 3 shows that the power dissipation is within limits
at TA = 60°C and calculation of TJ shows that it is within the
specified limit of 150°C.
This means that operation of the SC1458 under these
conditions is within the specified limits and the device
would not require further thermal relief measures.
10
SC1458
Applications Information (continued)
PCB Layout Considerations
•
While layout for linear devices is generally not as critical
as for a switching application, careful attention to detail
will ensure reliable operation.
•
•
•
Connect all ground connections directly to the
ground plane whenever possible to minimize
ground potential differences on the PCB.
Ensure that the feedback resistors are placed as
close as possible to the feedback pins.
Attach the part to a large copper footprint,
particularly the thermal pad on the underside
of the device, to enable better heat transfer,
particularly on PCBs where there are
internal power and ground planes.
Place the input, output, and bypass capacitors
close to the device for optimal transient
response and device behavior.
COUTB
CIN
SC1458B
CBYP
COUTA
11
SC1458
Outline Drawing — MLPD-W6 3x3
A
D
B
DIM
A
A1
A2
b
D
E
D1
E1
e
L
N
aaa
bbb
E
PIN 1
INDICATOR
(LASER MARK)
A
aaa C
SEATING
PLANE
C
A2
A1
DIMENSIONS
INCHES
MILLIMETERS
MIN NOM MAX MIN NOM MAX
.028 .030 .031 0.70 0.75 0.80
.000 .001 .002 0.00 0.02 0.05
(0.20)
(.008)
.012 .016 .018 0.30 0.40 0.45
.114 .118 .122 2.90 3.00 3.10
.114 .118 .122 2.90 3.00 3.10
.087 .091 .094 2.20 2.30 2.40
.055 .059 .063 1.40 1.50 1.60
.037 BSC
0.95 BSC
.012 .014 .016 0.30 0.35 0.40
6
6
.003
0.08
.004
0.10
D1
1
2
LxN
E/2
E1
N
bxN
e
bbb
C A B
D/2
NOTES:
1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2.
COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS TERMINALS.
3.
REFERENCE JEDEC STANDARD VARIATION WEEA-2.
12
SC1458
Land Pattern — MLPD-W6 3x3
DIMENSIONS
H
(C)
G
K
Y
X
P
Z
DIM
INCHES
MILLIMETERS
C
(.116)
(2.95)
G
.087
2.20
H
.094
2.40
K
.063
1.60
0.95
P
.037
R
.009
0.225
X
.018
0.45
Y
.030
0.75
Z
.146
3.70
NOTES:
1.
CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES).
2.
THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY.
CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR
COMPANY'S MANUFACTURING GUIDELINES ARE MET.
3.
THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD
SHALL BE CONNECTED TO A SYSTEM GROUND PLANE.
FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR
FUNCTIONAL PERFORMANCE OF THE DEVICE.
Contact Information
Semtech Corporation
Power Mangement Products Division
200 Flynn Road, Camarillo, CA 93012
Phone: (805) 498-2111 Fax: (805) 498-3804
www.semtech.com
13