MICROCHIP 24LC64

24AA64/24LC64
64K I2C™ Serial EEPROM
Device Selection Table
Description
Part
Number
VCC
Range
Max Clock
Frequency
Temp
Ranges
24AA64
1.8-5.5
400 kHz(1)
I
24LC64
2.5-5.5
400 kHz
I, E
Note 1: 100 kHz for VCC <2.5V
Features
Package Types
PDIP/SOIC/TSSOP
/MSOP
A2 3
Vss 4
ROTATED TSSOP
(24AA64X/24LC64X)
8 Vcc
WP
7 WP Vcc
6 SCL A0
5 SDA A1
1
2
3
4
24XX64X
A0 1
A1 2
24XX64
• Single supply with operation down to 1.8V
• Low-power CMOS technology
- 1 mA active current typical
- 1 µA standby current (max.) (I-temp)
• Organized as 8 blocks of 8K bit (64K bit)
• 2-wire serial interface bus, I2C™ compatible
• Cascadable for up to eight devices
• Schmitt Trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
• 100 kHz (24AA64) and 400 kHz (24LC64)
compatibility
• Self-timed write cycle (including auto-erase)
• Page write buffer for up to 32 bytes
• 2 ms typical write cycle time for page write
• Hardware write-protect for entire memory
• Can be operated as a serial ROM
• Factory programming (QTP) available
• ESD protection > 4,000V
• 1,000,000 erase/write cycles
• Data retention > 200 years
• 8-lead PDIP, SOIC, TSSOP and MSOP packages
• Standard and Pb-free finishes available
• Available temperature ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C
The Microchip Technology Inc. 24AA64/24LC64
(24XX64*) is a 64 Kbit Electrically Erasable PROM.
The device is organized as eight blocks of 1K x 8-bit
memory with a 2-wire serial interface. Low-voltage
design permits operation down to 1.8V, with standby
and active currents of only 1 µA and 1 mA,
respectively. It has been developed for advanced, lowpower applications such as personal communications
or data acquisition. The 24XX64 also has a page write
capability for up to 32 bytes of data. Functional address
lines allow up to eight devices on the same bus, for up
to 512 Kbits address space. The 24XX64 is available in
the standard 8-pin PDIP, surface mount SOIC, TSSOP
and MSOP packages.
8
7
6
5
SCL
SDA
Vss
A2
Block Diagram
HV
Generator
WP
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page
Latches
I/O
SCL
YDEC
SDA
VCC
VSS
Sense Amp.
R/W Control
* 24XX64 is used in this document as a generic part number for the 24AA64/24LC64 devices.
 2003 Microchip Technology Inc.
DS21189H-page 1
24AA64/24LC64
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings (†)
VCC .............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-65°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
DC CHARACTERISTICS
Param.
No.
Sym
VCC = +1.8V to +5.5V
Industrial (I):
TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Characteristic
Min
Typ
Max
Units
Conditions
D1
VIH
WP, SCL and SDA pins
—
—
—
—
—
D2
—
High-level input voltage
0.7 VCC
—
—
V
—
D3
VIL
Low-level input voltage
D4
VHYS
Hysteresis of Schmitt
Trigger inputs
D5
VOL
D6
D7
—
—
0.3 VCC
V
—
0.05 VCC
—
—
V
(Note 1)
Low-level output voltage
—
—
0.40
V
IOL = 3.0 mA, VCC = 2.5V
ILI
Input leakage current
—
—
±1
µA
VIN = .1V to VCC
ILO
Output leakage current
—
—
±1
µA
VOUT = .1V to VCC
D8
CIN,
COUT
Pin capacitance
(all inputs/outputs)
—
—
10
pF
VCC = 5.0V (Note 1)
TA = 25°C, FCLK = 1 MHz
D9
ICC write Operating current
—
0.1
3
mA
VCC = 5.5V, SCL = 400 kHz
—
0.05
1
mA
—
—
—
.01
—
1
5
µA
µA
Industrial
Automotive
SDA = SCL = VCC
WP = VSS
D10
ICC read
D11
ICCS
Note 1:
2:
Standby current
This parameter is periodically sampled and not 100% tested.
Typical measurements taken at room temperature.
DS21189H-page 2
 2003 Microchip Technology Inc.
24AA64/24LC64
TABLE 1-2:
AC CHARACTERISTICS
VCC = +1.8V to +5.5V
Industrial (I):
TA = -40°C to +85°C
Automotive (E):
TA = -40°C to +125°C
AC CHARACTERISTICS
Param.
No.
Sym
Characteristic
Min
Max
Units
Conditions
1
FCLK
Clock frequency
—
—
400
100
kHz
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
2
THIGH
Clock high time
600
4000
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
3
TLOW
Clock low time
1300
4700
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
4
TR
SDA and SCL rise time
(Note 1)
—
—
300
1000
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
5
TF
SDA and SCL fall time
—
300
ns
(Note 1)
6
THD:STA
Start condition hold time
600
4000
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
7
TSU:STA
Start condition setup time
600
4700
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
8
THD:DAT
Data input hold time
0
—
ns
(Note 2)
9
TSU:DAT
Data input setup time
100
250
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
10
TSU:STO
Stop condition setup time
600
4000
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
11
TAA
Output valid from clock
(Note 2)
—
—
900
3500
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
12
TBUF
Bus free time: Time the bus
must be free before a new
transmission can start
1300
4700
—
—
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
13
TOF
Output fall time from VIH
minimum to VIL maximum
20+0.1CB
—
250
250
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA64)
14
TSP
Input filter spike suppression
(SDA and SCL pins)
—
50
ns
(Notes 1 and 3)
15
TWC
Write cycle time (byte or
page)
—
5
ms
—
16
—
Endurance
1M
—
Note 1:
2:
3:
4:
cycles 25°C, (Note 4)
Not 100% tested. CB = total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site:
www.microchip.com.
 2003 Microchip Technology Inc.
DS21189H-page 3
24AA64/24LC64
FIGURE 1-1:
BUS TIMING DATA
5
4
2
3
SCL
7
SDA
IN
8
10
9
6
14
12
11
SDA
OUT
FIGURE 1-2:
BUS TIMING START/STOP
D4
SCL
6
7
10
SDA
Start
DS21189H-page 4
Stop
 2003 Microchip Technology Inc.
24AA64/24LC64
2.0
FUNCTIONAL DESCRIPTION
The 24XX64 supports a bidirectional, 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as transmitter, while a device
receiving data is defined as a receiver. The bus has to
be controlled by a master device which generates the
serial clock (SCL), controls the bus access and
generates the Start and Stop conditions, while the
24XX64 works as slave. Both master and slave can
operate as transmitter or receiver, but the master
device determines which mode is activated.
3.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition
Accordingly, the following bus conditions have been
defined (Figure 3-1).
3.1
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
3.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
FIGURE 3-1:
(A)
Data Valid (D)
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of data
bytes transferred between Start and Stop conditions is
determined by the master device and is, theoretically,
unlimited (although only the last thirty two will be stored
when doing a write operation). When an overwrite does
occur, it will replace data in a first-in first-out (FIFO)
fashion.
3.5
Acknowledge
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
Note:
Bus not Busy (A)
Both data and clock lines remain high.
3.2
3.4
The 24XX64 does not generate any
Acknowledge
bits
if
an
internal
programming cycle is in progress.
The device that acknowledges has to pull down the
SDA line during the Acknowledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. During reads, a master must signal an end of
data to the slave by not generating an Acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (24XX64) will leave the data line
high to enable the master to generate the Stop
condition.
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(B)
(D)
Start
Condition
Address or
Acknowledge
Valid
(D)
(C)
(A)
SCL
SDA
 2003 Microchip Technology Inc.
Data
Allowed
to Change
Stop
Condition
DS21189H-page 5
24AA64/24LC64
3.6
FIGURE 3-2:
Device Addressing
A control byte is the first byte received following the
Start condition from the master device (Figure 3-2).
The control byte consists of a four-bit control code. For
the 24XX64, this is set as ‘1010’ binary for read and
write operations. The next three bits of the control byte
are the Chip Select bits (A2, A1, A0). The Chip Select
bits allow the use of up to eight 24XX64 devices on the
same bus and are used to select which device is
accessed. The Chip Select bits in the control byte must
correspond to the logic levels on the corresponding A2,
A1 and A0 pins for the device to respond. These bits
are, in effect, the three Most Significant bits of the word
address.
The last bit of the control byte defines the operation to
be performed. When set to a ‘1’, a read operation is
selected. When set to a ‘0’, a write operation is
selected. The next two bytes received define the
address of the first data byte (Figure 3-3). Because
only A12...A0 are used, the upper-three address bits
are don’t care bits. The upper-address bits are
transferred first, followed by the less significant bits.
Following the Start condition, the 24XX64 monitors the
SDA bus, checking the device-type identifier being
transmitted. Upon receiving a ‘1010’ code and appropriate device-select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX64 will select a read or
write operation.
FIGURE 3-3:
0
Read/Write Bit
Chip Select
Bits
Control Code
S
1
0
1
0
A2
A1
A0 R/W ACK
Slave Address
Start Bit
3.7
Acknowledge Bit
Contiguous Addressing Across
Multiple Devices
The Chip Select bits A2, A1 and A0 can be used to
expand the contiguous address space for up to 512K
bits by adding up to eight 24XX64's on the same bus.
In this case, software can use A0 of the control byte as
address bit A13, A1 as address bit A14 and A2 as
address bit A15. It is not possible to sequentially read
across device boundaries.
ADDRESS SEQUENCE BIT ASSIGNMENTS
CONTROL BYTE
1
CONTROL BYTE FORMAT
1
CONTROL
CODE
DS21189H-page 6
0
A
2
A
1
ADDRESS HIGH BYTE
A
0 R/W
CHIPSELECT
BITS
X
X
X
A A A
12 11 10
A
9
ADDRESS LOW BYTE
A
8
A
7
•
•
•
•
•
•
A
0
X = Don’t Care Bit
 2003 Microchip Technology Inc.
24AA64/24LC64
4.0
WRITE OPERATIONS
4.1
Byte Write
Following the Start condition from the master, the
control code (four bits), the Chip Select (three bits) and
the R/W bit (which is a logic low) are clocked onto the
bus by the master transmitter. This indicates to the
addressed slave receiver that the address high byte will
follow once it has generated an Acknowledge bit during
the ninth clock cycle. Therefore, the next byte transmitted by the master is the high-order byte of the word
address and will be written into the address pointer of
the 24XX64. The next byte is the Least Significant
Address Byte. After receiving another Acknowledge
signal from the 24XX64, the master device will transmit
the data word to be written into the addressed memory
location. The 24XX64 acknowledges again and the
master generates a Stop condition. This initiates the
internal write cycle and, during this time, the 24XX64
will not generate Acknowledge signals (Figure 4-1). If
an attempt is made to write to the array with the WP pin
held high, the device will acknowledge the command
but no write cycle will occur, no data will be written and
the device will immediately accept a new command.
After a byte write command, the internal address
counter will point to the address location following the
one that was just written.
4.2
Page Write
The write control byte, word address and the first data
byte are transmitted to the 24XX64 in the same way as
in a byte write. However, instead of generating a Stop
condition, the master transmits up to 31 additional
bytes which are temporarily stored in the on-chip page
buffer and will be written into memory once the master
has transmitted a Stop condition. Upon receipt of each
word, the five lower address pointer bits are internally
incremented by one. If the master should transmit more
than 32 bytes prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received, an internal write cycle will begin (Figure 4-2). If an attempt is
made to write to the array with the WP pin held high, the
device will acknowledge the command but no write
cycle will occur, no data will be written and the device
will immediately accept a new command.
Note:
4.3
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and end at addresses that are
integer multiples of [page size - 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
Write-Protection
The WP pin allows the user to write-protect the entire
array (0000-1FFF) when the pin is tied to VCC. If tied to
VSS or left floating, the write-protection is disabled. The
WP pin is sampled at the Stop bit for every write
command (Figure 3-1) Toggling the WP pin after the
Stop bit will have no effect on the execution of the write
cycle.
 2003 Microchip Technology Inc.
DS21189H-page 7
24AA64/24LC64
FIGURE 4-1:
BYTE WRITE
BUS ACTIVITY
MASTER
SDA LINE
S
T
A CONTROL
BYTE
R
T
AA
S1 0 1 0A
210 0
ADDRESS
HIGH BYTE
S
T
O
P
DATA
XXX
P
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY
ADDRESS
LOW BYTE
X = don’t care bit
FIGURE 4-2:
PAGE WRITE
S
T
BUS ACTIVITY A CONTROL
BYTE
MASTER
R
T
AA
SDA LINE
S 10 1 0A
2100
BUS ACTIVITY
ADDRESS
HIGH BYTE
ADDRESS
LOW BYTE
DATA BYTE 0
S
T
O
P
DATA BYTE 31
XXX
A
C
K
P
A
C
K
A
C
K
A
C
K
A
C
K
X = don’t care bit
DS21189H-page 8
 2003 Microchip Technology Inc.
24AA64/24LC64
5.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, the Start bit and control byte must
be re-sent. If the cycle is complete, the device will
return the ACK and the master can then proceed with
the next Read or Write command. See Figure 5-1 for a
flow diagram of this operation.
FIGURE 5-1:
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
NO
YES
Next
Operation
 2003 Microchip Technology Inc.
DS21189H-page 9
24AA64/24LC64
6.0
READ OPERATION
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
control byte is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read.
6.1
Current Address Read
The 24XX64 contains an address counter that maintains the address of the last word accessed, internally
incremented by one. Therefore, if the previous read
access was to address n (n is any legal address), the
next current address read operation would access data
from address n + 1.
Upon receipt of the control byte with R/W bit set to one,
the 24XX64 issues an acknowledge and transmits the
eight bit data word. The master will not acknowledge
the transfer but does generate a Stop condition and the
24XX64 discontinues transmission (Figure 6-1).
6.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To
perform this type of read operation, the word address
must first be set. This is accomplished by sending
the word address to the 24XX64 as part of a write
operation (R/W bit set to 0). Once the word address
is sent, the master generates a Start condition following the acknowledge.
FIGURE 6-1:
This terminates the write operation, but not before
the internal address pointer is set. The master then
issues the control byte again, but with the R/W bit set
to a one. The 24XX64 will then issue an acknowledge and transmit the 8-bit data word. The master
will not acknowledge the transfer but does generate
a Stop condition, which causes the 24XX64 to
discontinue transmission (Figure 6-2). After a
random read command, the internal address counter
will point to the address location following the one
that was just read.
6.3
Sequential Read
Sequential reads are initiated in the same way as a
random reads, except that once the 24XX64 transmits
the first data byte, the master issues an acknowledge as
opposed to the Stop condition used in a random read.
This acknowledge directs the 24XX64 to transmit the
next sequentially-addressed 8-bit word (Figure 6-3).
Following the final byte being transmitted to the master,
the master will NOT generate an acknowledge, but will
generate a Stop condition. To provide sequential reads,
the 24XX64 contains an internal address pointer which
is incremented by one at the completion of each
operation. This address pointer allows the entire
memory contents to be serially read during one operation. The internal address pointer will automatically roll
over from address 1FFF to address 0000 if the master
acknowledges the byte received from the array address
1FFF.
CURRENT ADDRESS READ
BUS ACTIVITY
MASTER
S
T
A
R
T
SDA LINE
S
BUS ACTIVITY
DS21189H-page 10
CONTROL
BYTE
S
T
O
P
DATA (n)
P
A
C
K
N
O
A
C
K
 2003 Microchip Technology Inc.
24AA64/24LC64
FIGURE 6-2:
RANDOM READ
S
BUS ACTIVITY T
MASTER
A CONTROL
R
BYTE
T
AA
SDA LINE
S1 0 1 0A
2100
ADDRESS
HIGH BYTE
ADDRESS
LOW BYTE
CONTROL
BYTE
A
C
K
A
C
K
P
N
O
A
C
K
A
C
K
X = Don’t Care Bit
FIGURE 6-3:
S
T
O
P
DATA
BYTE
S 1 0 1 0 A A A1
210
XXX
A
C
K
BUS ACTIVITY
S
T
A
R
T
SEQUENTIAL READ
BUS ACTIVITY CONTROL
MASTER
BYTE
DATA n
DATA n + 1
DATA n + 2
DATA n + X
SDA LINE
BUS ACTIVITY
 2003 Microchip Technology Inc.
A
C
K
A
C
K
A
C
K
A
C
K
S
T
O
P
P
N
O
A
C
K
DS21189H-page 11
24AA64/24LC64
7.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 7-1.
TABLE 7-1:
PIN FUNCTION TABLE
Name
PDIP
SOIC
TSSOP
MSOP
ROTATED
TSSOP
A0
1
1
1
1
3
Chip Address Input
A1
2
2
2
2
4
Chip Address Input
A2
3
3
3
3
5
Chip Address Input
VSS
4
4
4
4
6
Ground
SDA
5
5
5
5
7
Serial Address/Data I/O
7.1
SCL
6
6
6
6
8
Serial Clock
WP
7
7
7
7
1
Write-Protect Input
VCC
8
8
8
8
2
+1.8V to 5.5V Power Supply
A0, A1, A2 Chip Address Inputs
The A0, A1 and A2 inputs are used by the 24XX64 for
multiple device operation. The levels on these inputs
are compared with the corresponding bits in the slave
address. The chip is selected if the compare is true.
Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. These
inputs must be connected to either VCC or VSS.
7.2
Description
Serial Data (SDA)
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. Since it is an opendrain terminal, the SDA bus requires a pull-up resistor
to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz).
7.3
Serial Clock (SCL)
The SCL input is used to synchronize the data transfer
from and to the device.
7.4
Write-Protect (WP)
WP can be connected to either VSS, VCC or left floating.
An internal pull-down resistor on this pin will keep the
device in the unprotected state if left floating. If tied to
VSS, or left floating, normal memory operation is
enabled (read/write the entire memory 0000-1FFF).
If tied to VCC, write operations are inhibited. Read
operations are not affected.
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating the Start and Stop conditions.
DS21189H-page 12
 2003 Microchip Technology Inc.
24AA64/24LC64
8.0
PACKAGING INFORMATION
8.1
Package Marking Information
8-Lead PDIP (300 mil)
Example:
XXXXXXXX
T/XXXNNN
YYWW
24LC64
I/P13F
0327
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
T/XXYYWW
NNN
24LC64
I/SN0327
13F
8-Lead SOIC (208 mil)
XXXXXXXX
T/XXXXXX
YYWWNNN
Example:
24LC64
I/SM
032713F
TSSOP
Marking Codes
Device
STD
Rot
Pb-Free
Rot
24AA64
4AB
4ABX
G4AB
G4ABX
24LC64
4LB
4LBX
G4LB
G4LBX
Example:
8-Lead TSSOP
XXXX
4LB
XYWW
I327
NNN
13F
Example:
8-Lead MSOP
XXXXXX
YWWNNN
Legend:
Note:
*
XX...X
T
YY
WW
NNN
Device
MSOP
Marking Codes
STD
Pb-Free
24AA64
4A64
G4AB
24LC64
4L64
G4LB
4L64I
32713F
Customer specific information*
Temperature grade (I,E)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard QTP marking consists of Microchip part number, year code, week code, and traceability code.
 2003 Microchip Technology Inc.
DS21189H-page 13
24AA64/24LC64
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
p
eB
B
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
c
§
B1
B
eB
α
β
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21189H-page 14
 2003 Microchip Technology Inc.
24AA64/24LC64
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
α
h
45°
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
φ
c
B
α
β
MIN
.053
.052
.004
.228
.146
.189
.010
.019
0
.008
.013
0
0
A1
INCHES*
NOM
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.197
.020
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
6.02
3.71
3.91
4.80
4.90
0.25
0.38
0.48
0.62
0
4
0.20
0.23
0.33
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
 2003 Microchip Technology Inc.
DS21189H-page 15
24AA64/24LC64
8-Lead Plastic Small Outline (SM) – Medium, 208 mil (SOIC)
E
E1
p
D
2
1
n
B
α
c
A2
A
φ
β
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
A
A2
A1
E
E1
D
L
φ
c
B
α
β
MIN
.070
.069
.002
.300
.201
.202
.020
0
.008
.014
0
0
INCHES*
NOM
8
.050
.075
.074
.005
.313
.208
.205
.025
4
.009
.017
12
12
A1
MAX
.080
.078
.010
.325
.212
.210
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.78
1.97
1.75
1.88
0.05
0.13
7.62
7.95
5.11
5.28
5.13
5.21
0.51
0.64
0
4
0.20
0.23
0.36
0.43
0
12
0
12
MIN
MAX
2.03
1.98
0.25
8.26
5.38
5.33
0.76
8
0.25
0.51
15
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
Drawing No. C04-056
DS21189H-page 16
 2003 Microchip Technology Inc.
24AA64/24LC64
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
φ
β
A1
A2
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
φ
c
B
α
β
MIN
INCHES
NOM
MAX
8
.026
.033
.002
.246
.169
.114
.020
0
.004
.007
0
0
.035
.004
.251
.173
.118
.024
4
.006
.010
5
5
.043
.037
.006
.256
.177
.122
.028
8
.008
.012
10
10
MILLIMETERS*
NOM
MAX
8
0.65
1.10
0.85
0.90
0.95
0.05
0.10
0.15
6.25
6.38
6.50
4.30
4.40
4.50
2.90
3.00
3.10
0.50
0.60
0.70
0
4
8
0.09
0.15
0.20
0.19
0.25
0.30
0
5
10
0
5
10
MIN
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
 2003 Microchip Technology Inc.
DS21189H-page 17
24AA64/24LC64
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n
1
α
A2
A
c
φ
A1
(F)
L
β
Units
Dimension Limits
n
p
MIN
INCHES
NOM
MAX
MILLIMETERS*
NOM
8
0.65 BSC
0.75
0.85
0.00
4.90 BSC
3.00 BSC
3.00 BSC
0.40
0.60
0.95 REF
0°
0.08
0.22
5°
5°
-
MIN
8
Number of Pins
Pitch
.026 BSC
A
.043
Overall Height
A2
Molded Package Thickness
.030
.033
.037
A1
.000
.006
Standoff
E
Overall Width
.193 TYP.
E1
.118 BSC
Molded Package Width
D
.118 BSC
Overall Length
L
.016
.024
.031
Foot Length
Footprint (Reference)
F
.037 REF
φ
0°
8°
Foot Angle
c
.003
.006
.009
Lead Thickness
B
.009
.012
.016
Lead Width
α
5°
15°
Mold Draft Angle Top
β
5°
15°
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
MAX
1.10
0.95
0.15
0.80
8°
0.23
0.40
15°
15°
JEDEC Equivalent: MO-187
Drawing No. C04-111
DS21189H-page 18
 2003 Microchip Technology Inc.
24AA64/24LC64
APPENDIX A:
REVISION HISTORY
Revision H
Corrections to Section 1.0, Electrical Characteristics.
 2003 Microchip Technology Inc.
DS21189H-page 19
24AA64/24LC64
NOTES:
DS21189H-page 20
 2003 Microchip Technology Inc.
24AA64/24LC64
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip
World Wide Web site.
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
and a web browser, such as Netscape® or Microsoft®
Internet Explorer. Files are also available for FTP
download from our FTP site.
Connecting to the Microchip Internet
Web Site
SYSTEMS INFORMATION AND
UPGRADE HOT LINE
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the most current upgrade kits. The Hot Line
Numbers are:
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
042003
The Microchip web site is available at the following
URL:
www.microchip.com
The file transfer site is available by using an FTP
service to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
 2003 Microchip Technology Inc.
DS21189H-page 21
24AA64/24LC64
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
RE:
Reader Response
Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Device: 24AA64/24LC64
Y
N
Literature Number: DS21189H
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21189H-page 22
 2003 Microchip Technology Inc.
24AA64/24LC64
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature Package
Range
X
Lead Finish
Examples:
a)
b)
Device:
1.8V, 64 Kbit I2C Serial EEPROM
1.8V, 64 Kbit I2C Serial EEPROM
(Tape and Reel)
24AA64X
1.8V, 64 Kbit I2C Serial EEPROM in rotated
pinout (ST only)
24AA64XT 1.8V, 64 Kbit I2C Serial EEPROM in rotated
pinout (ST only)
24LC64:
2.5V, 64 Kbit I2C Serial EEPROM
24LC64T: 2.5V, 64 Kbit I2C Serial EEPROM
(Tape and Reel)
24LC64X
2.5V, 64 Kbit I2C Serial EEPROM in rotated
pinout (ST only)
24LC64XT 2.5V, 64 Kbit I2C Serial EEPROM in rotated
pinout (ST only)
24AA64:
24AA64T:
c)
24AA64-I/P: Industrial Temperature,
1.8V, PDIP package
24AA64-I/SN: Industrial Temperature,
1.8V, SOIC package
24AA64-I/SM: Industrial Temperature,
1.8V, SOIC (208 mil) package
d)
24AA64X-I/ST: Industrial Temperature,
1.8V, Rotated TSSOP package
e)
24AA64T-I/ST: Industrial Temperature,
1.8V, TSSOP package, tape and reel
f)
24LC64-I/P: Industrial Temperature,
2.5V, PDIP package
24LC64-E/SN: Extended Temperature,
2.5V, SOIC package
24LC64-E/SM: Extended Temperature,
2.5V, SOIC (208 mil) package
g)
h)
i)
24LC64XT-I/ST : Extended Temperature,
2.5V, Rotated TSSOP package, tape and
Temperature I
Range:
E
=
=
-40°C to +85°C
-40°C to +125°C
reel
j)
24LC64-I/ST: Industrial Temperature,
2.5V, TSSOP package
Package:
Lead Finish
P
=
SN =
SM =
ST =
MS =
Blank=
G
=
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (150 mil body), 8-lead
Plastic SOIC (208 mil body), 8-lead
Plastic TSSOP (4.4 mm), 8-lead
Plastic Micro Small Outline (MSOP), 8-lead
Standard 63/37 Sn/Pb
Matte Tin (pure Sn)
k)
24AA64-I/PG: Industrial Temperature, 1.8V,
PDIP package, Pb-free
l)
24LC64T-I/SNG: Industrial Temperature,
2.5V, SOIC package, tape and reel, Pb-free
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2003 Microchip Technology Inc.
DS21189H-page23
24AA64/24LC64
NOTES:
DS21189H-page 24
 2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE and PowerSmart are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER,
SEEVAL and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Application Maestro, dsPICDEM, dsPICDEM.net, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor, SmartShunt, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
 2003 Microchip Technology Inc.
DS21189H-page 25
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
Korea
Corporate Office
Australia
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or
82-2-558-5934
Atlanta
Unit 915
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100
Fax: 86-10-85282104
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034
Fax: 770-640-0307
Boston
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848
Fax: 978-692-3821
Chicago
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
4570 Westgrove Drive, Suite 160
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Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250
Fax: 248-538-2260
Kokomo
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Kokomo, IN 46902
Tel: 765-864-8360
Fax: 765-864-8387
Los Angeles
China - Beijing
China - Chengdu
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Chengdu 610016, China
Tel: 86-28-86766200
Fax: 86-28-86766599
China - Fuzhou
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506
Fax: 86-591-7503521
China - Hong Kong SAR
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
China - Shanghai
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Tel: 86-21-6275-5700
Fax: 86-21-6275-5060
China - Shenzhen
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888
Fax: 949-263-1338
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 86-755-82901380
Fax: 86-755-8295-1393
Phoenix
China - Shunde
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Chandler, AZ 85224-6199
Tel: 480-792-7966
Fax: 480-792-4338
Room 401, Hongjian Building
No. 2 Fengxiangnan Road, Ronggui Town
Shunde City, Guangdong 528303, China
Tel: 86-765-8395507 Fax: 86-765-8395571
San Jose
China - Qingdao
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950
Fax: 408-436-7955
Rm. B505A, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Tel: 86-532-5027355 Fax: 86-532-5027205
Toronto
India
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699
Fax: 905-673-6509
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
DS21189H-page 26
Singapore
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Kaohsiung Branch
30F - 1 No. 8
Min Chuan 2nd Road
Kaohsiung 806, Taiwan
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Taiwan
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
EUROPE
Austria
Durisolstrasse 2
A-4600 Wels
Austria
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark
Regus Business Centre
Lautrup hoj 1-3
Ballerup DK-2750 Denmark
Tel: 45-4420-9895 Fax: 45-4420-9910
France
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy
Via Quasimodo, 12
20025 Legnano (MI)
Milan, Italy
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands
P. A. De Biesbosch 14
NL-5152 SC Drunen, Netherlands
Tel: 31-416-690399
Fax: 31-416-690340
United Kingdom
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44-118-921-5869
Fax: 44-118-921-5820
07/28/03
 2003 Microchip Technology Inc.