STMICROELECTRONICS M74HC165TTR

M74HC165
8-bit PISO shift register
Features
■
High speed:
– tPD = 15 ns (typ.) at VCC = 6 V
■
Low power dissipation:
– ICC = 4 μA (max.) at TA = 25 °C
■
High noise immunity:
VNIH = VNIL = 28 % VCC (Min.)
■
Symmetrical output impedance:
|IOH| = IOL = 4 mA (min)
■
Balanced propagation delays:
tPLH ≅ tPHL
■
Wide operating voltage range:
VCC (opr) = 2 V to 6 V
■
Pin and function compatible with
74 series 165
Table 1.
SO-16
DIP-16
TSSOP16
Description
The M74HC165 is a high speed CMOS 8-bit
PISO (parallel-in-serial-out) shift register
fabricated with silicon gate C2MOS technology.
This device contains eight clocked master slave
RS flip-flops connected as a shift register, with
auxiliary gating to provide overriding
asynchronous parallel entry. The parallel data
enter when the shift/load input is low and can
change while shift/load is low, provided that the
recommended set-up and hold times are
observed. For clocked operation, shift/load must
be high. The two clock inputs perform identically:
one can be used as a clock inhibit by applying a
high signal, to allow this operation clocking is
accomplished through a 2-input nor gate. To avoid
double clocking, however, the inhibit signal should
only go high while the clock is high. Otherwise the
rising inhibit signal causes the same response as
rising clock edge. All inputs are equipped with
protection circuits against static discharge and
transient excess voltage.
Device summary
Order code
Package
Packaging
M74HC165B1R
DIP-16
Tube
M74HC165RM13TR
SO-16
Tape and reel
M74HC165TTR
TSSOP16
Tape and reel
May 2008
Rev 5
1/21
www.st.com
21
Contents
M74HC165
Contents
1
Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
4
2.1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Logic states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.3
Timing chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/21
M74HC165
1
Logic symbols and I/O equivalent circuit
Logic symbols and I/O equivalent circuit
Figure 1.
IEC logic symbols
Figure 2.
Input and output equivalent circuit
3/21
Pin settings
M74HC165
2
Pin settings
2.1
Pin connection
Figure 3.
2.2
Pin description
Table 2.
4/21
Pin connection (top through view)
Pin description
Pin number
Symbol
Name and function
1
SHIFT/LOAD
2
CLOCK
7
QH
Complementary output
9
QH
Serial output
10
SI
Serial input
11, 12, 13, 14, 3, 4, 5, 6
A to H
15
CLOCK INH
Clock inhibit
8
GND
Ground (0 V)
16
VCC
Positive supply voltage
Data inputs
Clock input (low to high, edge triggered)
Parallel data inputs
M74HC165
Logic states
3
Logic states
3.1
Truth table
Table 3.
Truth table
Inputs
Internal outputs
Outputs
Shift
/Load
Clock INH
Clock
SI
A..........H
QA
QB
QH
L
X
X
X
a..........h
a
b
h
H
L
H
X
H
QAn
QGn
H
L
L
X
L
QAn
QGn
H
L
H
X
H
QAn
QGn
H
L
L
X
L
QAn
QGn
H
X
H
X
X
No change
H
H
X
X
X
No change
Note:
a........h : the level of steady input voltage at inputs a through respectively QAn - QGn : the
level of QA - QG, respectively. Before the most recent transition of the clock.
3.2
Logic diagram
Figure 4.
Note:
Logic diagram
This logic diagram has not to be used to estimate propagation delays
5/21
Logic states
3.3
Timing chart
Figure 5.
6/21
M74HC165
Timing chart
M74HC165
4
Maximum rating
Maximum rating
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. these are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. exposure to absolute maximum rating conditions for
extended periods may affect device reliability. refer also to the STMicroelectronics sure
program and other relevant quality documents.
Table 4.
Absolute maximum ratings
Symbol
VCC
Parameter
Supply voltage
Value
Unit
-0.5 to +7
V
VI
DC input voltage
-0.5 to VCC + 0.5
V
VO
DC output voltage
-0.5 to VCC + 0.5
V
IIK
DC input diode current
± 20
mA
IOK
DC output diode current
± 20
mA
IO
DC output current
± 25
mA
DC VCC or ground current
± 50
mA
500(1)
mW
-65 to +150
°C
300
°C
ICC or
IGND
PD
Power dissipation
Tstg
Storage temperature
TL
Lead temperature (10 sec)
1. (*) 500 mW at 65 ° C; derate to 300 mW by 10 mW/° C from 65° C to 85° C
4.1
Recommended operating conditions
Table 5.
Recommended operating conditions
Symsbol
VCC
Parameter
Supply voltage
Value
Unit
2 to 6
V
VI
Input voltage
0 to VCC
V
VO
Output voltage
0 to VCC
V
Top
Operating temperature
-55 to 125
°C
VCC = 2.0 V
0 to 1000
ns
VCC = 4.5 V
0 to 500
ns
VCC = 6.0 V
0 to 400
ns
tr, tf
Input rise and fall time
7/21
Electrical characteristics
M74HC165
5
Electrical characteristics
Table 6.
DC specifications
Test condition
Symbol
VIH
VIL
VOH
VOL
II
ICC
8/21
Parameter
High level input voltage
Low level input voltage
High level output voltage
Low level output voltage
Value
TA = 25°C
VCC
(V)
-40 to 85°C -55 to 125°C Unit
Min Typ Max
Min
Max
Min
2.0
1.5
1.5
1.5
4.5
3.15
3.15
3.15
6.0
4.2
4.2
4.2
Max
V
2.0
0.5
0.5
0.5
4.5
1.35
1.35
1.35
6.0
1.8
1.8
1.8
2.0
IO = -20 μA
1.9
2.0
1.9
1.9
4.5
IO = -20 μA
4.4
4.5
4.4
4.4
6.0
IO = -20 μA
5.9
6.0
5.9
5.9
4.5
IO = -4.0 mA
4.18 4.31
4.13
4.10
6.0
IO = -5.2 mA
5.68
5.63
5.60
2.0
IO = 20 μA
0.0
0.1
0.1
0.1
4.5
IO = 20 μA
0.0
0.1
0.1
0.1
6.0
IO = 20 μA
0.0
0.1
0.1
0.1
4.5
IO = 4.0 mA
0.17 0.26
0.33
0.40
6.0
IO = 5.2 mA
0.18 0.26
0.33
0.40
5.8
V
V
V
Input leakage current
6.0 VI = VCC or GND
± 0.1
±1
±1
μA
Quiescent supply current
6.0 VI = VCC or GND
4
40
80
μA
M74HC165
Table 7.
Electrical characteristics
AC electrical characteristics (CL = 50 pF, Input tr = tf = 6ns)
Test condition
Symbol
Parameter
Output transition
tTLH tTHL
time
Propagation delay
tPLH tPHL time
(CLOCK - QH, QH)
Propagation delay
time
tPLH tPHL
(SHIFT/LOAD QH, QH)
Propagation delay
tPLH tPHL time
(H - QH, QH)
fMAX
tW(H)
tW(L)
tW(L)
ts
th
tREM
Maximum clock
frequency
Minimum pulse
width
(CLOCK)
Minimum pulse
width
(SHIFT/LOAD)
Minimum set-up
time
(PI - SHIFT/LOAD)
(SI - CLOCK)
(SHIFT/LOAD CK)
Minimum hold time
(PI - SHIFT/LOAD)
(SI - CLOCK)
(SHIFT/LOAD CK)
Minimum removal
time
(CLOCK - CK INH)
VCC
(V)
Value
TA = 25°C
Min
-40 to 85°C
-55 to 125°C
Min
Min
Typ
Max
Max
2.0
30
75
95
110
4.5
8
15
19
22
6.0
7
13
16
19
2.0
55
150
190
225
4.5
18
30
38
45
6.0
15
26
33
38
2.0
65
165
205
4.5
21
33
41
50
6.0
18
28
35
43
2.0
52
135
170
205
4.5
17
27
34
41
6.0
14
23
29
35
Unit
Max
ns
ns
250
2.0
7.4
15
6.0
4.8
4.5
37
60
30
24
6.0
44
71
35
28
ns
ns
MHz
2.0
24
75
95
110
4.5
6
15
19
22
6.0
5
13
16
19
2.0
32
75
95
110
4.5
8
15
19
22
6.0
7
13
16
19
2.0
24
75
95
110
4.5
6
15
19
22
ns
ns
ns
6.0
5
13
16
19
2.0
0
0
0
4.5
0
0
0
6.0
0
0
0
2.0
20
75
95
110
4.5
5
15
19
22
6.0
4
13
16
19
ns
ns
9/21
Electrical characteristics
Table 8.
M74HC165
Capacitive characteristics
Test condition
Symbol
Parameter
VCC
(V)
Value
TA = 25 °C
Min
-40 to 85 °C
Typ
Max
10
CIN
Input capacitance
5.0
5
CPD
Power dissipation
capacitance (1)
5.0
55
Min
Max
10
-55 to
125 °C
Min
Max
10
1. CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current
consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation.
ICC(opr) = CPD x VCC x fIN + ICC
10/21
Unit
pF
pF
M74HC165
6
Test circuit
Test circuit
Figure 6.
Test circuit
CL = 50 pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
11/21
Waveforms
7
12/21
M74HC165
Waveforms
Figure 7.
Serial mode propagation delay (f = 1 MHz; 50% duty cycle)
Figure 8.
Parallel mode propagation delay (f = 1 MHz; 50% duty cycle)
M74HC165
Waveforms
Figure 9.
Minimum pulse width (S/L), propagation delay times
(f = 1 MHz; 50% duty cycle)
Figure 10. Setup and hold time (PI to S/L) (f = 1 MHz; 50% duty cycle)
Figure 11. Minimum removal time (CK INH to CK) (f = 1 MHz; 50% duty cycle)
13/21
Package mechanical data
8
M74HC165
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
14/21
M74HC165
Package mechanical data
Plastic DIP-16 (0.25) MECHANICAL DATA
mm.
inch
DIM.
MIN.
a1
0.51
B
0.77
TYP
MAX.
MIN.
TYP.
MAX.
0.020
1.65
0.030
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
17.78
0.700
F
7.1
0.280
I
5.1
0.201
L
Z
3.3
0.130
1.27
0.050
P001C
15/21
Package mechanical data
M74HC165
SO-16 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.25
a2
0.004
0.010
1.64
0.063
b
0.35
0.46
0.013
b1
0.19
0.25
0.007
C
MAX.
0.5
0.018
0.010
0.019
c1
45° (typ.)
D
9.8
10
0.385
0.393
E
5.8
6.2
0.228
0.244
e
1.27
e3
8.89
0.050
0.350
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
M
S
0.62
0.050
0.024
8° (max.)
0016020D
16/21
M74HC165
Package mechanical data
TSSOP16 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0079
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0˚
L
0.45
A
0.60
0.0256 BSC
8˚
0˚
0.75
0.018
8˚
0.024
0.030
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
17/21
Package mechanical data
M74HC165
Tape & Reel SO-16 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
MAX.
MIN.
330
13.2
TYP.
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
18/21
TYP
0.504
22.4
0.519
0.882
Ao
6.45
6.65
0.254
0.262
Bo
10.3
10.5
0.406
0.414
Ko
2.1
2.3
0.082
0.090
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
M74HC165
Package mechanical data
Tape & Reel SSOP16 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
TYP
MAX.
MIN.
330
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
13.2
TYP.
0.504
22.4
0.519
0.882
Ao
8.4
8.6
0.331
0.339
Bo
6.7
6.9
0.264
0.272
Ko
2.9
3.1
0.114
0.122
Po
3.9
4.1
0.153
0.161
P
11.9
12.1
0.468
0.476
19/21
Revision history
9
M74HC165
Revision history
Table 9.
20/21
Document revision history
Date
Revision
Changes
9-Jul-2001
3
Final release.
21-Mar-2007
4
The document has been reformatted, updated Table 2: Pin
description on page 4
26-May-2008
5
Removed: M74HC165M1R order code.
Minor changes in the text.
Added: SO-16 and TSSOP16 tape and reel specifications.
M74HC165
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21/21