M74HC4543 BCD TO 7 SEGMENT LATCH/DECODER/LCD DRIVER ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 14ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4543 DESCRIPTION The M74HC4543 is an high speed CMOS BCD-TO-7 SEGMENT DECODER WITH LCD DRIVER fabricated with silicon gate C2MOS technology. This device consists of BCD-TO-7 segment decoder with a BCD input latch and a 7-segment driver for a liquid crystal display (LCD). When any illegal BCD input signal is applied or input BI is held high, the display is blanked. When driving DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP M74HC4543B1R M74HC4543M1R T&R M74HC4543RM13TR M74HC4543TTR LCDs, a common square wave signal should be applied not only to the PH input of this device but also to the electrically common backplane of the display. For other types of readouts, such as light-emitting diode (LED), some additional drivers, such as a transistor array is required. All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS July 2001 1/10 M74HC4543 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1 LD 5, 3, 2, 4 6 A to D PH 7 BI 9, 10, 11, 12, 13, 15, 14 8 16 a to g Latch Disable Input (Active HIGH) Address (Data) Inputs Phase Input (Active HIGH) Blanking Input (Active HIGH) Segment Outputs GND VCC Ground (0V) Positive Supply Voltage TRUTH TABLE INPUT OUTPUT DISPLAY MODE LD BI PH D C B A a b c d e f g X H H H H H H H H H H H H L H L L L L L L L L L L L L L L L L L L L L L L L L L L L X L L L L L L L L H H H H X X L L L L H H H H L L L H X X L L H H L L H H L L H X X X L H L H L H L H L H X X X L H L H H L H H H H H L L L H H H H H L L H H H L L L H H L H H H H H H H L L L H L H H L H H L H H L L ##### L H L H L L L H L H L L L L H L L L H H H L H H L L L L L H H H H H L H H L L ↑ ↑ H ↑ INVERSE OF ABOVE OUTPUT LEVEL X : Don’t Care ↑ : Same as above combinations ### : Depends upon the BCD code previously applied when LD =’H’ 2/10 BLANK 0 1 2 3 4 5 6 7 8 9 BLANK BLANK ##### DISPLAY AS ABOVE M74HC4543 LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays DISPLAY MODE ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) 500(*) mW -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C 3/10 M74HC4543 RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature Input Rise and Fall Time tr, tf Unit 2 to 6 V 0 to VCC V 0 to VCC V -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL II ICC 4/10 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 Typ. Max. 1.5 3.15 4.2 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 V 0.5 1.35 1.8 2.0 IO=-20 µA 1.9 2.0 1.9 1.9 4.5 IO=-20 µA 4.4 4.5 4.4 4.4 6.0 IO=-20 µA 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 5.68 Unit V V 6.0 IO=-5.2 mA 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.37 0.40 6.0 IO=5.2 mA 0.18 0.26 0.37 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VCC or GND 4 40 80 µA 5.8 5.63 5.60 V M74HC4543 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tTLH tTHL Output Transition Time tPLH tPHL Propagation Delay Time (BCD - OUT) tPLH tPHL Propagation Delay Time (BI - OUT) tPLH tPHL Propagation Delay Time (PH - OUT) tPLH tPHL Propagation Delay Time (LD - OUT) tW(H) ts th Minimum Pulse Width (LD) Minimum Set Up Time Minimum Hold Time Value TA = 25°C VCC (V) Min. 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Typ. Max. 30 8 7 160 40 30 80 23 17 58 17 14 130 35 16 30 8 7 15 4 3 75 15 13 300 60 51 175 35 30 130 26 22 265 53 45 75 15 13 75 15 13 0 0 0 -40 to 85°C -55 to 125°C Min. Min. Max. 95 19 16 375 75 64 220 44 37 165 33 28 335 66 56 95 29 26 95 19 16 0 0 0 Unit Max. 110 22 19 450 90 76 265 53 45 195 39 33 400 80 68 110 22 19 110 22 19 0 0 0 ns ns ns ns ns ns ns ns CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) Value TA = 25°C Typ. Max. CIN Input Capacitance 5.0 Min. 5 10 CPD Power Dissipation Capacitance (note 1) 5.0 115 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 (per FLIP/FLOP) 5/10 M74HC4543 TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM : PROPAGATION DELAY, SETUP AND HOLD TIMES, MINIMUM PULSE WIDTH (LD) (f=1MHz; 50% duty cycle) 6/10 M74HC4543 Plastic DIP-16 (0.25) MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 0.77 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 7/10 M74HC4543 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) PO13H 8/10 M74HC4543 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0° L 0.45 A 0.60 0.0256 BSC 8° 0° 0.75 0.018 8° 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 9/10 M74HC4543 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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