STMICROELECTRONICS STG3699

STG3699
LOW VOLTAGE 0.5Ω MAX QUAD SPDT SWITCH
WITH BREAK BEFORE MAKE FEATURE
■
■
■
■
■
■
■
HIGH SPEED:
tPD = 0.3ns (TYP.) at VCC = 3.0V
tPD = 0.4ns (TYP.) at VCC = 2.3V
ULTRA LOW POWER DISSIPATION:
ICC = 0.2µA (MAX.) at TA = 85°C
LOW "ON" RESISTANCE VIN=0V:
RON = 0.5Ω (MAX. TA = 25°C) at VCC = 2.7V
RON = 0.8Ω (MAX. TA = 25°C) at VCC = 2.3V
RON = 3.0Ω (MAX. TA = 25°C) at VCC = 1.8V
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 1.65V to 4.3V SINGLE SUPPLY
4.3V TOLERANT AND 1.8V COMPATIBLE
THRESHOLD ON DIGITAL CONTROL INPUT
at VCC = 2.3 to 3.0V
LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
ESD PERFORM. (ANALOG CHAN. vs GND):
HBM > 7KV (MIL STD 883 method 3015)
DESCRIPTION
The STG3699 is an high-speed CMOS LOW
VOLTAGE QUAD ANALOG S.P.D.T. (Single Pole
Dual Throw) SWITCH or 2:1 Multiplexer/
Demultiplexer Switch fabricated in silicon gate
C2MOS technology. It is designed to operate from
1.65V to 4.3V, making this device ideal for
portable applications.
It offers very low ON-Resistance (<0.5Ω) at
VCC=3.0V. The nIN inputs are provided to control
the switches. The switches nS1 are ON (they are
QFN
TSSOP
Table 1: Order Codes
PACKAGE
T&R
TSSOP
QFN
STG3699TTR
STG3699QTR
connected to common Ports Dn) when the nIN
input is held high and OFF (high impedance state
exists between the two ports) when nIN is held
low; the switches nS2 are ON (they are connected
to common Ports Dn) when the nIN input is held
low and OFF (high impedance state exists
between the two ports) when IN is held high.
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are
equipped with protection circuits against static
discharge, giving them ESD immunity and
transient excess voltage. It’s available in the
commercial temperature range in TSSOP and
QFN3x3mm package.
Figure 1: Pin Connection
August 2005
Rev. 5
1/12
STG3699
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
TSSOP(1)
PIN N°
QFN(1)
PIN N°
SYMBOL
NAME AND
FUNCTION
1, 5, 9, 13, 15, 3, 7, 11, 1S1 to 4S1, Independent
3, 7, 11, 15 1, 5, 9, 13 1S2 to 4S2 Channels
2, 6, 10, 14 16, 4, 8, 12
D1 to D4 Common
Channels
4, 12
2, 10
1-2IN, 3-4IN Controls
16
14
VCC
Positive Supply Voltage
8
6
GND
Ground (0V)
1. Exposed pad must be soldered to a floating plane. Do NOT connect to power or ground.
Table 3: Truth Table
IN
SWITCH S1
SWITCH S2
H
ON
OFF(1)
ON
L
OFF
(1)
1. High Impedance
Table 4: Absolute Maximum Ratings
Symbol
VCC
VI
VIC
VO
IIKC
Parameter
Supply Voltage
DC Input Voltage
DC Control Input Voltage
DC Output Voltage
DC Input Diode Current on control pin (VIN< 0V)
IIK
IOK
DC Input Diode Current (VIN< 0V)
DC Output Diode Current
IO
IOP
DC Output Current
DC Output Current Peak (pulse at 1ms, 10% duty cycle)
ICC or IGND DC VCC or Ground Current
PD
Power Dissipation at Ta=70°C (1)
Tstg
TL
QFN
TSSOP
Storage Temperature
Lead Temperature (10 sec)
Value
-0.5 to 4.6
-0.5 to VCC + 0.5
Unit
V
-0.5 to 4.6
-0.5 to VCC + 0.5
V
V
V
− 50
± 50
mA
mA
± 20
± 300
mA
mA
± 500
± 100
1120
500
-65 to 150
300
mA
mA
mW
mW
°C
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions
not implied.
(1) Derate above 70°C: by 18.5mW/°C for QFN package; by 5.6mW/°C for TSSOP.
Table 5: Recommended Operating Conditions
Symbol
VCC
VI
VIC
VO
Top
dt/dv
Parameter
Supply Voltage (note 1)
Input Voltage
Control Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time Control Input
1) Truth Table guaranteed: 1.2V to 4.3V.
2/12
Value
1.65 to 4.3
0 to VCC
0 to 4.3
0 to VCC
VCC= 1.65V to 2.7V
VCC= 3.0V to 4.3V
-55 to 125
0 to 20
0 to 10
Unit
V
V
V
V
°C
ns/V
STG3699
Table 6: DC Specifications
Test Conditions
Symbol
VIH
VIL
RON
∆RON
RFLAT
IOFF
IIN
ICC
Parameter
Value
TA = 25°C
VCC
(V)
Min.
High Level
1.65-1.95
0.65VCC
Input Voltage 2.3-2.5
1.4
2.7-3.0
1.4
3.3
1.5
3.6
1.7
4.3
2.2
Low Level
1.65-1.95
Input Voltage 2.3-2.5
2.7-3.0
3.3
3.6
4.3
Switch ON
4.3
Resistance
3.0
(1)
VS=0V to VCC
2.7
IS=100mA
2.3
1.8
1.65
ON
Resistance
VS=1.5V
Match
2.7
IS=100mA
between
channels
(1,2)
ON
4.3
Resistance
VS=1.5V
3.0
FLATNESS
I
2.7
S=100mA
(3)
2.3
1.65
VS=0.8V
IS=100mA
OFF State
Leakage
Current
(nSn), (Dn)
Input
Leakage
Current
Quiescent
Supply
Current (1)
Typ.
0.40
0.40
0.40
0.50
0.70
0.80
-40 to 85°C
Max.
0.40
0.50
0.50
0.50
0.50
1.3
0.50
0.50
0.50
0.80
3.0
3.0
Min.
Max.
-55 to 125°C
Min.
0.65VCC
0.65VCC
1.4
1.4
1.5
1.7
2.2
1.4
1.4
1.5
1.7
2.2
0.40
0.50
0.50
0.50
0.50
1.3
0.60
0.60
0.60
0.80
4.0
4.0
Max.
V
0.40
0.50
0.50
0.50
0.50
1.3
V
Ω
Ω
0.06
0.07
Unit
0.15
0.15
Ω
4.3
VS=0.3 or 4V
±10
± 100
nA
0 - 4.3
VIN= 0 to 4.3V
±0.1
±1
µA
1.65-4.3
VIN=VCC or
GND
±0.05
±0.2
±1
µA
Note 1: Guaranteed by design
Note 2: ∆RON = RON(MAX) - RON(MIN).
Note 3: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified
analog signal ranges.
3/12
STG3699
Table 7: AC Electrical Characteristics (CL = 35pF, R L = 50Ω, tr = tf ≤ 5ns)
Test Condition
Symbol
Parameter
tPLH, tPHL Propagation Delay
tON
tOFF
tD
Q
TA = 25°C
VCC
(V)
Min.
TURN-ON time
1.65-1.95
2.3-2.7
3.0-3.6
3.6-4.3
1.65-1.95
TURN-OFF time
2.3-2.7
3.0-3.6
3.6-4.3
1.65-1.95
Break Before Make
Time Delay
Charge injection
Value
2.3-2.7
3.0-3.6
3.6-4.3
1.65-1.95
2.3-2.7
3.0-3.6
3.6-4.3
1.65-1.95
2.3-2.7
3.0-3.6
3.6-4.3
Typ.
VI=OPEN
0.45
0.40
0.30
0.30
VS=0.8V
70
VS=1.5V
30
30
30
VS=0.8V
45
VS=1.5V
25
25
25
CL=35pF
RL= 50Ω
VS=1.5V
2
2
2
Max.
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
Max.
ns
50
50
50
60
60
60
30
30
30
40
40
40
ns
ns
15
15
15
50
40
35
35
CL= 100pF
RL= 1MΩ
VGEN= 0V
RGEN= 0Ω
Unit
ns
pC
Table 8: Analog Switch Characteristics (CL = 5pF, RL = 50Ω, TA = 25°C)
Test Condition
Symbol
Parameter
Off Isolation (1)
1.65-4.3
Xtalk
Crosstalk
1.65-4.3
THD
Total Harmonic
Distortion
2.3-4.3
BW
-3dB Bandwidth
1.65-4.3
CIN
Control Pin Input
Capacitance
Sn Port Capacitance
D Port Capacitance when
Switch is Enabled
CSn
CD
TA = 25°C
VCC
(V)
OIRR
Value
Min.
VS= 1VRMS
f= 100KHz
VS= 1VRMS
f= 100KHz
RL= 600Ω
VIN= 2VPP
f= 20Hz to 20kHz
RL= 50Ω
Max.
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
-64
dB
-54
dB
0.03
%
50
MHz
5
3.3
f= 1MHz
37
f= 1MHz
84
3.3
Note 1: Off Isolation = 20Log10 (VD/VS), VD = output. VS = input to off switch
4/12
Typ.
-40 to 85°C
pF
STG3699
Figure 3: On Resistance
Figure 4: Off Leakage
Figure 6: Bandwidth
Figure 7: Channel To Channel Crosstalk
Figure 5: Off Isolation
5/12
STG3699
Figure 8: Test Circuit
CL = 5/35pF or equivalent (includes jig and probe capacitance)
RL = 50Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
Figure 9: Break Before Make Time Delay
Figure 10: Charge Injection (VGEN=0V, RGEN=0Ω, RL=1MΩ, CL=100pF)
6/12
STG3699
Figure 11: Turn On, Turn Off Delay Time
7/12
STG3699
TSSOP16 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0079
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0˚
L
0.45
A
0.60
0.0256 BSC
8˚
0˚
0.75
0.018
8˚
0.024
0.030
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
0080338D
8/12
STG3699
QFN16 (3x3) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
0.80
0.90
1.00
0.032
0.035
0.039
A1
0.02
0.05
0.001
0.002
A3
0.20
A
b
0.18
D
D2
0.30
0.007
0.010
3.00
1.55
E
E2
0.25
0.008
1.70
0.118
1.80
0.061
0.067
3.00
1.55
1.70
1.80
0.061
0.067
0.50
0.020
K
0.20
0.008
0.30
r
0.09
E
0.40
0.071
0.118
e
L
0.012
0.50
0.012
0.016
0.071
0.020
0.006
E2
A
K
A1
e
D2
D
b
A3
K
L
r
9/12
STG3699
Tape & Reel TSSOP16 MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
MAX.
MIN.
330
13.2
TYP.
MAX.
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
10/12
TYP
0.504
22.4
0.519
0.882
Ao
6.7
6.9
0.264
0.272
Bo
5.3
5.5
0.209
0.217
Ko
1.6
1.8
0.063
0.071
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
STG3699
Table 9: Revision History
Date
Revision
14-May-2004
3
01-Jun-2004
04-Jul-2005
4
5
Description of Changes
Characteristics at VCC = 4.3 V Added on Tables 3, 4, 5, 6 and 7.
ESD Performance (Analog Channels) added on top page.
The Q Values on Table 7 has been updated.
11/12
STG3699
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
© 2005 STMicroelectronics - All Rights Reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
12/12