STG5223 Low voltage 0.5 Ω dual SPDT switch with break-before-make Features ■ Ultra low power dissipation: ICC = 0.2 μA (max.) at TA= 85 °C ■ Low ON resistance: – RON = 0.50 Ω (max. TA = 25 °C) at VCC = 4.3 V – RON = 0.55 Ω (max. TA = 25 °C) at VCC = 3.6 V – RON = 0.55 Ω (max. TA = 25 °C) at VCC = 3.0 V QFN10L (1.8 x 1.4 mm) ■ Wide operating voltage range: VCC (opr) = 1.65 V to 4.3 V single supply ■ 5 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 1.65 to 4.3 V ■ Latch-up performance exceeds 300 mA (JESD 17) ■ ESD performance: HBM > 2 kV (MIL STD 883 method 3015) Description exists between the two ports) when nIN is held low. The switches nS2 are ON (connected to common ports Dn) when the nIN input is held low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, break-beforemake delay time and ultra low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage immunity. The STG5223 is a high-speed CMOS dual analog SPDT (single pole dual throw) switch or dual 2:1 multiplexer/demultiplexer bus switch fabricated in silicon gate C2MOS technology. It is designed to operate from 1.65 to 4.3 V, making this device ideal for portable applications. It offers very low ON resistance (<0.5 Ω) at VCC = 3.0 V. The nIN inputs are provided to control the switches. The switches nS1 are ON (connected to common ports Dn) when the nIN input is held high and OFF (high impedance state \ Table 1. Device summary Order code Package Packaging STG5223QTR QFN10L (1.8 x 1.4 mm) Tape and reel January 2008 Rev 1 1/19 www.st.com 19 Contents STG5223 Contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Input equivalent circuit and truth table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/19 STG5223 Pin settings 1 Pin settings 1.1 Pin connection SEL2 18 D2 29 GND Pin connection (top through view) 2S2 Figure 1. 10 7 6 9 5 8 4 SEL1 7 2S1 10 3 1.2 1S2 41 2 5 VCC 1S1 3 6 D1 Pin description Table 2. Pin description Pin number Symbol 1 VCC Positive supply voltage 2 1S1 Independent channel 3 D1 Common channel 4 SEL1 5 1S2 Independent channel GND GND Ground (0V) 7 2S2 Independent channel 8 SEL2 9 D2 Common channel 10 2S1 Independent channel Warning: Name and function Control Control Exposed pad must be soldered to a floating plane. Do NOT connect to power or ground. 3/19 Input equivalent circuit and truth table 2 Input equivalent circuit and truth table Figure 2. Input equivalent circuit Table 3. Truth table IN Switch S1 Switch S2 H ON OFF(1) L OFF(1) ON 1. High impedance 4/19 STG5223 STG5223 3 Maximum rating Maximum rating Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Absolute maximum ratings Symbol VCC Parameter Supply voltage Value Unit -0.5 to 5.5 V -0.5 to VCC + 0.5 V -0.5 to 5.5 V -0.5 to VCC + 0.5 V VI DC input voltage VIC DC control input voltage VO DC output voltage IIKC DC input diode current on control pin (VSEL < 0 V) − 50 mA IIK DC input diode current (VIN < 0 V) ± 50 mA IOK DC output diode current ± 20 mA IO DC output current ± 300 mA IOP DC output current peak (pulse at 1 ms, 10% duty cycle) ± 500 mA DC VCC or ground current ± 100 mA Power dissipation at TA=70 °C(1) 1120 mW -65 to 150 °C 300 °C ICC or IGND PD TSTG TL Storage temperature Lead temperature (10 sec) 1. Derate above 70 °C by 18.5 mW/ °C 5/19 Maximum rating 3.1 STG5223 Recommended operating conditions Table 5. Recommended operating conditions Symbol VCC Supply voltage Value Unit 1.65 to 4.3 V VI Input voltage 0 to VCC V VIC Control input voltage 0 to 4.3 V VO Output voltage 0 to VCC V Top Operating temperature -40 to 85 °C dt/dv 6/19 Parameter VCC = 1.65 V to 2.7 V 0 to 20 VCC = 3.0 V to 4.3 V 0 to 10 Input rise and fall time control input ns/V STG5223 4 Electrical characteristics Electrical characteristics Table 6. DC specifications Value Symbol Parameter VCC (V) Test condition TA = 25 °C Min VIH VIL High level input voltage Low level input voltage ΔRON RFLAT IOFF ON resistance match between channels (1) ON resistance flatness (2) OFF state leakage current (nSn), (Dn) Min 0.65 VCC 0.65 VCC 2.3 −2.5 1.2 1.2 2.7 −3.0 1.3 1.3 3.0 −3.6 1.4 1.4 4.3 1.5 1.5 Max V 1.65 −1.95 0.25 0.25 2.3 −2.5 0.25 0.25 2.7 −3.0 0.25 0.25 3.0 −3.6 0.30 0.30 4.3 0.40 0.40 0.45 0.50 0.55 0.50 0.55 0.65 0.50 0.55 0.65 2.3 0.60 0.70 0.80 1.8 0.90 1.0 1.1 3.6 RON Max 1.65 −1.95 4.3 Switch ON resistance Typ -40 to 85 °C Unit 3.0 2.7 VS = 0 V to VCC IS = 100 mA VS = 1.5 V IS = 100 mA V Ω Ω 0.1 4.3 0.15 0.20 0.20 3.6 0.15 0.20 0.20 0.15 0.20 0.20 0.15 0.20 0.20 2.3 0.20 0.25 0.25 1.65 0.35 0.45 0.45 ±20 ±100 nA VSEL = 0 to 4.3 V ±0.05 ±1 μA VSEL = VCC or GND ±0.05 ±0.2 μA 3.0 2.7 4.3 IIN Input leakage current 0 −4.3 ICC Quiescent supply current 1.65 −4.3 VS = 1.5 V IS = 100 mA VS = 0.3 or 4 V Ω 7/19 Electrical characteristics Table 6. STG5223 DC specifications (continued) Value Symbol Parameter VCC (V) TA = 25 °C Test condition Min ICCLV Quiescent supply current low voltage driving 4.3 -40 to 85 °C Unit Typ Max Min Max V1IN, V2IN = 1.65 V ±37 ±50 ±100 V1IN, V2IN = 1.80 V ±33 ±40 ±50 V1IN, V2IN = 2.60 V ±12 ±20 ±30 μA 1. ΔRON = RON(max) - RON(min). 2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Table 7. AC electrical characteristics (CL= 35 pF, RL= 50 Ω, tr= tf ≤5 ns) Value Symbol Parameter VCC (V) Test condition TA = 25 °C Min tPLH, tPHL Propagation delay 1.65 −−1.95 0.30 2.3 −−2.7 0.25 3.0 −−3.3 0.20 3.6 −−4.3 0.20 Turn-ON time 1.65 −−1.95 VS = 0.8 V Turn-OFF time 1.65 −−1.95 Break-beforemake time delay 2.3 −−2.7 3.0 −−3.3 3.6 −−4.3 8/19 85 90 42 55 65 40 55 65 18 30 40 16 30 40 15 30 40 ns VS = 1.5 V 3.6 −−4.3 tD 65 45 2.3 −−2.7 3.0 −−3.3 Max ns VS = 1.5 V 3.6 −−4.3 tOFF Min 120 2.3 −−2.7 3.0 −−3.3 Max Unit ns 1.65 −−1.95 VS = 0.8 V tON Typ -40 to 85 °C CL = 35 pF RL = 50 Ω VS = 1.5 V 2 17 2 10 2 8 2 7 ns STG5223 Electrical characteristics Table 7. AC electrical characteristics (continued) (CL= 35 pF, RL= 50 Ω, tr= tf ≤5 ns) Value Symbol Parameter VCC (V) Test condition TA = 25 °C Min 1.65 −−1.95 Q Charge injection 2.3 −−2.7 3.0 −−3.3 3.6 −−4.3 Table 8. Typ -40 to 85 °C Max Min Unit Max 43 CL = 100 pF RL = 1 MΩ VGEN = 0 V RGEN = 0 Ω 51 pC 51 49 Analog switch characteristics (CL = 5 pF, RL = 50 Ω, TA = 25 °C) Value Symbol Parameter VCC (V) Test condition TA = 25 °C Min Typ Max -40 to 85 °C Min Unit Max OIRR Off isolation (1) 1.65 −−4.3 VS = 1 VRMS f = 100 kHz -66 dB Xtalk Crosstalk 1.65 −−4.3 VS = 1 VRMS f = 100 kHz -72 dB THD Total harmonic distortion 2.3 −−4.3 RL = 600 Ω VSEL = 2 VPP f = 20 Hz to 20 kHz 0.02 % BW -3dB bandwidth 1.65 −−4.3 RL = 50 Ω 55 MHz CIN Control pin input capacitance 7 CON Sn port capacitance when switch is enabled 3.3 f = 1 MHz 114 COFF Sn port capacitance when switch is disabled 3.3 f = 1 MHz 40 D port capacitance when the switch is enabled 3.3 f = 1 MHz 114 CD pF 1. Off isolation = 20 Log10 (VD/VS), VD = output. VS = input at off switch 9/19 Test circuit 5 STG5223 Test circuit Figure 3. ON resistance I DS V V CC D S1 VS S2 IN GND GND CS14071 Figure 4. OFF leakage V CC I I S(OFF) D(OFF) D A A V SS V S2 IN V CC GND CS14081 10/19 D STG5223 Test circuit Figure 5. OFF isolation V CC S1 V OUT 50 Ω S2 IN GND VS GND CS00381 Figure 6. Bandwidth V CC D S1 V OUT S2 V IN CC GND CS00371 11/19 Test circuit STG5223 Figure 7. Channel-to-channel crosstalk CS14091 Figure 8. Test circuit 1. CL = 5/35 pF or equivalent (includes jig and probe capacitance) 2. RL = 50 Ω or equivalent 3. RT = ZOUT of pulse generator (typically 50 Ω) 12/19 STG5223 Test circuit Figure 9. Break-before-make time delay Figure 10. Charge injection (VGEN = 0, RGEN = 0 Ω, RL = 1 MΩ, CL = 100 pF) Figure 11. Turn on, turn off delay time VCC S1 D VOUT RL CL S2 IN V IN GND 13/19 Package mechanical data 6 STG5223 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 12. QFN10L (1.8 x 1.4 x 0.5 mm) package outline 14/19 STG5223 Package mechanical data Table 9. QFN10L (1.8 x 1.4 x 0.5 mm) mechanical data millimeters Symbol Min Typ Max A 0.45 0.50 0.55 A1 0 0.02 0.05 A3 0.127 b 0.15 0.20 0.25 D 1.75 1.80 1.85 E 1.35 1.40 1.45 e 0.40 L 0.35 0.40 0.45 L1 0.45 0.50 0.55 Figure 13. QFN10L (1.8 x 1.4 x 0.5 mm) recommended footprint 15/19 Package mechanical data Figure 14. QFN10L (1.8 x 1.4 mm) carrier tape Figure 15. QFN10L (1.8 x 1.4 mm) reel information - back view 16/19 STG5223 STG5223 Package mechanical data Figure 16. QFN10L (1.8 x 1.4 mm) reel information - front side 17/19 Revision history 7 STG5223 Revision history Table 10. 18/19 Document revision history Date Revision 10-Jan-2008 1 Changes Initial release. STG5223 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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