TOSHIBA TC74HC670AP

TC74HC670AP/AF
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74HC670AP,TC74HC670AF
4 Word × 4 Bit Register File (3-state)
The TC74HC670A is a high speed 4-WORDS × 4-BITS
REGISTER FILE fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent
LSTTL while maintaining the CMOS low power dissipation.
The register file is organized as 4 words of 4 bits each.
Separate read and write address inputs (RA, RB, and WA, WB)
and enable inputs ( RE , WE ) are available permitting
simultaneous writing into one word location and reading from
another location.
Four data inputs (D0~D3) are provided to store the 4-bit words.
The write address inputs (WA, WB) determine the location of
the stored word in the register. When write Enable ( WE ) is held
low, the data is entered into addressed location. When WE is
held high, data and address inputs are inhibited. The data
acquisition from the four registers is made possible by the read
address inputs (RA, RB) when the Read Enable ( RE ) is held low.
When RE is held high the data outputs are in the high impedance
state.
All inputs are equipped with protection circuits against static
discharge or transient excess voltage.
TC74HC670AP
TC74HC670AF
Weight
DIP16-P-300-2.54A
SOP16-P-300-1.27A
Features
•
High speed: tpd = 23 ns (typ.) at VCC = 5 V
•
Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
•
High noise immunity: VNIH = VNIL = 28% VCC (min)
•
Output drive capability: 10 LSTTL loads
•
•
Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
∼ tpHL
Balanced propagation delays: tpLH −
•
Wide operating voltage range: VCC (opr) = 2 to 6 V
•
Pin and function compatible with 74LS670
: 1.00 g (typ.)
: 0.18 g (typ.)
Pin Assignment
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TC74HC670AP/AF
IEC Logic Symbol
Truth Table
Write Function Table
Read Function Table
Write Inputs
Read Inputs
Words
Outputs
WB
WA
WE
0
1
2
3
RB
RA
RE
Q1
L
L
L
Q=D
Q0
Q0
Q0
L
L
L
W0B1 W0B2 W0B3 W0B4
L
H
L
Q0
Q=D
Q0
Q0
L
H
L
W1B1 W1B2 W1B3 W1B4
H
L
L
Q0
Q0
Q=D
Q0
H
L
L
W2B1 W2B2 W2B3 W2B4
H
H
L
Q0
Q0
Q0
Q=D
H
H
L
W3B1 W3B2 W3B3 W3B4
X
X
H
Q0
Q0
Q0
Q0
X
X
H
Z
Q2
Z
Q3
Z
Q4
Z
X: Don’t care
Z: High impedance
(Q = D): The four selected internal flip-flop outputs will assume the states applied to the four external data inputs.
Q0: The level of Q before the indicated input conditions were established.
W0B1: The first bit of word 0, etc.
Block Diagram
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System Diagram
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Absolute Maximum Ratings (Note 1)
Characteristics
Symbol
Rating
Unit
Supply voltage range
VCC
−0.5 to 7.0
V
DC input voltage
VIN
−0.5 to VCC + 0.5
V
VOUT
−0.5 to VCC + 0.5
V
Input diode current
IIK
±20
mA
Output diode current
IOK
±20
mA
DC output current
IOUT
±25
mA
DC VCC/ground current
ICC
±50
mA
Power dissipation
PD
500 (DIP) (Note 2)/180 (SOP)
mW
Storage temperature
Tstg
−65 to 150
°C
DC output voltage
Note 1: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 2: 500 mW in the range of Ta = −40 to 65°C. From Ta = 65 to 85°C a derating factor of −10 mW/°C should be
applied until 300 mW.
Operating Ranges (Note)
Characteristics
Symbol
Rating
Unit
Supply voltage
VCC
2 to 6
V
Input voltage
VIN
0 to VCC
V
VOUT
0 to VCC
V
Operating temperature
Topr
−40 to 85
°C
Input rise and fall time
tr, tf
Output voltage
0 to 1000 (VCC = 2.0 V)
0 to 500 (VCC = 4.5 V)
ns
0 to 400 (VCC = 6.0 V)
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
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Electrical Characteristics
DC Characteristics
Ta = 25°C
Test Condition
Characteristics
High-level input
voltage
Low-level input
voltage
High-level output
voltage
Low-level output
voltage
Symbol
VOH
VOL
Typ.
Max
Min
Max
2.0
1.50
⎯
⎯
1.50
⎯
4.5
3.15
⎯
⎯
3.15
⎯
6.0
4.20
⎯
⎯
4.20
⎯
2.0
⎯
⎯
0.50
⎯
0.50
4.5
⎯
⎯
1.35
⎯
1.35
6.0
⎯
⎯
1.80
⎯
1.80
2.0
1.9
2.0
⎯
1.9
⎯
4.5
4.4
4.5
⎯
4.4
⎯
6.0
5.9
6.0
⎯
5.9
⎯
IOH = −4 mA
4.5
4.18
4.31
⎯
4.13
⎯
IOH = −5.2 mA
6.0
5.68
5.80
⎯
5.63
⎯
2.0
⎯
0.0
0.1
⎯
0.1
4.5
⎯
0.0
0.1
⎯
0.1
6.0
⎯
0.0
0.1
⎯
0.1
IOL = 4 mA
4.5
⎯
0.17
0.26
⎯
0.33
IOL = 5.2 mA
6.0
⎯
0.18
0.26
⎯
0.33
6.0
⎯
⎯
±0.5
⎯
±5.0
μA
⎯
VIL
VIN
= VIH or
VIL
VIN
= VIH or
VIL
Unit
Min
⎯
VIH
Ta = −40 to 85°C
VCC
(V)
IOH = −20 μA
IOL = 20 μA
VIN = VIH or VIL
V
V
V
V
3-state output
off-state current
IOZ
Input leakage
current
IIN
VIN = VCC or GND
6.0
⎯
⎯
±0.1
⎯
±1.0
μA
Quiescent supply
current
ICC
VIN = VCC or GND
6.0
⎯
⎯
4.0
⎯
40.0
μA
VOUT = VCC or GND
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Timing Requirements (input: tr = tf = 6 ns)
Characteristics
Minimum pulse width
( WE )
Minimum set-up time
(Dn- WE )
Minimum set-up time
(WA, WB- WE )
Minimum hold time
(Dn- WE )
Minimum hold time
(WA, WB- WE )
Minimum latch time
( WE -RA, RB)
Note:
Ta = 25°C
Test Condition
Symbol
⎯
tW (L)
⎯
ts
⎯
ts
⎯
th
⎯
th
tlatch
(Note)
Ta =
−40 to
85°C
VCC (V)
Typ.
Limit
Limit
2.0
⎯
75
95
4.5
⎯
15
19
6.0
⎯
13
16
2.0
⎯
50
65
4.5
⎯
10
13
6.0
⎯
9
11
2.0
⎯
0
0
4.5
⎯
0
0
6.0
⎯
0
0
2.0
⎯
5
5
4.5
⎯
5
5
6.0
⎯
5
5
2.0
⎯
0
0
4.5
⎯
0
0
6.0
⎯
0
0
2.0
⎯
75
95
4.5
⎯
15
19
6.0
⎯
13
16
Unit
ns
ns
ns
ns
ns
ns
tlatch is the time allowed for the internal output of the latch to assume the state of new data.
This is important only when attempting to read from a location immediately after that location has received
new data.
AC Characteristics (CL = 15 pF, VCC = 5 V, Ta = 25°C, input: tr = tf = 6 ns)
Characteristics
Output transition time
Symbol
Typ.
Max
Unit
⎯
⎯
4
8
ns
⎯
⎯
23
34
ns
⎯
⎯
24
38
ns
⎯
⎯
22
32
ns
RL = 1 kΩ
⎯
11
18
ns
RL = 1 kΩ
⎯
11
15
ns
tTHL
tpLH
(RA, AB-Qn)
tpHL
Propagation delay time
tpLH
( WE -Qn)
tpHL
Propagation delay time
tpLH
(Dn-Qn)
tpHL
3-state output disable time
Min
tTLH
Propagation delay time
3-state output enable time
Test Condition
tpZL
tpZH
tpLZ
tpHZ
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AC Characteristics (CL = 50 pF, input: tr = tf = 6 ns)
Ta = 25°C
Test Condition
Characteristics
Output transition time
Symbol
tTLH
Propagation delay
time
tpLH
(RA, AB-Qn)
tpHL
Propagation delay
time
tpLH
( WE -Qn)
tpHL
Propagation delay
time
tpLH
(Dn-Qn)
tpHL
Output enable time
Output disable time
Input capacitance
Output capacitance
Power dissipation
capacitance
Note:
⎯
tTHL
tpZH
tpZL
tpLZ
tpHZ
⎯
⎯
⎯
RL = 1 kΩ
RL = 1 kΩ
Ta = −40 to 85°C
VCC
(V)
Min
Typ.
Max
Min
Max
2.0
⎯
30
75
⎯
95
4.5
⎯
8
15
⎯
19
6.0
⎯
7
13
⎯
16
2.0
⎯
90
195
⎯
245
4.5
⎯
27
39
⎯
49
6.0
⎯
22
33
⎯
42
2.0
⎯
95
220
⎯
275
4.5
⎯
28
44
⎯
55
6.0
⎯
22
37
⎯
47
2.0
⎯
90
185
⎯
230
4.5
⎯
26
37
⎯
46
6.0
⎯
20
31
⎯
39
2.0
⎯
46
110
⎯
140
4.5
⎯
14
22
⎯
28
6.0
⎯
12
19
⎯
24
2.0
⎯
25
95
⎯
120
4.5
⎯
14
19
⎯
24
6.0
⎯
12
16
⎯
20
Unit
ns
ns
ns
ns
ns
ns
CIN
⎯
⎯
5
10
⎯
10
pF
COUT
⎯
⎯
10
⎯
⎯
⎯
pF
⎯
⎯
101
⎯
⎯
⎯
pF
CPD
(Note)
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD・VCC・fIN + ICC
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Package Dimensions
Weight: 1.00 g (typ.)
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Package Dimensions
Weight: 0.18 g (typ.)
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TC74HC670AP/AF
RESTRICTIONS ON PRODUCT USE
20070701-EN GENERAL
• The information contained herein is subject to change without notice.
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of
safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of
such TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as
set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and
conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc.
• The TOSHIBA products listed in this document are intended for usage in general electronics applications
(computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances,
etc.).These TOSHIBA products are neither intended nor warranted for usage in equipment that requires
extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or
bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or
spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in his
document shall be made at the customer’s own risk.
• The products described in this document shall not be used or embedded to any downstream products of which
manufacture, use and/or sale are prohibited under any applicable laws and regulations.
• The information contained herein is presented only as a guide for the applications of our products. No
responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which
may result from its use. No license is granted by implication or otherwise under any patents or other rights of
TOSHIBA or the third parties.
• Please contact your sales representative for product-by-product details in this document regarding RoHS
compatibility. Please use these products in this document in compliance with all applicable laws and regulations
that regulate the inclusion or use of controlled substances. Toshiba assumes no liability for damage or losses
occurring as a result of noncompliance with applicable laws and regulations.
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