UTC-IC UTC75185

UTC 75185
LINEAR INTEGRATED CIRCUIT
MULTIPLE RS-232 DRIVERS AND
RECEIVERS
DESCRIPTION
TSSOP-20
The UTC 75185 complies with the requirements of the
TIA/EIA232-F and ITU (formerly CCITT) v.28 standards.
These standards are for data interchange between a host
computer and peripheral at signaling rates up to 20kbit/s.
The switching speeds of the UTC 75185 are fast enough
to support rates up to 120kbite/s with lower capacitive
loads (shorter cables). Interoperability at the higher
signaling rates cannot be assured unless the designer
has design control of the cable and the interface circuits
at both ends. For interoperability at signaling rates to
120kbit/s, use of ITA/EIA-423-B (ITU v.10) and
TIA/EIA-422-B (ITU v.11) standards are recommended.
The UTC 75185 is Characterized for operation over
the temperature range of 0°C to 70°C.
SOP-20
DIP-20
FEATURES
*Single chip with easy interface between UART and
Serial-Port connector of IBMTM, PC/ATTM and
Compatibles.
*Three drivers and five receivers meet or exceed the
requirements of TIA/EIA-232-F and ITU v.28 standards.
*Designed to support data rates up to 120 kbps
*ESD protection meets or exceeds 10 kV on RS-232 pins
and 5 kV on all other pins (Human-Body Model)
UTC
UNISONIC TECHNOLOGIES CO., LTD.
1
QW-R113-003,B
UTC 75185
LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATIONS
VDD
1
20
VCC
RA1
2
19
RY1
RA2
RA3
3
18
4
17
RY2
RY3
DY1
DY2
5
16
6
15
RA4
DY3
7
14
8
13
9
12
10
11
RA5
VSS
DA1
DA2
RY4
DA3
RY5
GND
PIN DESCRIPTION
PIN NO
SYMBOL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VDD
RA1
RA2
RA3
DY1
DY2
RA4
DY3
RA5
VSS
GND
RY5
DA3
RY4
DA2
DA1
RY3
RY2
RY1
VCC
UTC
NAME AND FUNCTION
Supply Voltage
First Receiver Input
Second Receiver Input
Third Receiver Input
First Driver Output
Second Driver Output
Fourth Receiver Input
Third Driver Output
Fifth Receiver Input
Supply Voltage
Ground
Fifth Receiver Output
Third Driver Input
Fourth Receiver Output
Second Driver Input
First Driver Input
Third Receiver Output
Second Receiver Output
First Receiver Output
Supply Voltage
UNISONIC TECHNOLOGIES CO., LTD.
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QW-R113-003,B
UTC 75185
LINEAR INTEGRATED CIRCUIT
LOGIC SYMBOL AND LOGIC DIAGRAM
This symbol is in accordance with ANSI/IEEE std 91-1984
and IEC Publication 617-12
CIRCUIT OF DRIVERS (Resistor value shown are nominal.)
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UNISONIC TECHNOLOGIES CO., LTD.
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QW-R113-003,B
UTC 75185
LINEAR INTEGRATED CIRCUIT
CIRCUIT OF EACH RECEIVER (Resistor value shown are nominal.)
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UNISONIC TECHNOLOGIES CO., LTD.
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QW-R113-003,B
UTC 75185
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS OVER OPERATING FREE-AIR TEMPERATURE
RANGE (unless otherwise specified)
PARAMETER
SYMBOL
VALUE
UNIT
Supply voltage (Note 1)
VDD
15
V
Supply voltage (Note 1)
Vss
-15
V
Supply voltage (Note 1)
Vcc
10
V
Input voltage range (DRIVER)
VI
-15 to 7
V
Input voltage range (RECEIVER)
VI
-30 to 30
V
Driver output voltage range
Vo
-15 to 15
V
Receiver low level output current
Io
20
mA
Thermal impedance (note 2)
97
SOP-20
°C/W
θJA
67
DIP-20
Electrostatic discharge
Human-body model: RS-232 pins, class 3, A (note 3)
10
kV
Human-body model: All pins, class 3, A (note 4)
5
kV
Machine model: RS-232 pins, class 3, B(note 5)
600
V
Machine model: All pins, class 3, B (note 4)
300
V
Storage temperature range
Tstg
-65 to +150
°C
Lead temperature 1.6mm from case for 10 sec
TL
260
°C
Note 1: All voltage are with respect to the network ground terminal.
Note 2: The package thermal impedance is calculated in accordance with JESD 51, except for through-hole
packages, which use a trace length of zero.
Note 3: RS-232 pins are tested with respect to ground and each other.
Note 4: Per MIL-PRF-38535.
Note 5: RS-232 pins are tested with respect to ground.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Supply voltage
Supply voltage
Supply voltage
High level input voltage (driver only)
Low level input voltage (driver only)
High level output current
DRIVER
RECEIVER
Low level output current
DRIVER
RECEIVER
Operating free-air temperature
UTC
SYMBOL
MIN
TYP
MAX
UNIT
VDD
VSS
VCC
VIH
VIL
7.5
-7.5
4.5
1.9
9
-9
5
15
-15
5.5
V
V
V
V
V
mA
0.8
IOH
-6.0
-0.5
IOL
6
16
70
mA
TA
0
°C
UNISONIC TECHNOLOGIES CO., LTD.
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UTC 75185
LINEAR INTEGRATED CIRCUIT
SUPPLY CURRENTS
PARAMETER
SYMBOL
MIN
VDD
Vss
No load.
9
-9
All inputs at 1.9V
12
-12
15
-15
9
-9
No load.
All inputs at 0.8V
12
-12
15
-15
No load.
9
-9
All inputs at 1.9V
12
-12
15
-15
No load.
9
-9
All inputs at 0.8V
12
-12
15
-15
No load. All inputs at 5V, Vcc=5V
Supply current from VDD
IDD
Supply current from Vss
Iss
Supply current from Vcc
TEST CONDITIONS
Icc
MAX
UNIT
15
19
25
4.5
5.5
9
-15
-19
-25
-3.2
-3.2
-3.2
30
mA
mA
mA
mA
mA
DRIVER ELECTRICAL CHARACTERISTICS OVER RECOMMENDED OPERATING
FREE-AIR TEMPERATURE RANGE (VDD=9V, Vss=-9V, Vcc=5V, unless otherwise specified)
PARAMETER
High level output voltage
Low level output voltage (note 6)
High level input current
Low level input current
High level short circuit output current
(note 7)
Low level short circuit output current
Output resistance (note 8)
SYMBOL
TEST CONDITIONS
VOH
VOL
VIL=0.8V, RL=3 kΩ (Figure 1)
VIH=1.9V, RL=3 kΩ (Figure
1)
IIH
IIL
IOS(H)
VI=5V (Figure 2)
VI=0V (Figure 2)
VIL=0.8V, VO=0V(Figure 1)
MIN
6
-4.5
TYP
7.5
-7.5
-12
MAX
UNIT
-6
V
V
10
-1.6
-19.5
µA
mA
mA
IOS(L)
rO
VIH=2V, Vo=0V(Figure 1)
4.5
12
19.5
mA
VDD=Vss=Vcc=0V
300
Ω
Vo=-2 to 2V
Note 6: The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in
this datasheet for logic levels only (e.g. if -10V is a maximum, the typical value is a more negative voltage).
Note 7: Output short circuit conditions must maintain the total power dissipation below absolute maximum ratings.
Note 8: Test conditions are those specified by TIA/EIA232-F and as listed above.
DRIVER SWITCHING CHARACTERISTICS (VDD=12V, Vss=-12V, Vcc=5V, TA=25°C)
PARAMETER
SYMBOL
TEST CONDITIONS
TYP
315
MAX
500
UNIT
RL=3 to 7 kΩ, CL=15pF
(Figure 3)
75
175
ns
RL=3 to 7 kΩ, CL=15pF
(Figure 3)
60
100
ns
RL=3 to 7 kΩ, CL=2500pF
(Note 9,Figure 3)
1.7
2.5
µs
Propagation delay time, low to high level
output
tPLH
RL=3 to 7 kΩ, CL=15pF
(Figure 3)
Propagation delay time, high to low level
output
tPHL
Transition time, low to high level output
tTLH
UTC
MIN
UNISONIC TECHNOLOGIES CO., LTD.
ns
6
QW-R113-003,B
UTC 75185
LINEAR INTEGRATED CIRCUIT
PARAMETER
SYMBOL
Transition time high to low level output
tTHL
TEST CONDITIONS
MIN
RL=3 to 7 kΩ, CL=15pF
(Figure 3)
TYP
40
MAX
75
UNIT
ns
RL=3 to 7 kΩ, CL=2500pF
1.5
2.5
µs
(Note 10, Figure 3)
Note 9: Measured between -3V and 3V points of the output waveform (TIA/EIA-232-F conditions), all unused inputs
are tied.
Note 10: Measured between 3V and -3V points of the output waveform (TIA/EIA-232-F conditions), all unused inputs
are tied.
RECEIVER ELECTRICAL CHARACTERISTICS OVER RECOMMENDED
OPERATING CONDITIONS (TA=25°C, Vcc=5V, VDD=9V, Vss=-9V)
PARAMETER
SYMBOL
Positive going threshold voltage
VT+
Negative going threshold voltage
Input hysteresis(VT+ - VT-)
High level output voltage
Low level output voltage
High level input current
Low level input current
Short-circuit output current
TEST CONDITIONS
(Figure 5)
TA=25°C
TA=0°C to 70°C
VTVhys
VOH
VOL
IIH
IIL
Ios
IoH=-0.5mA
VIH=0.75V
Inputs Open
VI=3V, IOL=10mA
VI=25V (Figure 5)
VI=3V (Figure 5)
VI=-25V (Figure 5)
VI=-3V (Figure 5)
(Figure 4)
UNIT
MIN
TYP
MAX
1.75
1.55
0.75
0.5
2.6
1.9
0.97
2.3
2.3
1.25
4
5
V
V
V
0.2
0.45
8.3
V
mA
-8.3
mA
-12
mA
V
2.6
3.6
0.43
-3.6
-0.43
-3.4
RECEIVER SWITCHING CHARACTERISTICS (VDD=12V, Vss=-12V, Vcc=5V, TA=25°C)
PARAMETER
Propagation delay time, low to high level
output
Propagation delay time, high to low level
output
Transition time low to high level output
Transition time high to low level output
UTC
SYMBOL
tPLH
tPHL
tTLH
tTHL
TEST CONDITIONS
RL=5 kΩ, CL=50pF
(Figure 6)
MIN
TYP
107
MAX
500
UNIT
42
150
ns
175
16
525
60
ns
ns
UNISONIC TECHNOLOGIES CO., LTD.
ns
7
QW-R113-003,B
UTC 75185
LINEAR INTEGRATED CIRCUIT
Figure 1. Driver test circuit for VOH, VOL, IOS(H), IOS(L)
Figure 2. Driver test circuit for IIH, IIL
Figure 3. Driver test circuit and voltage waveforms
Note 1. The pulse generator has the following characteristics: tw=25µs, PRR=20kHz, Zo=50Ω, tr=tf<50ns.
Note 2. CL includes probe and jig capacitance.
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UNISONIC TECHNOLOGIES CO., LTD.
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QW-R113-003,A
UTC 75185
LINEAR INTEGRATED CIRCUIT
Figure 4. Receiver test circuit for IOS
Figure 5. Receiver test circuit for VT, VOH, VOL
Figure 6. Receiver propagation and transition times
Note 1. The pulse generator has the following characteristics: tw=25µs, PRR=20kHz, Zo=50Ω, tr=tf<50ns.
Note 2. CL includes probe and jig capacitance.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
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QW-R113-003,A
UTC 75185
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS (DRIVER)
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UNISONIC TECHNOLOGIES CO., LTD.
10
QW-R113-003,A
UTC 75185
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS (RECEIVER)
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UNISONIC TECHNOLOGIES CO., LTD.
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QW-R113-003,A
UTC 75185
LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION
Figure 15. Power-Supply protection to meet Power-Off fault conditions of
TIA/TIA-232-F
Diodes placed in series with the VDD and VSS leads protect the UTC 75185 in the fault condition in which the
device outputs are shorted to ±15V and the power supplies are at low and provide low-impedance paths to ground.
Figure 16. Typical Connection
“g” : See Figure 10 to select the correct values for the loading capacitors (C1, C2, and C3), which are required to
meet the RS-232 maximum slew-rate requirement of 30V/µs. The value of the loading capacitors required depends
upon the line length and desired slew rate, but typically is 330 pF.
UTC
UNISONIC TECHNOLOGIES CO., LTD.
12
QW-R113-003,A
UTC 75185
LINEAR INTEGRATED CIRCUIT
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
UTC
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QW-R113-003,A