LT1011/LT1011A Voltage Comparator Features Description Pin Compatible with LM111 Series Devices n Guaranteed Max 0.5mV Input Offset Voltage n Guaranteed Max 25nA Input Bias Current n Guaranteed Max 3nA Input Offset Current n Guaranteed Max 250ns Response Time n Guaranteed Min 200,000 Voltage Gain n50mA Output Current Source or Sink n±30V Differential Input Voltage n Fully Specified for Single 5V Operation n Available in 8-Lead PDIP and SO Packages The LT®1011 is a general purpose comparator with significantly better input characteristics than the LM111. Although pin compatible with the LM111, it offers four times lower bias current, six times lower offset voltage and five times higher voltage gain. Offset voltage drift, a previously unspecified parameter, is guaranteed at 15µV/°C. Additionally, the supply current is lower by a factor of two with no loss in speed. The LT1011 is several times faster than the LM111 when subjected to large overdrive conditions. It is also fully specified for DC parameters and response time when operating on a single 5V supply. The LT1011 retains all the versatile features of the LM111, including single 3V to ±18V supply operation, and a floating transistor output with 50mA source/sink capability. It can drive loads referenced to ground, negative supply or positive supply, and is specified up to 50V between V– and the collector output. A differential input voltage up to the full supply voltage is allowed, even with ±18V supplies, enabling the inputs to be clamped to the supplies with simple diode clamps. n Applications n n n n n n n SAR A/D Converters Voltage-to-Frequency Converters Precision RC Oscillator Peak Detector Motor Speed Control Pulse Generator Relay/Lamp Driver L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application 10µs 12-Bit A/D Converter Response Time vs Overdrive 15V LM329 7V R3 6.98k *R2 AND R4 SHOULD TC TRACK –15V 0.001µF 500 450 400 INPUT 0V TO 10V 6012 12-BIT D/A CONVERTER R4* 2.49k R6 820Ω PARALLEL OUTPUTS PARALLEL OUTPUTS 5V + R5 1k LT1011A D 5V E 350 300 250 200 150 FALLING OUTPUT RISING OUTPUT 100 – 50 0 0.1 SERIAL OUTPUT AM2504 SAR REGISTER RESPONSE TIME (ns) 15V 3.9k R1 1k FULL-SCALE TRIM R2* 6.49k 7475 LATCH 1 10 OVERDRIVE (mV) 100 1011 TA02 CC S S CP START CLOCK f = 1.4MHz 1011 TA01 1011afe For more information www.linear.com/LT1011 1 LT1011/LT1011A Absolute Maximum Ratings (Note 1) Supply Voltage (Pin 8 to Pin 4)..................................36V Output to Negative Supply (Pin 7 to Pin 4) LT1011AC, LT1011C................................................40V LT1011AI, LT1011I..................................................40V LT1011AM, LT1011M (OBSOLETE)........................50V Ground to Negative Supply (Pin 1 to Pin 4)...............30V Differential Input Voltage.........................................±36V Voltage at STROBE Pin (Pin 6 to Pin 8)........................5V Input Voltage (Note 2)...........................Equal to Supplies Output Short-Circuit Duration................................10 sec Operating Temperature Range (Note 3) LT1011AC, LT1011C................................... 0°C to 70°C LT1011AI, LT1011I.................................–40°C to 85°C LT1011AM, LT1011M (OBSOLETE)..... –55°C to 125°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec).................... 300°C Pin Configuration TOP VIEW V+ GND 1 INPUT+ 2 8 + – TOP VIEW 7 OUTPUT 6 GND 1 BALANCE/ STROBE INPUT – 3 5 BALANCE 4 V– H PACKAGE 8-LEAD TO-5 METAL CAN INPUT+ 2 INPUT – 3 V– 4 N8 PACKAGE 8-LEAD PDIP + – 8 V+ 7 OUTPUT BALANCE/ STROBE BALANCE 6 5 S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 130°C/W(N8) TJMAX = 150°C, θJA = 150°C/W(S8) TJMAX = 150°C, θJA = 150°C/W, θJC = 45°C/W OBSOLETE PACKAGE Consider the N8 or S8 Packages for Alternate Source 1011afe 2 For more information www.linear.com/LT1011 LT1011/LT1011A Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT1011ACN8#PBF N/A LT1011 8-Lead Plastic DIP 0°C to 70°C LT1011CN8#PBF N/A LT1011 8-Lead Plastic DIP 0°C to 70°C LT1011AIS8#PBF LT1011AIS8#TRPBF 1011AI 8-Lead Plastic SO –40°C to 85°C LT1011CS8#PBF LT1011CS8#TRPBF 1011 8-Lead Plastic SO 0°C to 70°C LT1011IS8#PBF LT1011IS8#TRPBF 1011I 8-Lead Plastic SO –40°C to 85°C OBSOLETE PACKAGES LT1011ACH#PBF N/A 8-Lead TO-5 Metal Can –55°C to 125°C LT1011CH#PBF N/A 8-Lead TO-5 Metal Can –55°C to 125°C LT1011AMH#PBF N/A 8-Lead TO-5 Metal Can –55°C to 125°C LT1011MH#PBF N/A 8-Lead TO-5 Metal Can –55°C to 125°C LT1011ACJ8#PBF N/A 8-Lead CERDIP –55°C to 125°C LT1011CJ8#PBF N/A 8-Lead CERDIP –55°C to 125°C LT1011AMJ8#PBF N/A 8-Lead CERDIP –55°C to 125°C LT1011MJ8#PBF N/A 8-Lead CERDIP –55°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 1011afe For more information www.linear.com/LT1011 3 LT1011/LT1011A Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, VCM = 0V, RS = 0Ω, VGND = –15V, output at pin 7 unless otherwise noted. LT1011AC/AI/AM SYMBOL PARAMETER VOS Input Offset Voltage *Input Offset Voltage CONDITIONS MIN TYP MAX 0.3 ● 0.5 1 ● 0.75 1.5 (Note 4) RS ≤ 50k (Note 5) IOS *Input Offset Current (Note 5) IB Input Bias Current (Note 4) *Input Bias Current (Note 5) LT1011C/I/M MIN TYP MAX 0.6 1.5 3 UNITS mV mV 2 3 mV mV 0.2 3 5 0.2 4 6 nA nA 15 25 20 50 nA 20 35 50 25 65 80 nA nA 4 15 4 25 µV/°C ● ● ∆VOS ∆T Input Offset Voltage Drift (Note 6) TMIN ≤ T ≤ TMAX AVOL *Large-Signal Voltage Gain RL = 1k Connected to 15V, –10V ≤ VOUT ≤ 14.5V 200 500 200 500 V/mV RL = 500Ω Connected to 5V, VS = Single 5V, VGND = 0V, 0.5V ≤ VOUT ≤ 4.5V 50 300 50 300 V/mV 94 115 90 115 CMRR ● Common Mode Rejection Ratio *Input Voltage Range (Note 9) VS = ±15V VS = Single 5V ● –14.5 ● 0.5 tD *Response Time (Note 7) VOL *Output Saturation Voltage, VGND = 0 VIN = –5mV, ISINK = 8mA, TJ ≤ 100°C VIN = –5mV, ISINK = 8mA VIN = –5mV, ISINK = 50mA ● ● *Output Leakage Current VIN = 5mV, VGND = –15V, VOUT = 20V ● 13 3 –14.5 0.5 dB 13 3 V V 150 250 150 250 ns 0.25 0.25 0.7 0.4 0.45 1.5 0.25 0.25 0.7 0.4 0.45 1.5 V V V 0.2 10 500 0.2 10 500 nA nA *Positive Supply Current VGND = 0 3.2 4 3.2 4 mA *Negative Supply Current VGND = 0 1.7 2.5 1.7 2.5 mA *Strobe Current (Note 8) Minimum to Ensure Output Transistor is Off, VGND = 0 Input Capacitance 500 500 6 µA 6 pF *Indicates parameters which are guaranteed for all supply voltages, including a single 5V supply. See Note 5. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Inputs may be clamped to supplies with diodes so that maximum input voltage actually exceeds supply voltage by one diode drop. See Input Protection in the Applications Information section. Note 3: TJMAX = 150°C. Note 4: Output is sinking 1.5mA with VOUT = 0V. Note 5: These specifications apply for all supply voltages from a single 5V to ±15V, the entire input voltage range, and for both high and low output states. The high state is ISINK = 100µA, VOUT = (V+ – 1V) and the low state is ISINK = 8mA, VOUT = 0.8V. Therefore, this specification defines a worst-case error band that includes effects due to common mode signals, voltage gain and output load. Note 6: Drift is calculated by dividing the offset voltage difference measured at min and max temperatures by the temperature difference. Note 7: Response time is measured with a 100mV step and 5mV overdrive. The output load is a 500Ω resistor tied to 5V. Time measurement is taken when the output crosses 1.4V. Note 8: Do not short the STROBE pin to ground. It should be current driven at 3mA to 5mA for the shortest strobe time. Currents as low as 500µA will strobe the LT1011A if speed is not important. External leakage on the STROBE pin in excess of 0.2µA when the strobe is “off” can cause offset voltage shifts. Note 9: See graph “Input Offset Voltage vs Common Mode Voltage.” 1011afe 4 For more information www.linear.com/LT1011 LT1011/LT1011A Typical Performance Characteristics Input Offset Current 0.8 35 0.7 30 0.6 25 20 15 0.5 0.4 0.3 10 0.2 5 0.1 0 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 0 Input Characteristics* –15 –20 –25 –30 –35 TA = 25°C –1.5 –2.0 REFERRED TO SUPPLIES 0.4 0.3 NEGATIVE LIMIT 0.2 COLLECTOR OUTPUT RL = 1k 40 30 20 10 EMITTER OUTPUT RL = 600Ω 0.1 –40 –20 –15 –10 –5 0 5 10 INPUT VOLTAGE (V) 15 20 V– –50 –25 OVERDRIVE 20mV 5mV 2mV 3 2 VIN – 500Ω 1 VIN OVERDRIVE 20mV 5mV 2mV 3 2 1 + 0 15V – 5V –15V 0 –15V 100mV 0 INPUT = 100mV STEP 0 0 INPUT = 100mV STEP –100mV 50 100 150 200 250 300 350 400 450 TIME (ns) 1011 G07 0 PIN 1 GROUNDED 0.9 500Ω + 0.5 Collector Output Saturation Voltage 1.0 VS = ±15V 4 5V –0.3 0.1 0.3 –0.1 DIFFERENTIAL INPUT VOLTAGE (mV) 1011 G06 Response Time—Collector Output 5 15V 0 – 0.5 25 50 75 100 125 150 TEMPERATURE (°C) 1011 G05 6 VS = ±15V 4 0 1011 G04 Response Time—Collector Output 5 POSITIVE LIMIT –1.0 1M Transfer Function (Gain) –0.5 –10 6 10k 100k SOURCE RESISTANCE (Ω) 1k 50 SATURATION VOLTAGE (V) –5 Common Mode Limits *EITHER INPUT. REMAINING INPUT GROUNDED. CURRENT FLOWS OUT OF INPUT. VS = ±15V LT1011AM LT1011AC 1 1011 G03 V+ COMMON MODE VOLTAGE (V) INPUT CURRENT (nA) 0 LT1011M LT1011C 1011 G02 1011 G01 5 LM311 (FOR COMPARISON) 10 0.1 25 50 75 100 125 150 TEMPERATURE (°C) OUTPUT VOLTAGE (V) 0 –50 –25 Worst-Case Offset Error 100 EQUIVALENT OFFSET VOLTAGE (mV) IB FLOWS OUT 40 OF INPUTS 0.9 CURRENT (nA) CURRENT (nA) Input Bias Current 45 0.8 TA = 125°C 0.7 TA = 25°C 0.6 0.5 0.4 TA = –55°C 0.3 0.2 0.1 50 100 150 200 250 300 350 400 450 TIME (ns) 1011 G08 0 0 5 10 15 20 25 30 35 40 45 50 SINK CURRENT (mA) 1011 G09 1011afe For more information www.linear.com/LT1011 5 LT1011/LT1011A Typical Performance Characteristics 5mV 2mV 5 – VIN 0 V+ + –5 VOUT –10 2k –15 V– 0 –50 VS = ±15V TA = 25°C –100 0 1 4 3 2 TIME (µs) V+ 15 VIN 10 5 – + 0 VOUT 2k –5 –10 5mV 20mV –15 V– 2mV –100 VS = ±15V TA = 25°C –50 0 0 1 2 TIME (µs) Supply Current vs Supply Voltage 60 0.2 40 20 3 2 1 5 10 15 20 SUPPLY VOLTAGE (V) 25 1011 G13 + 2 + 3 – 4 LT1011 V– TJ = –55°C 2 V+ 8 100 125 VOUT TJ = 25°C TJ = 125°C 1 10 10–8 VOUT = 35V VGND = –15V 10–9 10–10 10–11 25 TJ = 125°C 0.4 TJ = 25°C 0.3 0.2 30 40 20 OUTPUT CURRENT (mA) 50 0 TJ = –55°C 0 1 5 6 3 2 4 INPUT OVERDRIVE (mV) 45 65 85 TEMPERATURE (°C) 105 125 1011 G15 Response Time vs Input Step Size 1000 0.1 0 1011 G12 VS = ±15V 1011 G14 ISINK = 8mA 0.5 7 1 RL 0 Output Leakage Current Output Saturation Voltage 4 3 50 25 75 0 TEMPERATURE (˚C) 0.6 SATURATION VOLTAGE (V) REFERRED TO V+ 15 POSITIVE AND NEGATIVE SUPPLY COLLECTOR OUTPUT “HI” 0 –50 –25 30 Output Saturation— Ground Output 5 10 5 OUTPUT VOLTAGE (V) 0 PROPAGATION DELAY (ns) 0 0.1 *MEASURED 3 MINUTES AFTER SHORT 10–7 POSITIVE SUPPLY COLLECTOR OUTPUT “LO” 0.3 SHORT-CIRCUIT CURRENT LEAKAGE CURRENT (A) CURRENT (mA) CURRENT (mA) POSITIVE AND NEGATIVE SUPPLY COLLECTOR OUTPUT “HI” 2 1 V+ TO GROUND PIN VOLTAGE (V) 0.4 Supply Current vs Temperature 4 0.5 80 5 3 0 100 6 4 0.6 POWER DISSIPATION 1011 G11 5 POSITIVE SUPPLY COLLECTOR OUTPUT “LO” 0.7 TA = 25°C 120 0 4 3 1011 G10 0 Output Limiting Characteristics* 140 SHORT-CIRCUIT CURRENT (mA) 20mV 10 INPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) 15 Response Time Using GND Pin as Output POWER DISSIPATION (W) INPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) Response Time Using GND Pin as Output 7 8 1011 G16 VS = ±15V RL = 500Ω TO 5V OVERDRIVE = 5mV 800 INPUT 600 3 – 2 + 5V 500Ω 7 1 400 RISING INPUT FALLING INPUT 200 0 0 1 2 3 4 5 6 7 INPUT STEP (V) 8 9 10 1011 G18 1011 G17 1011afe 6 For more information www.linear.com/LT1011 LT1011/LT1011A Typical Performance Characteristics 2.5 INPUT OFFSET VOLTAGE (mV) 2.0 CHANGE IN VOS (mV/µA) Input Offset Voltage vs Common Mode Voltage TJ = 25°C 1.5 UPPER COMMON MODE + – (1.5V) LIMIT = V 1.0 0.5 0 Offset Pin Characteristics 0.8 0.6 0.4 0.2 0 –0.5 –150mV –1.0 –1.5 –2.0 –2.5 V– (OR GND WITH SINGLE SUPPLY) V– 0.1 0.2 0.3 0.4 0.5 0.6 0.7 COMMON MODE VOLTAGE (V) CHANGE IN VOS FOR CURRENT INTO PINS 5 OR 6 VOLTAGE ON PINS 5 AND 6 WITH RESPECT TO V+ –100mV –50mV V+ 0 –50 –25 1011 G19 0 25 50 75 100 125 150 TEMPERATURE (°C) 1011 G20 Pin Functions GND (PIN 1): Ground. INPUT+ (PIN 2): Non-Inverting Input of Comparator INPUT– (PIN 3): Inverting Input of Comparator V– (PIN 4): Negative Supply Voltage OUT (PIN 7): Open-Collector Output of Comparator BALANCE (PIN 5): Balance Input. This input can be used to adjust the input voltage offset or to add hysteresis. If offset balancing or hysteresis is not used, the BALANCE pins should be connected together with a 0.1µF capacitor. BALANCE/STROBE (PIN 6): Strobe Input Pin. Using this pin, the output transistor can be forced to an “off” state, giving a “hi” output at the collector (Pin 7). This input can be used to adjust the input voltage offset or used to add hysteresis. If offset balancing or hysteresis is not used, the BALANCE pins should be connected together with a 0.1µF capacitor. V+ (PIN 8): Positive Supply Voltage 1011afe For more information www.linear.com/LT1011 7 LT1011/LT1011A Applications Information Preventing Oscillation Problems Oscillation problems in comparators are nearly always caused by stray capacitance between the output and inputs or between the output and other sensitive pins on the comparator. This is especially true with high gain bandwidth comparators like the LT1011, which are designed for fast switching with millivolt input signals. The gain bandwidth product of the LT1011 is over 10GHz. Oscillation problems tend to occur at frequencies around 5MHz, where the LT1011 has a gain of ≈2000. This implies that attenuation of output signals must be at least 2000:1 at 5MHz as measured at the inputs. If the source impedance is 1kΩ, the effective stray capacitance between output and input must have a reactance of more than (2000)(1kΩ) = 2MΩ, or less than 0.02pF. The actual interlead capacitance between input and output pins on the LT1011 is less than 0.002pF when cut to printed circuit mount length. Additional stray capacitance due to printed circuit traces must be minimized by routing the output trace directly away from input lines and, if possible, running ground traces next to input traces to provide shielding. Additional steps to ensure oscillation-free operation are: 1. Bypass the STROBE/BALANCE pins with a 0.01µF capacitor connected from Pin 5 to Pin 6. This eliminates stray capacitive feedback from the output to the BALANCE pins, which are nearly as sensitive as the inputs. 2.Bypass the negative supply (Pin 4) with a 0.1µF ceramic capacitor close to the comparator. 0.1µF can also be used for the positive supply (Pin 8) if the pull-up load is tied to a separate supply. When the pull-up load is tied directly to Pin 8, use a 2µF solid tantalum bypass capacitor. 3.Bypass any slow moving or DC input with a capacitor (≥0.01µF) close to the comparator to reduce high frequency source impedance. 4.Keep resistive source impedance as low as possible. If a resistor is added in series with one input to balance source impedances for DC accuracy, bypass it with a capacitor. The low input bias current of the LT1011 usually eliminates any need for source resistance balancing. A 5kΩ imbalance, for instance, will create only 0.25mV DC offset. 5.Use hysteresis. This consists of shifting the input offset voltage of the comparator when the output changes state. Hysteresis forces the comparator to move quickly through its linear region, eliminating oscillations by “overdriving” the comparator under all input conditions. Hysteresis may be either AC or DC. AC techniques do not shift the apparent offset voltage of the comparator, but require a minimum input signal slew rate to be effective. DC hysteresis works for all input slew rates, but creates a shift in offset voltage dependent on the previous condition of the input signal. The circuit shown in Figure 1 is an excellent compromise between AC and DC hysteresis. 15V 2µF TANT + 3 INPUTS 2 – + C1 0.003µF 8 6 LT1011 5 7 1 R2 15M RL OUTPUT 4 –15V 0.1µF 1011 F01 Figure 1. Comparator with Hysteresis 1011afe 8 For more information www.linear.com/LT1011 LT1011/LT1011A Applications Information Note that at low frequencies, the error is simply the DC hysteresis, while at high frequencies, an additional error is created by the AC hysteresis. The high frequency error can be reduced by reducing CH, but lower values may not provide clean switching with very low slew rate input signals. Input Protection The inputs to the LT1011 are particularly suited to general purpose comparator applications because large differential and/or common mode voltages can be tolerated without damage to the comparator. Either or both inputs can be raised 40V above the negative supply, independent of the positive supply voltage. Internal forward biased diodes will conduct when the inputs are taken below the negative supply. In this condition, input current must be limited to 1mA. If very large (fault) input voltages must be accommodated, series resistors and clamp diodes should be used (see Figure 3). 8 C8 TO C6 = 0.003µF 7 INPUT OFFSET VOLTAGE (mV) This circuit is especially useful for general purpose comparator applications because it does not force any signals directly back onto the input signal source. Instead, it takes advantage of the unique properties of the BALANCE pins to provide extremely fast, clean output switching even with low frequency input signals in the millivolt range. The 0.003µF capacitor from Pin 6 to Pin 8 generates AC hysteresis because the voltage on the BALANCE pins shifts slightly, depending on the state of the output. Both pins move about 4mV. If one pin (6) is bypassed, AC hysteresis is created. It is only a few millivolts referred to the inputs, but is sufficient to switch the output at nearly the maximum speed of which the comparator is capable. To prevent problems from low values of input slew rate, a slight amount of DC hysteresis is also used. The sensitivity of the BALANCE pins to current is about 0.5mV input referred offset for each microampere of BALANCE pin current. The 15M resistor tied from OUTPUT to Pin 5 generates 0.5mV DC hysteresis. The combination of AC and DC hysteresis creates clean oscillation-free switching with very small input errors. Figure 2 plots input referred error versus switching frequency for the circuit as shown. 6 5 4 3 2 OUTPUT “LO” TO “HI” 1 0 OUTPUT “HI” TO “LO” –1 –2 (50kHz) (5kHz) 10 100 TIME/FREQUENCY (µs) 1 1000 1011 F02 Figure 2. Input Offset Voltage vs Time to Last Transition V+ R1** INPUTS D1 D2 R3* 300Ω 3 R4* 300Ω 2 R2** D3 D4 D1 TO D4: 1N4148 *MAY BE ELIMINATED FOR IFAULT ≤ 1mA **SELECT ACCORDING TO ALLOWABLE FAULT CURRENT AND POWER DISSIPATION – 8 LT1011 + 4 V– 1011 F03 Figure 3. Limiting Fault Input Currents 1011afe For more information www.linear.com/LT1011 9 LT1011/LT1011A Applications Information The input resistors should limit fault current to a reasonable value (0.1mA to 20mA). Power dissipation in the resistors must be considered for continuous faults, especially when the LT1011 supplies are off. One final caution: lightly loaded supplies may be forced to higher voltages by large fault currents flowing through D1-D4. 15V 3 The response time of a comparator is typically measured with a 100mV step and a 5mV to 10mV overdrive. Unfortunately, this does not simulate many real world situations where the step size is typically much larger and overdrive can be significantly less. In the case of the LT1011, step size is important because the slew rate of internal nodes will limit response time for input step sizes larger than 1V. At 5V step size, for instance, response time increases from 150ns to 360ns. See the curve “Response Time vs Input Step Size for more detail. If response time is critical and large input signals are expected, clamp diodes across the inputs are recommended. The slew rate limitation can also affect performance when differential input voltage is low, but both inputs must slew quickly. Maximum suggested common mode slew rate is 10V/µs. + OUTPUT 1 6 TTL OR CMOS DRIVE (5V SUPPLY) –15 3k 1011 F04 Figure 4. Typical Strobe Circuit level inputs. A 1pF capacitor between the output and Pin 5 will greatly reduce oscillation problems without reducing strobe speed. DC hysteresis can also be added by placing a resistor from the output to Pin 5. See step 5 under “Preventing Oscillation Problems.” The pin (6) used for strobing is also one of the offset adjust pins. Current flow into or out of Pin 6 must be kept very low (< 0.2µA) when not strobing to prevent input offset voltage shifts. Output Transistor The LT1011 output transistor is truly floating in the sense that no current flows into or out of either the collector or emitter when the transistor is in the “off” state. The equivalent circuit is shown in Figure 5. V+ Strobing The LT1011 can be strobed by pulling current out of the STROBE pin. The output transistor is forced to an “off” state, giving a “hi” output at the collector (Pin 7). Currents as low as 250µA will cause strobing, but at low strobe currents, strobe delay will be 200ns to 300ns. If strobe current is increased to 3mA, strobe delay drops to about 60ns. The voltage at the STROBE pin is about 150mV below V+ at zero strobe current and about 2V below V+ for 3mA strobe current. Do not ground the STROBE pin. It must be current driven. Figure 4 shows a typical strobe circuit. Note that there is no bypass capacitor between Pins 5 and 6. This maximizes strobe speed, but leaves the comparator more sensitive to oscillation problems for slow, low 10 RL 7 4 R3 and R4 limit input current to the LT1011 to less than 1mA when the input signals are held below V –. They may be eliminated if R1 and R2 are large enough to limit fault current to less than 1mA. Input Slew Rate Limitations 8 – LT1011 2 5V I1 0.5mA D1 D2 COLLECTOR (OUTPUT) Q1 R1 170Ω V– Q2 R2 470Ω OUTPUT TRANSISTOR EMITTER (GND PIN) 1011 F05 Figure 5. Output Transistor Circuitry For more information www.linear.com/LT1011 1011afe LT1011/LT1011A Applications Information is tied to V+, the voltage at the emitter in the “on” state is about 2V below V+ (see curves). In the “off” state, I1 is switched off and both Q1 and Q2 turn off. The collector of Q2 can be now held at any voltage above V – without conducting current, including voltages above the positive supply level. Maximum voltage above V– is 50V for the LT1011M and 40V for the LT1011C/I. The emitter can be held at any voltage between V+ and V– as long as it is negative with respect to the collector. Input Signal Range The common mode input voltage range of the LT1011 is about 300mV above the negative supply and 1.5V below the positive supply, independent of the actual supply voltages (see curve in the Typical Performance Characteristics). This is the voltage range over which the output will respond correctly when the common mode voltage is applied to one input and a higher or lower signal is applied to the remaining input. If one input is inside the common mode range and one is outside, the output will be correct. If the inputs are outside the common mode range in opposite directions, the output will still be correct. If both inputs are outside the common mode range in the same direction, the output will not respond to the differential input; for temperatures of 25°C and above, the output will remain unconditionally high (collector output), for temperatures below 25°C, the output becomes undefined. In the “on” state, I1 is connected, turning on Q1 and Q2. Diodes D1 and D2 prevent deep saturation of Q2 to improve speed and also limit the drive current of Q1. The R1/R2 divider sets the saturation voltage of Q2 and provides turnoff drive. Either the collector or emitter pin can be held at a voltage between V+ and V–. This allows the remaining pin to drive the load. In typical applications, the emitter is connected to V– or ground and the collector drives a load tied to V+ or a separate positive supply. When the emitter is used as the output, the collector is typically tied to V + and the load is connected to ground or V–. Note that the emitter output is phase reversed with respect to the collector output so that the “+” and “–” input designations must be reversed. When the collector Typical Applications Offset Balancing Driving Load Referenced to Positive Supply R2 3k 5 2 3 + V+ 3 R1 20k V+ 6 LT1011 2 8 LT1011 + V 1011 TA03 7 V+ 2 RLOAD INPUTS* 1 4 7 – V++ 8 – Driving Load Referenced to Negative Supply 3 V 8 – 7 LT1011 1 + RLOAD 4 V OR GROUND V++ CAN BE GREATER OR LESS THAN V+ 1011 TA05 V 1011 TA06 *INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT 1011afe For more information www.linear.com/LT1011 11 LT1011/LT1011A Typical Applications Strobing 2 3 Driving Ground Referred Load V++** V+ + 7 LT1011 – 2 6 INPUTS* TTL STROBE 3 V+ LT1011 + V– 7 3 1 L1 NOTE: DO NOT GROUND STROBE PIN 2 1011 TA07 2 D2 D1 3 VOLTAGE INPUT + 7 LT1011 LT1011 – OUTPUT HIGH INSIDE “WINDOW” AND LOW ABOVE HIGH LIMIT OR BELOW LOW LIMIT 1 + 7 LT1011 – 1 Crystal Oscillator 5V 10k OUTPUT 2 85kHz 100pF 1k 8 + 50k 7 LT1011 3 GROUND OR LOW IMPEDANCE REFERENCE *SEE CURVE, “RESPONSE TIME vs INPUT STEP SIZE” 7 1011 TA08 – R1 3 LOW LIMIT Using Clamp Diodes to Improve Frequency Response* CURRENT MODE INPUT (DAC, ETC) RL + VIN *INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT **V++ MAY BE ANY VOLTAGE ABOVE V–. PIN 1 SWINGS TO WITHIN ≈2V OF V++ 1011 TA04 2 HIGH LIMIT 8 – 4 1k Window Detector OUT 4 – 1 10k 1011 TA09 10k 1011 TA10 Noise Immune 60Hz Line Sync** High Efficiency** Motor Speed Controller 5V 60Hz INPUT 2VRMS TO 25VRMS R2 75k C1 50µF + R1 1k Q1 2N6667 5V R1* 330k 3 C1 0.22µF 2 8 – LT1011 + 4 5V 15V R3 1k R6 27k 7 1N4002 OUTPUT 60Hz 1 MOTOR-TACH GLOBE 397A120-2 R2 470Ω R4 27k R3* 10k MOTOR TACH 15V 1011 TA11 R5 10k 8 *INCREASE R1 FOR LARGER INPUT VOLTAGES **LT1011 SELF OSCILLATES AT ≈60Hz CAUSING IT TO “LOCK” ONTO INCOMING LINE SIGNAL 7 + LT1011 1 – 2 3 C2* 0.1µF R5 100k R6 2k C3 0.1µF R7 1k 1011 TA12 R4 1k 4 *R3/C2 DETERMINES OSCILLATION –5V TO FREQUENCY OF CONTROLLER –15V 0V TO 10V **Q1 OPERATES IN SWITCH MODE INPUT 1011afe 12 For more information www.linear.com/LT1011 LT1011/LT1011A Typical Applications Combining Offset Adjust and Strobe Combining Offset Adjustment and Hystersis V+ 10k 3 2 + RH* 2RH** 20k 5 – V+ 5k 6 LT1011 3 TTL OR CMOS 5V 2 1k – 5 + *HYSTERESIS IS ≈0.45mV/µA OF CURRENT CHANGE IN RH RL **THIS RESISTOR CAUSES HYSTERESIS TO BE CENTERED AROUND VOS 20k 6 LT1011 7 1011 TA15 1 1011 TA13 Direct Strobe Drive When CMOS* Logic Uses Same V + Supply as LT1011 Low Drift R/C Oscillator † V+ 3 2 + ** 8 – 2 6 LT1011 15V C1 0.015µF 1011 TA14 3 *NOT APPLICABLE FOR TTL LOGIC 15V 8 + 1k 74HC04 ×6 7 LT1011 BUFFERED OUTPUT 4 – 1 Positive Peak Detector 15V INPUT *** 2k 3 2 10k* 10k* 8 + 7 LT1011 2 1 – 4 10k 3 1M** + C1* 2µF – 6 LT1008 + OUTPUT 8 100pF 15V *1% METAL FILM 10k* **TRW TYPE MTR-5/120ppm/°C, 25k ≤ RS ≤ 200k C1: 0.015µF = POLYSTYRENE, –120ppm/°C, 1011 TA16 ±30ppm WESCO TYPE 32-P NOTE: COMPARATOR CONTRIBUTES ≤10ppm/°C DRIFT FOR FREQUENCIES BELOW 10kHz † LOW DRIFT AND ACCURATE FREQUENCY ARE OBTAINED BECAUSE THIS CONFIGURATION REJECTS EFFECTS DUE TO INPUT OFFSET VOLTAGE AND BIAS CURRENT OF THE COMPARATOR 1011 TA17 –15V *MYLAR **SELECT FOR REQUIRED RESET TIME CONSTANT ***INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT Negative Peak Detector 15V 2 1M** INPUT 2k 3 2 8 – LT1011 1 + 4 –15V 10k 7 + C1* 2µF 3 – LT1008 + 100pF 6 OUTPUT 8 1011 TA18 *MYLAR **SELECT FOR REQUIRED RESET TIME CONSTANT 1011afe For more information www.linear.com/LT1011 13 LT1011/LT1011A Typical Applications 4-Digit (10,000 Count) A/D Converter 15V ZERO TRIM R1 1k 1 3 R2 18k R3 3.9k 8 4 C4 0.01µF –15V R4 5.6k 8 D1 D2 C1* 0.1µF C2** 15pF R8 3k 15V D3 D4 R7 22Ω 5V C5 0.01µF + 6 LT1011 3 6 7 15V R5 4.7k 2 2 5 LF398 5V INPUT 0V TO 10V R6 4.7K 7 1 – OUTPUT = 1 COUNT PER mV, f = 1MHz CLOCK 1MHz 4 –15V 15V C3 0.1µF R11 6.8K R10 1k R9 FULL-SCALE 3.65k TRIM 2N3904 LM329 R12 6.8k C6 50pF ALL DIODES: 1N4148 *POLYSTYRENE **NPO 1011 TA19 START ≥12ms Capacitance to Pulse Width Converter TH ≥ [CMAX (pF)][1µs/pF] TL ≥ 10 • CMAX • (1µs/pF) D1 TTL OR CMOS (OPERATING ON 5V) R2 R1 100k 5k R3 86.6k + GAIN ADJ 5V 2 8 0.01µF + 10µF† LT1011 3 C** 6 1 – 4 7 ( ) *PW = (R2 + R3)(C) R1 + R4 , INPUT CAPACITANCE OF R1 LT1011 IS ≈6pF. THIS IS AN OFFSET TERM. R5 4.7k OUTPUT 1µs/pF ** TYPICAL 2 SECTIONS OF 365pF VARIABLE CAPACITOR WHEN USED AS SHAFT ANGLE INDICATION †THESE COMPONENTS MAY BE ELIMINATED IF NEGATIVE SUPPLY IS AVAILABLE (–1V TO –15V) D3† + D2† 10µF† 1011 TA20 1011afe 14 For more information www.linear.com/LT1011 LT1011/LT1011A Typical Applications Fast Settling Filter 100pF 1M 15V 2 1M 4.7k VIN 3 –15V 15V 100k 2 –15V 8 3 1 100pF 1.5k 7 1 LT1011 OUTPUT 8 1µF OFM-1A 4 – 6 LT1008C 4 4.7k 0.1µF 7 5 + 6 INPUT* 15V 15V 3 2 COMPARATORS DRIVE OPTO-COUPLED FET “ON” WHEN DIFFERENCE BETWEEN OUTPUT AND INPUT EXCEEDS THRESHOLD. WHEN OUTPUT APPROACHES INPUT, THE GATE TURNS “OFF” AND LOW PASS FILTERING OCCURS. 5k THRESHOLD 5k 6 + 5 1 LT1011 – *INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT 7 8 4 10k –15V 15V 1011 TA21 100kHz Precision Rectifier 0.033µF 5V AC INPUT 100Ω 5k ZERO CROSS TRIM 2 3 5V 8 + LT1011 – 1 4 5V 1k 7 5V 74C04 12k 820Ω HP5082-2800 ×4 RECTIFIED OUTPUT –5V 5V –5V 1k 820Ω 74C04 –5V 12k –5V 1011 TA23 1011afe For more information www.linear.com/LT1011 15 LT1011/LT1011A Schematic Diagram OFFSET OFFSET/STROBE V+ 5 6 8 R8 800Ω Q6 R27 3k R4 300Ω R5 160Ω 2 R2 1.3k Q10 R3 300Ω R23 4k Q11 Q5 Q31 INPUT (+) R1 1.3k R9 800Ω D1 D2 Q30 Q29 Q12 R6 3.2k R7 3.2k D4 D6 Q13 Q7 Q8 Q14 Q3 INPUT (–) Q9 Q19 3 Q27 D5 D7 Q26 Q23 R26 1.6k R19 500Ω 7 R12 470Ω R17 200Ω Q21 R20 940Ω Q22 R25 1.6k OUTPUT Q15 Q4 Q2 Q25 R11 170Ω Q20 R22 200Ω Q1 Q28 R10 4k R21 960Ω R18 275Ω R16 Q24 800Ω Q16 R24 400Ω R15 700Ω R13 4Ω 1 Q18 GND R14 4.8k D3 Q17 4 V– 1011 SD 1011afe 16 For more information www.linear.com/LT1011 LT1011/LT1011A Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. H Package 8-Lead TO-5 Metal Can (.230 Inch PCD) (Reference LTC DWG # 05-08-1321) 0.040 (1.016) MAX OBSOLETE PACKAGE 0.335 – 0.370 (8.509 – 9.398) DIA 0.305 – 0.335 (7.747 – 8.509) 0.027 – 0.045 (0.686 – 1.143) 45°TYP 0.050 (1.270) MAX SEATING PLANE 0.165 – 0.185 (4.191 – 4.699) GAUGE PLANE 0.010 – 0.045* (0.254 – 1.143) PIN 1 0.028 – 0.034 (0.711 – 0.864) 0.230 (5.842) TYP REFERENCE PLANE 0.500 – 0.750 (12.700 – 19.050) H8 (TO-5) 0.230 PCD 1197 0.110 – 0.160 (2.794 – 4.064) INSULATING STANDOFF 0.016 – 0.021** (0.406 – 0.533) *LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE AND 0.045" BELOW THE REFERENCE PLANE 0.016 – 0.024 **FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS (0.406 – 0.610) J8 Package 8-Lead CERDIP (Narrow .300 Inch, Hermetic) (Reference LTC DWG # 05-08-1110) OBSOLETE PACKAGE CORNER LEADS OPTION (4 PLCS) 0.023 – 0.045 (0.584 – 1.143) HALF LEAD OPTION 0.045 – 0.068 (1.143 – 1.727) FULL LEAD OPTION 0.005 (0.127) MIN 0.405 (10.287) MAX 8 7 6 5 0.025 (0.635) RAD TYP 0.220 – 0.310 (5.588 – 7.874) 1 0.300 BSC (0.762 BSC) 2 3 4 0.200 (5.080) MAX 0.015 – 0.060 (0.381 – 1.524) 0.008 – 0.018 (0.203 – 0.457) 0° – 15° NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS 0.045 – 0.065 (1.143 – 1.651) 0.014 – 0.026 (0.360 – 0.660) 0.100 (2.54) BSC 0.125 3.175 MIN J8 1298 1011afe For more information www.linear.com/LT1011 17 LT1011/LT1011A Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. N8 Package 8-Lead PDIP (Narrow .300 Inch) (Reference LTC DWG # 05-08-1510) .300 – .325 (7.620 – 8.255) .045 – .065 (1.143 – 1.651) .065 (1.651) TYP .008 – .015 (0.203 – 0.381) ( +.035 .325 –.015 +0.889 8.255 –0.381 ) .400* (10.160) MAX .130 ± .005 (3.302 ± 0.127) 8 7 6 5 1 2 3 4 .255 ± .015* (6.477 ± 0.381) .120 (3.048) .020 MIN (0.508) MIN .018 ± .003 (0.457 ± 0.076) .100 (2.54) BSC N8 1002 NOTE: 1. DIMENSIONS ARE INCHES MILLIMETERS *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .189 – .197 (4.801 – 5.004) NOTE 3 .050 BSC .045 ±.005 .010 – .020 × 45° (0.254 – 0.508) .008 – .010 (0.203 – 0.254) .245 MIN NOTE: 1. DIMENSIONS IN .030 ±.005 TYP 0°– 8° TYP .016 – .050 (0.406 – 1.270) .160 ±.005 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 8 7 6 5 .004 – .010 (0.101 – 0.254) .050 (1.270) BSC .150 – .157 (3.810 – 3.988) NOTE 3 .228 – .244 (5.791 – 6.197) 1 2 3 4 SO8 0303 RECOMMENDED SOLDER PAD LAYOUT 1011afe 18 For more information www.linear.com/LT1011 LT1011/LT1011A Revision History (Revision history begins at Rev D) REV DATE DESCRIPTION D 10/12 Update to Product Description 1 Addition of Order Information 2, 3 E 4/13 PAGE NUMBER Addition of Pin Function Information 7 Correction to Positive Peak Detector Circuit 13 Correction to Pin Function descriptions 2, 7 Correction to Order Information and Obsolete Packages 3 Correction to Graphs: Response Time—Collector Output – high to low Response Time Using GND Pin as Output – low to high Response Time Using GND Pin as Output – high to low Output Saturation—Ground Output 5, 6 Correction to input pin polarity 10, 13, 15 1011afe Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT1011 19 LT1011/LT1011A Typical Application 10Hz to 100kHz Voltage to Frequency Converter R7 4.7k R4 1M 15V C1 0.002µF POLYSTYRENE R1 4.7k INPUT 0V TO 10V LT1009 2.5V 15V R2 5k FULL-SCALE R3 TRIM 8.06k R5 2k 15V 3 C2 0.68µF 15V R16 50k 10Hz TRIM 15V R17† 22M 2 R6 2k LINEARITY ≈0.01% 8 – LT1011 + R8 4.7k 7 1 –15V 4 1.5µs 6 4.4V –15V 0.002µF –15V 15V –15V R11 20k 10pF ALL DIODES 1N4148 TRANSISTORS 2N3904 *USED ONLY TO GUARANTEE START-UP † MAY BE INCREASED FOR BETTER 10Hz TRIM RESOLUTION R15 22k R14 1k Q1* 15V R9 5k Q2 R12 100k + 2µF TTL OUTPUT 10HZ TO 100kHz 1.5µs R10 2.7k 1011 TA22 R13 620k –15V Related Parts PART NUMBER DESCRIPTION COMMENTS LT1016 UltraFast™ Precision Comparator Industry Standard 10ns Comparator LT1116 12ns Single Supply Ground-Sensing Comparator Single Supply Version of the LT1016 LT1394 UltraFast Single Supply Comparator 7ns, 6mA Single Supply Comparator LT1671 60ns, Low Power Comparator 450µA Single Supply Comparator UltraFast is a trademark of Linear Technology Corporation. 1011afe 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT1011 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT1011 LT 0413 REV E • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 1991