LINER LT3015MPQ

LT3015
1.5A, Low Noise,
Negative Linear Regulator
with Precision Current Limit
DESCRIPTION
FEATURES
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Output Current: 1.5A
Dropout Voltage: 310mV
Precision Current Limit with Foldback
Low Output Noise: 60μVRMS (10Hz to 100kHz)
Low Quiescent Current: 1.1mA
Precision Positive or Negative Shutdown Logic
Fast Transient Response
Wide Input Voltage Range: –1.8V to –30V
Adjustable Output Voltage Range: –1.22V to –29.5V
Controlled Quiescent Current in Dropout
< 1μA Quiescent Current in Shutdown
Stable with 10μF Output Capacitor
Stable with Ceramic, Tantalum or Aluminum Capacitors
Thermal Limit with Hysteresis
Reverse Output Protection
5-Lead TO-220 and DD-Pak, Thermally Enhanced
12-Lead MSOP and 8-Lead 3mm × 3mm × 0.75mm
DFN Packages
APPLICATIONS
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The LT®3015 is a low noise, low dropout, negative linear
regulator with fast transient response. The device supplies
up to 1.5A of output current at a typical dropout voltage
of 310mV. Operating quiescent current is typically 1.1mA
and drops to < 1μA in shutdown. Quiescent current is also
well controlled in dropout. In addition to fast transient
response, the LT3015 exhibits very low output noise,
making it ideal for noise sensitive applications.
The LT3015 regulator is stable with a minimum 10μF output
capacitor. Moreover, the regulator can use small ceramic
capacitors without the necessary addition of ESR as is
common with other regulators. Internal protection circuitry
includes reverse output protection, precision current limit
with foldback and thermal limit with hysteresis.
The LT3015 is available as an adjustable device with a
–1.22V reference voltage. Packages include the 5-lead
TO-220 and DD-Pak, a thermally enhanced 12-lead MSOP
and the low profile (0.75 mm) 8-lead 3mm × 3mm DFN.
L, LT, LTC, LTM, ThinSOT, Linear Technology and the Linear logo are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
Post-Regulator for Switching Supplies
Negative Logic Supplies
Low Noise Instrumentation
Industrial Supplies
Negative Complement to the LT1963A
Dropout Voltage
TYPICAL APPLICATION
450
–5V, –1.5A, Low-Noise Regulator
10μF
SHDN
VIN
–5.5V TO
–30V
3.40k
1%
10μF
ADJ
10.5k
1%
IN
OUT
3015 TA01
VOUT
–5V
–1.5A
DROPOUT VOLTAGE (mV)
GND
LT3015
TJ = 25°C
400
350
300
DD-PAK/TO-220
250
200
DFN/MSOP
150
100
50
0
0
–0.2 –0.4 –0.6 –0.8 –1.0 –1.2 –1.4 –1.6
LOAD CURRENT (A)
3015 TA01a
3015f
1
LT3015
ABSOLUTE MAXIMUM RATINGS
(Note 1)
IN Pin Voltage .........................................................±33V
OUT Pin Voltage (Note 10) ......................................±33V
OUT to IN Differential Voltage (Note 10) ........–0.3V, 33V
ADJ Pin Voltage
(with Respect to IN Pin) (Note 10) .............–0.3V, 33V
SHDN Pin Voltage
(with Respect to IN Pin) (Note 10) .............–0.3V, 55V
SHDN Pin Voltage
(with Respect to GND Pin) ..........................–33V, 22V
Output Short-Circuit Duration .......................... Indefinite
Operating Junction Temperature Range (Note 9)
E-, I-Grade ........................................ –40°C to 125°C
MP-Grade ......................................... –55°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10Sec)
MS12E Package ................................................ 300°C
Q, T Packages ................................................... 250°C
PIN CONFIGURATION
TOP VIEW
IN
1
IN
2
SHDN
3
GND
4
TOP VIEW
IN
IN
IN
IN
SHDN
GND
8 OUT
7 OUT
9
IN
6 ADJ
5 GND
DD PACKAGE
8-LEAD (3mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 40°C/W, θJC = 7.5°C/W
EXPOSED PAD (PIN 9) IS IN, MUST BE SOLDERED TO PCB
12
11
10
9
8
7
13
IN
OUT
OUT
OUT
OUT
ADJ
GND
MSE PACKAGE
12-LEAD PLASTIC MSOP
TJMAX = 125°C, θJA = 37°C/W, θJC = 10°C/W
EXPOSED PAD (PIN 13) IS IN, MUST BE SOLDERED TO PCB
FRONT VIEW
TAB IS IN
1
2
3
4
5
6
FRONT VIEW
5
OUT
5
OUT
4
ADJ
4
ADJ
3
IN
3
IN
2
GND
2
GND
1
SHDN
1
SHDN
Q PACKAGE
5-LEAD PLASTIC DD-PAK
TJMAX = 125°C, θJA = 14°C/W, θJC = 3°C/W
TAB IS IN
T PACKAGE
5-LEAD PLASTIC TO-220
TJMAX = 125°C, θJA = 50°C/W, θJC = 3°C/W
3015f
2
LT3015
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3015EDD#PBF
LT3015EDD#TRPBF
LFXS
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT3015IDD#PBF
LT3015IDD#TRPBF
LFXS
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT3015EMSE#PBF
LT3015EMSE#TRPBF
3015
12-Lead Plastic MSOP
–40°C to 125°C
LT3015IMSE#PBF
LT3015IMSE#TRPBF
3015
12-Lead Plastic MSOP
–40°C to 125°C
LT3015MPMSE#PBF
LT3015MPMSE#TRPBF
3015
12-Lead Plastic MSOP
–55°C to 125°C
LT3015EQ#PBF
LT3015EQ#TRPBF
LT3015Q
5-Lead Plastic DD-Pak
–40°C to 125°C
LT3015IQ#PBF
LT3015IQ#TRPBF
LT3015Q
5-Lead Plastic DD-Pak
–40°C to 125°C
LT3015MPQ#PBF
LT3015MPQ#TRPBF
LT3015Q
5-Lead Plastic DD-Pak
–55°C to 125°C
LT3015ET#PBF
LT3015ET#TRPBF
LT3015T
5-Lead Plastic TO-220
–40°C to 125°C
LT3015IT#PBF
LT3015IT#TRPBF
LT3015T
5-Lead Plastic TO-220
–40°C to 125°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3015EDD
LT3015EDD#TR
LFXS
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT3015IDD
LT3015IDD#TR
LFXS
8-Lead (3mm × 3mm) Plastic DFN
–40°C to 125°C
LT3015EMSE
LT3015EMSE#TR
3015
12-Lead Plastic MSOP
–40°C to 125°C
LT3015IMSE
LT3015IMSE#TR
3015
12-Lead Plastic MSOP
–40°C to 125°C
LT3015MPMSE
LT3015MPMSE#TR
3015
12-Lead Plastic MSOP
–55°C to 125°C
LT3015EQ
LT3015EQ#TR
LT3015Q
5-Lead Plastic DD-Pak
–40°C to 125°C
LT3015IQ
LT3015IQ#TR
LT3015Q
5-Lead Plastic DD-Pak
–40°C to 125°C
LT3015MPQ
LT3015MPQ#TR
LT3015Q
5-Lead Plastic DD-Pak
–55°C to 125°C
LT3015ET
LT3015ET#TR
LT3015T
5-Lead Plastic TO-220
–40°C to 125°C
LT3015IT
LT3015IT#TR
LT3015T
5-Lead Plastic TO-220
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER
CONDITIONS
Minimum IN Pin Voltage (Note 11) ILOAD = –0.5A
ILOAD = –1.5A
MIN
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ADJ Pin Voltage (Notes 2, 3)
VIN = –2.3V, ILOAD= –1mA
–30V < VIN < –2.3V, –1.5A < ILOAD < –1mA
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Line Regulation (Note 2)
ΔVIN = –2.3V to –30V, ILOAD = –1mA
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Load Regulation (Note 2)
VIN = –2.3V, ΔILOAD = –1mA to –1.5A
VIN = –2.3V, ΔILOAD = –1mA to –1.5A
l
–1.208
–1.196
TYP
MAX
UNITS
–1.75
–1.8
–2.3
–1.22
–1.22
–1.232
–1.244
2.5
6
mV
2
3.8
9
mV
mV
V
V
V
3015f
3
LT3015
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
PARAMETER
CONDITIONS
Dropout Voltage
VIN = VOUT(NOMINAL)
(Notes 4, 5)
ILOAD = –1mA
ILOAD = –1mA
ILOAD = –100mA
ILOAD = –100mA
ILOAD = –500mA (DFN/MSOP)
ILOAD = –500mA (DFN/MSOP)
ILOAD = –500mA (DD-PAK/TO-220)
ILOAD = –500mA (DD-PAK/TO-220)
ILOAD = –1.5A (DFN/MSOP)
ILOAD = –1.5A (DFN/MSOP)
ILOAD = –1.5A (DD-PAK/TO-220)
ILOAD = –1.5A (DD-PAK/TO-220)
MIN
l
0.31
l
0.41
l
l
l
l
l
l
COUT = 10μF, ILOAD = –1.5A, BW = 10Hz to 100kHz
ADJ Pin Bias Current
(Notes 2, 7)
VIN = –2.3V
Shutdown Threshold (Note 11)
VOUT = Off-to-On (Positive)
VOUT = Off-to-On (Negative)
VOUT = On-to-Off (Positive)
VOUT = On-to-Off (Negative)
SHDN Pin Current (Note 8)
V
V
V
V
V
V
V
V
V
V
V
V
0.2
l
Output Voltage Noise
UNITS
0.17
l
ILOAD = 0mA
ILOAD = –1mA
ILOAD = –100mA
ILOAD = –500mA
ILOAD = –1.5A
MAX
0.095
0.16
0.16
0.24
0.23
0.32
0.27
0.39
0.39
0.5
0.51
0.68
0.1
l
GND Pin Current
VIN = VOUT(NOMINAL)
(Notes 4, 6)
TYP
0.055
1.1
1.15
2.9
9.5
35
2.4
2.5
7.0
23
70
60
mA
mA
mA
mA
mA
μVRMS
–200
30
200
nA
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l
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1.07
–1.34
0.5
1.21
–1.20
0.73
–0.73
1.35
–1.06
–0.5
V
V
V
V
VSHDN = 0V
VSHDN = 15V
VSHDN = –15V
l
l
l
–1.0
0
17
–2.8
10
27
–4.5
μA
μA
μA
Quiescent Current in Shutdown
VIN = –6V, SHDN = 0V
l
0.01
6
μA
Ripple Rejection
VIN - VOUT = –1.5V (Avg), VRIPPLE = 0.5VP-P
fRIPPLE = 120Hz, ILOAD = –1.5A
Current Limit
VIN = –2.3V, VOUT = 0V
VIN = –2.3V, ΔVOUT = 0.1V
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Input Reverse Leakage Current
VIN = 30V, VOUT, VADJ, VSHDN = Open Circuit
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Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. The LT3015 is tested and specified for these conditions with the
ADJ pin connected to the OUT pin.
Note 3. Maximum junction temperature limits operating conditions. The
regulated output voltage specification does not apply for all possible
combinations of input voltage and output current. If operating at maximum
output current, limit the input voltage range. If operating at maximum
input voltage, limit the output current range.
Note 4. To satisfy minimum input voltage requirements, the LT3015 is
tested and specified for these conditions with an external resistor divider
(54.9k top, 49.9k bottom) for an output voltage of –2.56V. The external
resistor adds 25μA of DC load on the output.
Note 5. Dropout voltage is the minimum input-to-output voltage
differential needed to maintain regulation at a specified output current. In
dropout, the output voltage is: VIN + VDROPOUT.
55
65
dB
1.8
1.75
2.0
1.95
2.2
2.15
A
A
1.55
1.7
mA
Note 6. GND pin current is tested with VIN = VOUT(NOMINAL) and a current
source load. Therefore, the device is tested while operating in dropout.
This is the worst-case GND pin current. GND pin current decreases slightly
at higher input voltages.
Note 7. Positive ADJ pin bias current flows into the ADJ pin.
Note 8. Positive SHDN pin current flows into the SHDN pin.
Note 9. The LT3015 is tested and specified under pulsed load conditions
such that TJ ≅ TA. The LT3015E is guaranteed to meet performance
specifications from 0°C to 125°C junction temperature. Specifications over
the –40°C to 125°C operating temperature range are assured by design,
characterization, and correlation with statistical process controls. The
LT3015I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT3015MP is 100% tested and guaranteed over
the full –55°C to 125°C operating junction temperature range.
Note 10. Parasitic diodes exist internally between the OUT, ADJ, SHDN pins
and the IN pin. Do not drive the OUT, ADJ, and SHDN pins more that 0.3V
below the IN pin during fault conditions, and these pins must remain at a
voltage more positive than IN during normal operation.
Note 11. The SHDN threshold must be met to ensure device operation.
3015f
4
LT3015
TYPICAL PERFORMANCE CHARACTERISTICS
Typical Dropout Voltage
(DFN/MSOP)
TA = 25°C, unless otherwise noted.
Guaranteed Dropout Voltage
(DFN/MSOP)
450
Dropout Voltage (DFN/MSOP)
600
500
450
400
300
250
200
150
125°C
25°C
–40°C
–55°C
100
50
TJ ≤ 125°C
400
300
TJ ≤ 25°C
200
–0.2 –0.4 –0.6 –0.8 –1 –1.2 –1.4 –1.6
OUTPUT CURRENT (A)
0
200
125°C
25°C
–40°C
–55°C
500
TJ ≤ 125°C
600
500
400
TJ ≤ 25°C
300
200
0
–0.2 –0.4 –0.6 –0.8 –1 –1.2 –1.4 –1.6
OUTPUT CURRENT (A)
300
IL = –0.5A
200
IL = –1mA
3015 G05
Quiescent Current
3015 G06
LT3015 ADJ Pin Voltage
LT3015 Output Voltage
–1.244
–1.4
–1.238
–1.2
–5.100
VIN = –2.3V
IL = –1mA
–5.075
ADJ PIN VOLTAGE (V)
OUTPUT VOLTAGE (V)
–1.232
VIN = –6V
–0.4 RL = 120kΩ, IL = –10μA
VOUT = –1.22V
–1.226
–1.220
–1.214
–1.208
–1.202
–0.2
VSHDN = 0V
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3015 G07
IL = –0.1A
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
–0.2 –0.4 –0.6 –0.8 –1 –1.2 –1.4 –1.6
OUTPUT CURRENT (A)
3015 G04
–0.6
IL = –1.5A
400
= TEST POINTS
0
–0.8
IL = –1mA
100
100
0
VSHDN = VIN
IL = –0.1A
Dropout Voltage (DD-PAK/TO-220)
DROPOUT VOLTAGE (mV)
300
IL = –0.5A
150
600
700
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
200
3015 G03
800
500
QUIESCENT CURRENT (mA)
250
Guaranteed Dropout Voltage
(DD-PAK/TO-220)
600
0
300
3015 G02
Typical Dropout Voltage
(DD-PAK/TO-220)
400
IL = –1.5A
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
–0.2 –0.4 –0.6 –0.8 –1 –1.2 –1.4 –1.6
OUTPUT CURRENT (A)
3015 G01
100
350
50
= TEST POINTS
0
0
400
100
100
0
–1
DROPOUT VOLTAGE (mV)
350
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
500
VIN = –5.5V
IL = –1mA
VOUT = –5V
–5.050
–5.025
–5.000
–4.975
–4.950
–1.196
–4.925
–1.192
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
–4.900
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3015 G08
3015 G09
3015f
5
LT3015
TYPICAL PERFORMANCE CHARACTERISTICS
LT3015 Quiescent Current
LT3015 Quiescent Current
–1.2
–25
–0.6
TJ = 25°C
VOUT = –1.22V
RL = 121kΩ
–0.2
–0.8
–0.6
TJ = 25°C
VOUT = –5V
RL = 499kΩ
–0.4
GND PIN CURRENT (mA)
–0.8
QUIESCENT CURRENT (mA)
VSHDN = 0V
0
–1 –2 –3 –4 –5 –6 –7 –8 –9 –10
INPUT VOLTAGE (V)
LT3015 GND Pin Current
RL = 10Ω
IL = –0.5A*
RL = 50Ω
IL = –0.1A*
RL = 5kΩ
IL = –1mA*
1.4
VIN = –2.3V
VOUT = –1.22V
TJ = –55°C
–25
TJ = –40°C
–20
–15
–10
TJ = 25°C
–5
5
POSITIVE SHDN PIN THRESHOLD (V)
RL = 3.3Ω
IL = –1.5A*
–30
GND PIN CURRENT (mA)
30
TJ = 125°C
–1 –2 –3 –4 –5 –6 –7 –8 –9 –10
INPUT VOLTAGE (V)
TURN ON THRESHOLD
20
–0.4
–0.2
SHDN PIN CURRENT (μA)
–1.2
–0.6
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3015 G16
0.6
0.4
0.2
SHDN Pin Input Current
24
VIN = –30V
POSITIVE CURRENT FLOWS
INTO THE PIN
21
15
10
5
0
–5
VIN = –2.3V
TURN OFF THRESHOLD
3015 G15
25
TURN OFF THRESHOLD
0.8
SHDN Pin Input Current
Negative SHDN Pin Thresholds
–1.4
–0.8
1.0
3015 G14
3015 G13
–1.0
TURN ON THRESHOLD
1.2
VIN = –2.3V
0.0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
0
0.0 –0.2 –0.4 –0.6 –0.8 –1.0 –1.2 –1.4 –1.6
OUTPUT CURRENT (A)
0
0
–1 –2 –3 –4 –5 –6 –7 –8 –9 –10
INPUT VOLTAGE (V)
Positive SHDN Pin Thresholds
GND Pin Current vs ILOAD
TJ = 25°C
VSHDN = VIN
*FOR VOUT = –5V
10
RL = 12Ω
IL = –0.1A*
3015 G12
–35
15
RL = 1.2kΩ
IL = –1mA*
3015 G10
40
20
RL = 2.4Ω
IL = –0.5A*
0
–1 –2 –3 –4 –5 –6 –7 –8 –9 –10
INPUT VOLTAGE (V)
3015 G10
25
–10
0
0
35
RL = 0.81Ω
IL = –1.5A*
–15
VSHDN = 0V
0
0
–20
–5
–0.2
SHDN PIN CURRENT (μA)
QUIESCENT CURRENT (mA)
–1.0
–0.4
TJ = 25°C
VSHDN = VIN
*FOR VOUT = –1.22V
VSHDN = VIN
–1.0
GND PIN CURRENT (mA)
LT3015 GND Pin Current
–1.2
VSHDN = VIN
NEGATIVE SHDN PIN THRESHOLD (V)
TA = 25°C, unless otherwise noted.
125°C
25°C
–55°C
–10
–30 –25 –20 –15 –10 –5 0 5 10 15 20 25
SHDN PIN VOLTAGE (V)
3015 G17
18
15
VIN = –15V
POSITIVE CURRENT FLOWS
INTO THE PIN
VSHDN = 15V
12
9
6
3
0
VSHDN = –15V
–3
–6
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3015 G18
3015f
6
LT3015
TYPICAL PERFORMANCE CHARACTERISTICS
ADJ Pin Bias Current
ADJ Pin Bias Current
200
–10.0
50
0
–50
–100
VIN = –2.3V
POSITIVE CURRENT FLOWS
INTO THE PIN
70
–8.0
LINE REGULATION (mV)
100
60
50
40
Load Regulation
VOUT = –1.22V
–16
–20
–24
–1.6
–2.0
–1.8
CURRENT LIMIT (A)
CURRENT LIMIT (A)
LOAD REGULATION (mV)
–8
Current Limit vs Temperature
–2.2
125°C
25°C
–55°C
–2.0
VOUT = –5V
–28 VIN = VOUT(NOMINAL) –1V
ΔIL = –1mA TO –1.5A
–32
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
–1.4
–1.2
–1.0
–0.8
–0.6
–1.4
–1.2
–1.0
–0.8
–0.6
–0.2
VOUT = 0V
0.0
0
–5
–10
–15
–20
–25
INPUT/OUTPUT DIFFERENTIAL (V)
3015 G27
LT3015 Input Ripple Rejection
70
COUT = 47μF
RIPPLE REJECTION (dB)
60
40
30
20
10M
3015 G28
Ripple Rejection vs Temperature
70
COUT = 47μF, CFF = 10nF
COUT = 10μF, CFF = 10nF
COUT = 10μF, CFF = 0
50
40
30
20
TJ = 25°C
I = –1.5A
10 L
VOUT = –5V
VIN = –6.5V + VRMS RIPPLE
0
100
1k
10k
100k
10
FREQUENCY (Hz)
60
RIPPLE REJECTION (dB)
LT3015 Input Ripple Rejection
50
40
30
20
10
1M
VIN = –2.3V
VOUT = 0V
0.0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
–30
3015 G26
70
COUT = 10μF
TJ = 25°C
IL = –1.5A
10 V
OUT = –1.22V
VIN = –2.7V
0
100
1k
10k
100k
1M
10
FREQUENCY (Hz)
–1.6
–0.4
–0.2
3015 G22
50
ΔVIN = –2.3V TO –30V
VOUT = –1.22V
3015 G21
–0.4
RIPPLE REJECTION (dB)
–3.0
Current Limit vs VIN –VOUT
–2.2
–1.8
60
–4.0
3015 G20
0
–12
–5.0
0.0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
–3 –6 –9 –12 –15 –18 –21 –24 –27 –30
INPUT VOLTAGE (V)
3015 G19
ΔVIN = –5.5V TO –30V
VOUT = –5V
–6.0
–1.0
20
0
–7.0
–2.0
TJ = 25°C
POSITIVE CURRENT FLOWS
INTO THE PIN
30
–200
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
–4
IL = –1mA
–9.0
ADJ PIN BIAS CURRENT (nA)
ADJ PIN BIAS CURRENT (nA)
Line Regulation
80
150
–150
TA = 25°C, unless otherwise noted.
10M
3015 G29
IL = –1.5A
VOUT = –1.22V
VIN = –2.7V + 0.5VP-P RIPPLE AT f = 120Hz
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3015 G30
3015f
7
LT3015
TYPICAL PERFORMANCE CHARACTERISTICS
Minimum Input Voltage
TA = 25°C, unless otherwise noted.
RMS Output Noise
vs Load Current
Output Noise Spectral Density
–2.2
IL = –1mA
–1.6
IL = –1.5A
–1.4
–1.2
–1.0
–0.8
–0.6
–0.4
–0.2 V
SHDN = VIN
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
10
TJ = 25°C
COUT = 10μF
IL = –1.5A
IFB-DIVIDER = 100μA
VOUT = –5V
CFF = 0
1
VOUT = –1.22V
VOUT = –5V
CFF = 10nF
OUTPUT NOISE (μVRMS)
MINIMUM INPUT VOLTAGE (V)
–1.8
OUTPUT NOISE SPECTRAL DENSITY (μV/√Hz)
250
–2.0
COUT = 10μF
225 IFB-DIVIDER = 100μA
TJ = 25°C
200 f = 10Hz TO 100KHz
175
VOUT = –5V, CFF = 0
VOUT = –5V, CFF = 120pF
150
125
100
VOUT = –5V, CFF = 1nF
75
50
25
VSHDN = VIN
0.1
10
100
3015 G31
VOUT = –1.22V
VOUT = –5V, CFF = 10nF
0
–1m
100k
1k
10k
FREQUENCY (Hz)
–10m
–100m
LOAD CURRENT (A)
–1
3015 G33
3015 G32
LT3015 10Hz to 100kHz Output
Noise
RMS Output Noise
vs Feedforward Capacitor (CFF)
250
IL = –1.5A
COUT = 10μF
f = 10Hz TO 100kHz
IFB-DIVIDER = 100μA
TJ = 25°C
225
200
OUTPUT NOISE (μVRMS)
LT3015 10Hz to 100kHz Output
Noise, CFF = 0
175
150
VOUT
200μV/DIV
VOUT
100μV/DIV
125
100
VOUT = –5V
75 VOUT = –1.22V
50
25
0
10p
100p
1n
10n
100n
FEEDFORWARD CAPACITANCE, CFF (F)
COUT = 10μF
VOUT = –1.22V
IL = –1.5A
1μ
3015 G34
1ms/DIV
3015 G35
COUT = 10μF
VOUT = –5V
IL = –1.5A
CFF = 0
SHDN Transient Response,
IL = –5mA, CFF = 0
LT3015 10Hz to 100kHz Output
Noise, CFF = 10nF
1ms/DIV
3015 G36
SHDN Transient Response,
IL = –1.5A, CFF = 0
VSHDN
1V/DIV
VSHDN
1V/DIV
VOUT
200μV/DIV
VOUT
2V/DIV
RL = 3.3Ω
VOUT
2V/DIV
RL = 1kΩ
COUT = 10μF
VOUT = –5V
IL = –1.5A
CFF = 10nF
1ms/DIV
3015 G37
COUT = 10μF
VOUT = –5V
CFF = 0
25ms/DIV
3015 G23
COUT = 10μF
VOUT = –5V
CFF = 0
250μs/DIV
3015 G24
3015f
8
LT3015
TYPICAL PERFORMANCE CHARACTERISTICS
SHDN Transient Response,
IL = –1.5A, CFF = 10nF
TA = 25°C, unless otherwise noted.
LT3015 Transient Response,
COUT = 10μF
Start-Up Time vs CFF
100
IL = –1.5A
IFB-DIVIDER = 100μA
10 TJ = 25°C
START-UP TIME (mS)
VSHDN
1V/DIV
VOUT
2V/DIV
RL = 3.3Ω
VOUT = –12V
VOUT
100mV/DIV
VOUT = –15V
1.0
VOUT = –5V
0.1
IOUT
1A/DIV
VOUT = –3V
0.01
VOUT = –1.22V
COUT = 10μF
VOUT = –5V
CFF = 10nF
250μs/DIV
3015 G25
0.001
100p
1n
10n
FEEDFORWARD CAPACITOR, CFF (F)
COUT = 10μF
25μs/DIV
VOUT = –1.22V
ΔIOUT = –50mA TO –1.5A
100n
3015 G38
LT3015 Transient Response,
COUT = 47μF
LT3015 Transient Response,
CFF = 0, COUT = 10μF
VOUT
100mV/DIV
3015 G39
LT3015 Transient Response,
CFF = 10nF, COUT = 10μF
VOUT
100mV/DIV
VOUT
100mV/DIV
IOUT
1A/DIV
IOUT
1A/DIV
IOUT
1A/DIV
COUT = 47μF
25μs/DIV
VOUT = –1.22V
ΔIOUT = –50mA TO –1.5A
3015 G40
COUT = 10μF
25μs/DIV
VOUT = –5V
CFF = 0
IFB-DIVIDER = 100μA
ΔIOUT = –50mA TO –1.5A
3015 G41
COUT = 10μF
25μs/DIV
VOUT = –5V
CFF = 10nF
IFB-DIVIDER = 100μA
ΔIOUT = –50mA TO –1.5A
3015 G42
LT3015 Transient Response,
CFF = 10nF, COUT = 47μF
VOUT
100mV/DIV
IOUT
1A/DIV
COUT = 47μF
25μs/DIV
VOUT = –5V
CFF = 10nF
IFB-DIVIDER = 100μA
ΔIOUT = –50mA TO –1.5A
3015 G43
3015f
9
LT3015
PIN FUNCTIONS
(DFN/MSOP/Q/T)
IN (Pins 1, 2, Exposed Pad Pin 9 / 1, 2, 3, 4, Exposed
Pad Pin 13 / 3, Tab / 3, Tab ): Input. These pins supply
power to the regulator. The Tab of the DD-Pak, TO-220 and
the exposed backside pad of the DFN and MSOP packages
is an electrical connection to IN and to the device’s substrate. For proper electrical and thermal performance, tie
all IN pins together and tie IN to the exposed backside or
Tab of the relevant package on the PCB. See the Applications Information Section for thermal considerations and
calculating junction temperature. The LT3015 requires
a bypass capacitor at IN. In general, a battery’s output
impedance rises with frequency, so include a bypass capacitor in battery powered applications. An input bypass
capacitor in the range of 1μF to 10μF generally suffices,
but applications with large load transients may require
higher input capacitance to prevent input supply droop
and prevent the regulator from entering dropout.
SHDN (Pin 3 / 5 / 1 / 1): Shutdown. Use the SHDN pin to
put the LT3015 into a micropower shutdown state. The
SHDN function is bi-directional, allowing use of either
positive or negative logic. The SHDN pin threshold voltages
are referenced to GND. The output of the LT3015 is OFF
if the SHDN pin is pulled within ±0.73V of GND. Driving
the SHDN pin more than ±1.21V turns the LT3015 ON.
Drive the SHDN pin with either a logic gate or with open
collector/drain logic using a pull-up resistor. The resistor
supplies the pull-up current of the open collector/drain
gate, typically several microamperes. The typical SHDN
pin current is 2.8μA out of the pin (for negative logic) or
17μA into the pin (for positive logic). If the SHDN function is unused, connect the SHDN pin to VIN to turn the
device ON. If the SHDN pin is floated, then the LT3015
is OFF. A parasitic diode exists between SHDN and IN of
the LT3015. Therefore, do not drive the SHDN pin more
than 0.3V below IN during normal operation or during a
fault condition. The SHDN pin can also be used to set a
programmable undervoltage lockout (UVLO) threshold
for the regulator input supply.
GND (Pins 4, 5 / 6, 7 / 2 / 2): Ground. Tie all GND pin(s)
together and tie the bottom of the output voltage setting
resistor divider directly to the GND pin(s) for optimum
load regulation performance.
ADJ (Pin 6 / 8 / 4 / 4): Adjust. This pin is the error amplifier’s non-inverting input. It has a typical bias current of
30nA that flows into the pin. The ADJ pin reference voltage
is –1.22V referred to GND, and the output voltage range
is –1.22V to –29.5V. A parasitic substrate diode exists
between ADJ and IN of the LT3015. Therefore, do not drive
ADJ more than 0.3V below IN during normal operation or
during a fault condition.
OUT (Pins 7, 8 / 9, 10, 11, 12 / 5 / 5): Output. These pins
supply power to the load. Tie all OUT pins together for best
performance. Use a minimum output capacitor of 10μF
to prevent oscillations. Large load transient applications
require larger output capacitors to limit peak voltage transients. See the Applications Information section for more
information on output capacitance. A parasitic substrate
diode exists between OUT and IN of the LT3015. Therefore,
do not drive OUT more than 0.3V below IN during normal
operation or during a fault condition.
3015f
10
LT3015
BLOCK DIAGRAM
ADJ
1.21V
VREF
_
OUT
–
ERROR AMP
+
+
QPOWER
NPN DRIVER
SHDN
BIAS CIRCUITRY
–
+
I LIMIT AMP
RSNS
–
VTH
+
+
–
–1.20V
ADJ PIN BIAS CURRENT
COMPENSATION
GND
I LIMIT FOLDBACK
IN
3015 BD
APPLICATIONS INFORMATION
The LT3015 regulator is a 1.5A negative low dropout linear
regulator featuring precision current limit and precision
bi-directional shutdown. The device supplies up to 1.5A
of output load current at a typical dropout voltage of
310mV. Moreover, the low 1.1mA operating quiescent
current drops to less than 1μA in shutdown. In addition
to low quiescent current, the LT3015 incorporates several
protection features that make it ideal for battery powered
applications. In dual supply applications where the regulator’s load is returned to a positive supply, OUT can be
pulled above GND by 30V and still allow the LT3015 to
start up and operate.
GND
CIN
VIN
R1
LT3015
SHDN
COUT
ADJ
R2
IN
OUT
VOUT
3015 F01
VOUT
⎛ R2 ⎞
= –1.22V ⎜ 1+ ⎟ + (IADJ ) (R2)
⎝ R1 ⎠
VADJ = –1.22V AND IADJ = 30nA AT 25°C
OUTPUT RANGE = –1.22 TO – 29.5V
Figure 1. Adjustable Operation
Adjustable Operation
The LT3015 regulator has an output voltage range of –1.22V
to –29.5V. Output voltage is set by the ratio of two external
resistors as shown in Figure 1. The device regulates the
output to maintain the ADJ pin voltage to –1.22V referred
to ground. The current in R1 equals –1.22V/R1 and the
current in R2 equals the current in R1 plus the ADJ pin
bias current. The ADJ pin bias current, 30nA at 25°C, flows
into the ADJ pin. Calculate the output voltage using the
formula shown in Figure 1. The value of R1 should be less
than 50k to minimize errors in the output voltage created
by the ADJ pin bias current. Note that in shutdown, the
output is off and the divider current is zero. Curves of
ADJ Pin Voltage vs Temperature, ADJ Pin Bias Current vs
Temperature and ADJ Pin Bias Current vs Input Voltage
appear in the Typical Performance Characteristics section.
The adjustable device is tested and specified with the
ADJ pin tied to the OUT pin for a –1.22V output voltage.
Specifications for output voltages greater than –1.22V are
proportional to the ratio of the desired VOUT to –1.22V
(VOUT/–1.22V). For example, load regulation for an output current change of –1mA to –1.5A is typically 2mV at
VOUT = –1.22V. At VOUT = –5V, load regulation equals:
(–5V/–1.22V) • (2mV) = 8.2mV
3015f
11
LT3015
APPLICATIONS INFORMATION
Table 1 shows 1% resistor divider values for some common output voltages with a resistor divider current of
approximately 100μA.
to –1.22V output voltage performance regardless of the
chosen output voltage (see Transient Response and Output
Noise in the Typical Performance Characteristics section).
Table 1. Output Voltage Resistor Divider Values
VOUT
R1
(V)
(kΩ)
It is important to note that the start-up time is affected by
the use of a feedforward capacitor. Start-up time is directly
proportional to the size of the feedforward capacitor and
the output voltage, and is inversely proportional to the
feedback resistor divider current. In particular, it slows
to 860μs with a 10nF feedforward capacitor and a 10μF
output capacitor for an output voltage set to –5V by a
100μA feedback resistor divider current.
R2
(kΩ)
–2.5
12.1
12.7
–3.0
12.1
17.8
–3.3
12.1
20.5
–5.0
12.1
37.4
–12.0
12.1
107
–15.0
12.4
140
GND
Feedforward Capacitance: Output Voltage Noise,
Transient Performance, and PSRR
The LT3015 regulators provide low output voltage noise
over the 10Hz to 100kHz bandwidth while operating at
full load current. Output voltage noise is approximately
240nV/√Hz over this frequency while operating in unity-gain
configuration. For higher output voltages (using a resistor
divider), the output voltage noise gains up accordingly. To
lower the output voltage noise for higher output voltages,
include a feedforward capacitor (CFF) from VOUT to VADJ.
A good quality, low leakage, capacitor is recommended.
This capacitor bypasses the resistor divider network at high
frequencies; and hence, reduces the output noise. With
the use of a 10nF feedforward capacitor, the output noise
decreases from 220μVRMS to 70μVRMS when the output
voltage is set to –5V by a 100μA feedback resistor divider.
Higher values of output voltage noise are often measured
if care is not exercised with regard to circuit layout and
testing. Crosstalk from nearby traces induces unwanted
noise onto the LT3015’s output. Moreover, power supply
ripple rejection (PSRR) must also be considered, as the
LT3015 does not exhibit unlimited PSRR; and thus, a
small portion of the input noise propagates to the output.
Using a feedforward capacitor (CFF) from VOUT to VADJ has
the added benefit of improving transient response and PSRR
for output voltages greater than –1.22V. With no feedforward
capacitor, the response and settling times will increase as
the output voltage is raised above –1.22V. Use the equation in Figure 2 to determine the minimum value of CFF to
achieve a transient (and noise) performance that is similar
CIN
COUT
R1
LT3015
SHDN
ADJ
VIN
R2
IN
CFF
OUT
VOUT
3015 F02
CFFöO'˜"t*FB-DIVIDER
IFB-DIVIDER = VOUT/(R1+R2)
Figure 2. Feedforward Capacitor for Fast Transient
Response, Low Noise, and High PSRR
Output Capacitance and Transient Performance
The LT3015 regulator is stable with a wide range of output
capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. Use a minimum
output capacitor of 10μF with an ESR of 500mΩ or less to
prevent oscillations. The LT3015’s load transient response
is a function of output capacitance. Larger values of output
capacitance decrease the peak deviations and provide improved transient response for larger load current changes.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common
dielectrics used are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R, and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but they tend to have strong voltage
and temperature coefficients as shown in Figures 3 and 4.
When used with a 5V regulator, a 16V 10μF Y5V capacitor
3015f
12
LT3015
APPLICATIONS INFORMATION
can exhibit an effective value as low as 1μF to 2μF for the
DC bias voltage applied and over the operating temperature
range. The X5R and X7R dielectrics result in more stable
characteristics and are more suitable for use as the output
capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in
higher values. Care still must be exercised when using X5R
and X7R capacitors; the X5R and X7R codes only specify
operating temperature range and maximum capacitance
change over temperature. Capacitance change due to DC
bias with X5R and X7R capacitors is better than Y5V and
Z5U capacitors, but can still be significant enough to drop
capacitor values below appropriate levels. Capacitor DC bias
characteristics tend to improve as component case size
increases, but expected capacitance at operating voltage
should be verified in situ for all applications.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric microphone works. For
a ceramic capacitor, the stress can be induced by vibrations in the system or thermal transients. The resulting
voltages produced can cause appreciable amounts of
noise. A ceramic capacitor produced the trace in Figure 5
in response to light tapping from a pencil. Similar vibration
induced behavior can masquerade as increased output
voltage noise.
VOUT
1mV/DIV
20
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
CHANGE IN VALUE (%)
0
X5R
–20
VOUT = –1.3V
COUT = 10μF
IL = 10μA
–40
–60
1ms/DIV
3015 F05
Figure 5. Noise Resulting from Tapping on a Ceramic Capacitor
Y5V
–80
Overload Recovery
–100
0
2
4
16
14
6
12
8 10
DC BIAS VOLTAGE (V)
3015 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
40
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
CHANGE IN VALUE (%)
20
X5R
0
–20
–40
Y5V
–60
–80
–100
–50
–25
0
25
75
50
TEMPERATURE (°C)
100
125
3015 F04
Figure 4. Ceramic Capacitor Temperature Characteristics
Like many IC power regulators, the LT3015 has safe operating area protection. The safe operating area protection
activates at IN-to-OUT differential voltages greater than
8V. The safe area protection decreases current limit as
the IN-to-OUT differential voltage increases and keeps
the power transistor inside a safe operating region for
all values of forward input-to-output voltage up to the
LT3015’s Absolute Maximum Ratings.
When power is first applied and input voltage rises, the
output follows the input and keeps the IN-to-OUT differential
voltage small, allowing the regulator to supply large output
currents and start-up into high current loads. With a high
input voltage, a problem can occur wherein removal of
an output short does not allow the output voltage to fully
recover. Other LTC negative linear regulators such as the
LT1175 and LT1964 also exhibit this phenomenon, so it
is not unique to the LT3015.
3015f
13
LT3015
APPLICATIONS INFORMATION
The problem occurs with a heavy output load when input
voltage is high and output voltage is low. Such situations
occur easily after the removal of a short-circuit or if the
shutdown pin is pulled high after the input voltage has
already been turned on. The load line for such a load
intersects the output current curve at two points. If this
happens, the regulator has two stable output operating
points. With this double intersection, the input power
supply may need to be cycled down to zero and brought
up again to make the output recover.
Shutdown/UVLO
The SHDN pin is used to put the LT3015 into a micropower
shutdown state. The LT3015 has an accurate –1.20V
threshold (during turn-on) on the SHDN pin. This threshold
can be used in conjunction with a resistor divider from the
system input supply to define an accurate undervoltage
lockout (UVLO) threshold for the regulator. The SHDN pin
current (at the threshold) needs to be considered when
determining the resistor divider network.
Thermal Considerations
The LT3015’s maximum rated junction temperature of
125°C limits its power handling capability. Two components
comprise the power dissipated by the device:
1. Output current multiplied by the input-to-output differential voltage: IOUT • (VIN - VOUT) and
2. GND pin current multiplied by the input voltage:
IGND • VIN
Determine GND pin current using the GND Pin Current
curves in the Typical Performance Characteristics section. Total power dissipation is the sum of the above two
components.
The LT3015 regulator incorporates a thermal shutdown
circuit designed to protect the device during overload
conditions. The typical thermal shutdown temperature is
165°C and the circuit incorporates about 8°C of hysteresis. For continuous normal conditions, do not exceed the
maximum junction temperature rating of 125°C. Carefully
consider all sources of thermal resistance from junction
to ambient, including other heat sources mounted in close
proximity to the LT3015.
The undersides of the DFN and MSOP packages have exposed metal from the lead frame to the die attachment.
Both packages allow heat to directly transfer from the
die junction to the printed circuit board metal to control
maximum operating junction temperature. The dual-in-line
pin arrangement allows metal to extend beyond the ends
of the package on the topside (component side) of the
PCB. Connect this metal to IN on the PCB. The multiple
IN and OUT pins of the LT3015 also assist in spreading
heat to the PCB.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat generated by power devices.
Tables 2-4 list thermal resistance as a function of copper
area in a fixed board size. All measurements were taken
in still air on a 4 layer FR-4 board with 1oz solid internal
planes and 2oz top/bottom external trace planes with a total
board thickness of 1.6mm. The four layers were electrically
isolated with no thermal vias present. PCB layers, copper
weight, board layout and thermal vias will affect the resultant thermal resistance. For more information on thermal
resistance and high thermal conductivity test boards,
refer to JEDEC standard JESD51, notably JESD51-12 and
JESD51-7. Achieving low thermal resistance necessitates
attention to detail and careful PCB layout.
3015f
14
LT3015
APPLICATIONS INFORMATION
Table 2. Measured Thermal Resistance for DFN Package
COPPER AREA
TOP SIDE*
BACKSIDE
BOARD
AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
40°C/W
1000mm2
2500mm2
2500mm2
40°C/W
225mm2
2500mm2
2500mm2
41°C/W
100mm2
2500mm2
2500mm2
42°C/W
*Device is mounted on topside
Thus:
P = –500mA(–3.465V + 2.5V) + –6.5mA • (–3.465V) =
0.505W
Using a DFN package, the thermal resistance is in the
range of 40°C/W to 42°C/W depending on the copper area.
Therefore, the junction temperature rise above ambient
approximately equals:
0.505W • 41°C/W = 20.7°C
Table 3. Measured Thermal Resistance for MSOP Package
COPPER AREA
The maximum junction temperature equals the maximum ambient temperature plus the maximum junction
temperature rise above ambient or:
TOP SIDE*
BACKSIDE
BOARD
AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
37°C/W
1000mm2
2500mm2
2500mm2
37°C/W
225mm2
2500mm2
2500mm2
38°C/W
Protection Features
100mm2
2500mm2
2500mm2
40°C/W
The LT3015 incorporates several protection features that
make it ideal for use in battery-powered applications. In
addition to the normal protection features associated
with monolithic regulators, such as current limiting and
thermal limiting, the device protects itself against reverse
input voltages and reverse output voltages.
*Device is mounted on topside
Table 4. Measured Thermal Resistance for DD-Pak Package
COPPER AREA
TOP SIDE*
BACKSIDE
BOARD
AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500mm2
2500mm2
2500mm2
14°C/W
1000mm2
2500mm2
2500mm2
16°C/W
225mm2
2500mm2
2500mm2
19°C/W
*Device is mounted on topside
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 3°C/W
Calculating Junction Temperature
Example: Given an output voltage of –2.5V, an input voltage
range of –3.3V ± 5%, an output current range of 1mA to
500mA, and a maximum ambient temperature of 85°C,
what is the maximum junction temperature?
TJMAX = 85°C + 20.7°C = 105.7°C
Precision current limit and thermal overload protections
are intended to protect the LT3015 against current overload conditions at the output of the device. For normal
operation, do not allow the the junction temperature to
exceed 125°C.
Pulling the LT3015’s output above ground induces no
damage to the part. If IN is left open circuit or grounded,
OUT can be pulled above GND by 30V. In addition, OUT acts
like an open circuit, i.e. no current flows into the pin. If IN
is powered by a voltage source, OUT sinks the LT3105’s
short-circuit current and protects itself by thermal limiting.
In this case, grounding the SHDN pin turns off the device
and stops OUT from sinking the short-circuit current.
The power dissipated by the LT3015 equals:
IOUT(MAX) • (VIN(MAX) - VOUT) + IGND • (VIN(MAX))
where:
IOUT(MAX) = –500mA
VIN(MAX) = –3.465V
IGND at (IOUT = –500mA, VIN = –3.465V) = –6.5mA
3015f
15
LT3015
TYPICAL APPLICATIONS
Adjustable Current Sink
R1
2k
C1
10μF LT1004-1.2
R8
100k
GND
R2
82.5k
R3
2k
C2
10μF
LT3015
R4
0.01Ω
VIN < –2.3V
R5
2.2k
SHDN
ADJ
IN
OUT
R6
2.2k
RLOAD
R7
475Ω
C3
1μF
2
3
–
8
1/2
LT1350
1
+
4
C4
3.3μF
3015 TA04
NOTE: ADJUST R3 FOR 0 TO –1.5A CONSTANT CURRENT
PACKAGE DESCRIPTION
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698 Rev C)
R = 0.125
TYP
5
0.40 ± 0.10
8
0.70 ±0.05
3.5 ±0.05
1.65 ±0.05
2.10 ±0.05 (2 SIDES)
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
PACKAGE TOP MARK
(NOTE 6)
OUTLINE
(DD8) DFN 0509 REV C
0.25 ± 0.05
0.200 REF
0.50
BSC
2.38 ±0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.75 ±0.05
4
0.25 ± 0.05
1
0.50 BSC
2.38 ±0.10
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
3015f
16
LT3015
PACKAGE DESCRIPTION
MSE Package
12-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1666 Rev D)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 t 0.102
(.112 t .004)
5.23
(.206)
MIN
2.845 t 0.102
(.112 t .004)
0.889 t 0.127
(.035 t .005)
6
1
1.651 t 0.102 3.20 – 3.45
(.065 t .004) (.126 – .136)
0.12 REF
12
0.65
0.42 t 0.038
(.0256)
(.0165 t .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
4.039 t 0.102
(.159 t .004)
(NOTE 3)
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
7
NO MEASUREMENT PURPOSE
0.406 t 0.076
(.016 t .003)
REF
12 11 10 9 8 7
DETAIL “A”
0s – 6s TYP
3.00 t 0.102
(.118 t .004)
(NOTE 4)
4.90 t 0.152
(.193 t .006)
GAUGE PLANE
0.53 t 0.152
(.021 t .006)
1 2 3 4 5 6
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.650
(.0256)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.86
(.034)
REF
0.1016 t 0.0508
(.004 t .002)
MSOP (MSE12) 0910 REV D
3015f
17
LT3015
PACKAGE DESCRIPTION
Q Package
5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461 Rev E)
.256
(6.502)
.060
(1.524)
TYP
.060
(1.524)
.390 – .415
(9.906 – 10.541)
.165 – .180
(4.191 – 4.572)
.045 – .055
(1.143 – 1.397)
15o TYP
.060
(1.524)
.183
(4.648)
+.008
.004 –.004
+0.203
0.102 –0.102
.059
(1.499)
TYP
.330 – .370
(8.382 – 9.398)
.095 – .115
(2.413 – 2.921)
.075
(1.905)
.300
(7.620)
+.012
.143 –.020
+0.305
3.632 –0.508
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
.067
(1.702)
.028 – .038 BSC
(0.711 – 0.965)
TYP
.420
.276
.080
.420
.050 p .012
(1.270 p 0.305)
.013 – .023
(0.330 – 0.584)
.325
.350
.205
.585
.585
.320
.090
.090
.067
.042
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
1. DIMENSIONS IN INCH/(MILLIMETER)
2. DRAWING NOT TO SCALE
.067
.042
RECOMMENDED SOLDER PAD LAYOUT
FOR THICKER SOLDER PASTE APPLICATIONS
Q(DD5) 0610 REV E
3015f
18
LT3015
PACKAGE DESCRIPTION
T Package
5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
.390 – .415
(9.906 – 10.541)
.165 – .180
(4.191 – 4.572)
.147 – .155
(3.734 – 3.937)
DIA
.045 – .055
(1.143 – 1.397)
.230 – .270
(5.842 – 6.858)
.460 – .500
(11.684 – 12.700)
.570 – .620
(14.478 – 15.748)
.330 – .370
(8.382 – 9.398)
.620
(15.75)
TYP
.700 – .728
(17.78 – 18.491)
.095 – .115
(2.413 – 2.921)
SEATING PLANE
.152 – .202
.260 – .320 (3.861 – 5.131)
(6.60 – 8.13)
.155 – .195*
(3.937 – 4.953)
.013 – .023
(0.330 – 0.584)
BSC
.067
(1.70)
.028 – .038
(0.711 – 0.965)
.135 – .165
(3.429 – 4.191)
* MEASURED AT THE SEATING PLANE
T5 (TO-220) 0801
3015f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT3015
TYPICAL APPLICATION
Paralleling Regulators For Higher Output Current
R9
12.1k
1%
GND
C1
22μF
SHDN
R1
0.01Ω
ADJ
R8
37.4k
1%
LT3015
IN
VIN < –5.5V
OUT
R6
37.4k
1%
LT3015
IN
VOUT
–5V
–3.0A
R7
12.1k
1%
GND
SHDN
ADJ
R2
0.01Ω
C2
22μF
OUT
R5
50k
C3
0.01μF
R3
2.2k
R4
2.2k
2
3
8
–
1/2
LT1366
+
1
4
3015 TA03
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1185
3A, Negative Linear Regulator
670mV Dropout Voltage, VIN = –4.3V to –35V, DD-Pak and TO-220 Packages
LT1175
500mA, Negative Low Dropout
Micropower Regulator
500mV Dropout Voltage, VIN = –4.5V to –20V, S8, N8, SOT-223, DD-Pak and TO-220
Packages
LT1964
200mA, Negative Low Noise Low Dropout
Regulator
340mV Dropout Voltage, Low Noise: 30μVRMS, VIN = –1.9V to –20V, 3mm × 3mm DFN and
ThinSOT Packages
LT1764A
3A, Fast Transient Response, Low Noise
LDO Regulator
340mV Dropout Voltage, Low Noise: 40μVRMS, VIN = 2.7V to 20V, TO-220 and
DD-Pak Packages, “A” Version Stable also with Ceramic Caps
LT1763
500mA, Low Noise, LDO Regulator
300mV Dropout Voltage, Low Noise : 20μVRMS, VIN = 1.6V to 20V, Stable with 3.3μF
Output Capacitors, S8 and 3mm × 4mm DFN Packages
LT1963A
1.5A Low Noise, Fast Transient Response
LDO Regulator
340mV Dropout Voltage, Low Noise: 40μVRMS, VIN = 2.5V to 20V, “A” Version Stable with
Ceramic Caps, TO-220, DD-Pak, SOT-223 and SO-8 Packages
LT1965
1.1A, Low Noise, LDO Regulator
310mV Dropout Voltage, Low Noise: 40μVRMS , VIN : 1.8V to 20V, VOUT: 1.2V to 19.5V,
Stable with Ceramic Caps, TO-220, DD-Pak, MSOP-8E and 3mm × 3mm DFN Packages
LT3022
1A, Low Voltage, Very Low Dropout VLDO
Linear Regulator
VIN = 0.9V to 10V, Dropout Voltage: 145mV Typical, Adjustable Output (VREF = VOUT(MIN)
= 200mV), Fixed Output Voltages: 1.2V, 1.5V, 1.8V, Stable with Low ESR, Ceramic Output
Capacitors 16-Pin 3mm × 5mm DFN and MSOP-16E Packages
LT3080/LT3080-1 1.1A, Parallelable, Low Noise, Low
Dropout Linear Regulator
300mV Dropout Voltage (2-Supply Operation), Low Noise: 40μVRMS, VIN: 1.2V to 36V,
VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT set; Directly Parallelable
(no op amp required), Stable with Ceramic Caps, TO-220, DD-Pak, SOT-223, MSOP-8E and
3mm × 3mm DFN Packages; “–1” Version has Integrated Internal Ballast Resistor
LT3085
275mV Dropout Voltage (2-Supply Operation), Low Noise: 40μVRMS, VIN: 1.2V to 36V, VOUT:
0V to 35.7V, Current-Based Reference with 1-Resistor VOUT set; Directly Parallelable (no op
amp required), Stable with Ceramic Caps, MSOP-8E and 2mm × 3mm DFN Packages
500mA, Parallelable, Low Noise,
Low Dropout Linear Regulator
3015f
20 Linear Technology Corporation
LT 0611 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2011