SANYO LV8011V_08

Ordering number : ENN*7230
LV8011V
Bi-CMOS IC
Forward/Reverse Motor Driver
Overview
LV8011V is a 1ch forward/reverse motor driver IC using D-MOS FET for output stage. As MOS circuit is used, it
supports the PWM input. Its features are that the on resistance (0.37Ω typ) and current dissipation are low.
It also provides protection functions such as heat protection circuit and reduced voltage detection and is optimal for the
motors that need high-current (maximum peak current : 5A).
Absolute Maximum Ratings at Ta = 25°C, SGND = PGND = 0V
Parameter
Maximum Power Source Voltage
Symbol
Conditions
Ratings
VM max
(For load)
Maximum Power Source Voltage
VCC max
(For control)
Maximum Output Current
Unit
-0.5 to 7.5
V
-0.5 to 6.0
V
IO max
DC
1.0
A
IO peak1
t≤100ms, f = 2Hz
3.0
A
IO peak2
t≤10ms, f = 2Hz
5.0
A
Input Voltage
VIN max
Operating Temperature
Topr
Storage Temperature
Tstg
Allowable Power Dissipation
Pd
-0.5 to VCC+0.5
V
-20 to +75
°C
-55 to 150
*Specified substrate
800
°C
mW
* When mounting the glass epoxy substrate 30mm×50mm×1.6mm.
Allowable Operating Range at SGND = PGND = 0V
Parameter
Symbol
Conditions
Ratings
Unit
Power Source Voltage (For load)
VM
2.0 to 6.5
Power Source Voltage (For control)
VCC
4.5 to 5.5
V
Input Signal Voltage
VIN
0 to VCC
V
Input Signal Frequency
f max
Charge-Pump Capacitor
C1, C2, C3
duty = 50%
V
100
kHz
0.001 to 0.1
µF
Any and all SANYO Semiconductor products described or contained herein do not have specifications
that can handle applications that require extremely high levels of reliability, such as life-support systems,
aircraft's control systems, or other applications whose failure can be reasonably expected to result in
serious physical and/or material damage. Consult with your SANYO Semiconductor representative
nearest you before using any SANYO Semiconductor products described or contained herein in such
applications.
SANYO Semiconductor assumes no responsibility for equipment failures that result from using products
at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor
products described or contained herein.
92706 / 91004 JO IM No.7230-1/7
LV8011V
Electric Characteristics at Ta = 25°C, VCC = VM = 5.0V, SGND = PGND = 0V
Parameter
Symbol
Ratings
Conditions
min
Standby Power Source Current
typ
Unit
Remarks
1.0
µA
1
100
µA
2
1.2
mA
3
max
IMO
EN = 0V
ICO
EN = 0V, IN1 = IN2 = TIN = 5V
Operating Current Consumption
IC1
EN = 5V, VG when non-load.
High Level Input Voltage
VIH
2.5
VCC
V
Low Level Input Voltage
VIL
0
0.8
V
High Level Input Current
IIH
1.0
µA
for Load
Standby Power Source Current
50
for Control
0.7
(IN1, IN2)
Low Level Input Current
IIL
Pull-up Resistance Value
RUP
50
(EN, TIN)
Output ON Resistance
RON
100
200
kΩ
0.37
0.60
Ω
5
9.5
10.4
11
V
6
2.3
2.5
2.7
V
7
150
180
210
°C
8
9.0
9.9
V
9
350
µA
10
0.5
1.0
ms
11
Sum of top and bottom of ON
resistance value.
Charge-Pump Voltage
VG
Low Voltage Detection Operating
VCS
VCC Voltage
TTSD
*Design Target
Voltage
Thermal Shutdown
Operating Temperature
Charge-Pump Capacity
VGLOAD
(IG = 500µA)
IG Current Dissipation
µA
-1.0
(IN1, IN2)
IG
(Fin = 20kHz)
Charge Pump Start-up Time
TVG
C1 = C2 = 0.01µF, CVG = 0.1µF
4
[Output Part]
Turn-ON Time
TPLH
0.9
2.0
µs
12
Turn-OFF Time
TPHL
0.3
2.0
µs
12
[TOUT]
Turn-ON Time
TOUT
C = 500pF
5.0
20
µs
12
Turn-OFF Time
TOFF
C = 500pF
5.0
20
µs
12
* It is a design target value and measurement is not carried out.
Remarks
1. It shows current dissipation of VM pin in output OFF state.
2. It shows current dissipation of VCC pin in stand-by state.
(The standard current depends on EN pin pull-down resistance.)
3. It shows current dissipation of VCC pin in state of EN = 5V (stand-by), including current dissipation of VG pin.
4. For IN1 and IN2 pins, no pull-down and pull-up resistance is needed. (High impedance pin)
5. It shows sum of upper and lower saturation voltages of OUT pin.
6. It controls charge-pump oscillation and makes specified voltage.
7. When low voltage is detected, the lower output is turned OFF.
8. When thermal protection circuit is activated, the lower output is turned OFF.
When the heat temperature is fallen, it is turned ON again.
9. IG (VG pin load current) = 500µF
10. It shows VG pin current dissipation in state of PWM input for IN pin.
11. It specifies start-up time from 10% to 90% when VG is in non-load state
(when setting the capacitor between VG and GND to 0.1µF and VCC is 5V).
12. It specifies 10% to 90% for start-up and 90% to 10% for shut-down.
No.7230-2/7
LV8011V
Package Dimensions
unit : mm
3179B
Pin Assignment
1
TIN
C1L 20
2
EN
C1H 19
3
IN2
C2L 18
4
IN1
C2H 17
5
SGND
VCC 16
6
VM
7
OUT2
OUT1 14
8
OUT2
OUT1 13
9
TOUT
VG 12
10 PGND
PGND 11
LV8011V
VM 15
Top view
No.7230-3/7
LV8011V
Block Diagram
C2H 17
OSC,CHARGE_PUMP
C2L 18
LOW
VOLTAGE
THERMAL
PROTECTION
C1H 19
12 VG
C1L 20
9 TOUT
6
13 OUT1
(14)
VM
(15)
LEVEL
SHIFTER
VCC 16
7
OUT2
(8)
11 PGND
(10)
IN1 4
CMOS
LOGIC
IN2 3
1 TIN
DIFFUSED
RESISTOR
EN 2
5 SGND
True Value Table
Z : High-Impedance - : Don’t care
EN
IN1
IN2
TIN
OUT1
OUT2
TOUT
Mode
H
H
H
-
L
L
-
Brake
H
H
L
-
H
L
-
Forward evolution
H
L
H
-
L
H
-
Reverse rotation
H
L
L
-
Z
Z
-
Stand by
L
-
-
-
L
L
L
Stdby
H
-
-
H
-
-
L
TR-OFF
H
-
-
L
-
-
H
TR-ON
* For reduced voltage and thermal protection, the lower output is turned OFF and the motor drive stops.
No.7230-4/7
LV8011V
Pin Description
Pin no.
Pin name
20
C1L
18
C2L
Equivalent Circuit
Pin Explanation
Step-up Capacitor Connection Pin
V CC
20
18
19
C1H
17
C2H
Step-up Capacitor Connection Pin
VG
12
4
IN1
3
IN2
C1H
19
C2H
17
Driver Output Switch
VCC
4
3
EN
1
TIN
Logic Enable Pin
VCC
TOUT Output Control Pin
100kΩ
2
(Built-in Pull-up Resistance)
2
1
13
OUT1
14
7
Driver Output Pin
VM
(Both 2 pins are Connected.)
OUT2
8
Continued on next page.
No.7230-5/7
LV8011V
Continued from preceding page.
Pin no.
Pin name
9
TOUT
Equivalent Circuit
Pin Explanation
Step-up Voltage Output Pin
VG
9
6
VM
Driver Power Source
15
(Both 2 pins are Connected.)
16
VCC
12
VG
Logic Power Source
Driving Circuit Unit Power Source for
VG
Driver
17
0.01µF
C2H
0.1µF
12
C2L
18
5
SGND
Logic GND
10
PGND
Driver GND
11
(Both 2 pins are Connected.)
Application Circuit Diagram
C1 = 0.01µF
3 to 5.5V
C2 = 0.01µF
VG 12
17 C2H
TOUT
9
VM
6
CVB = 0.1µF
9 to 11V
2.0 to 6.5V
18 C2L
19 C1H
*
20 C1L
LV8011V
4.5 to 5.5V
16 VCC
4
OUT2
7
OUT2
8
IN1
M
PGND 10
3
IN2
2
EN
1
TIN
5
SGND
CPU
PGND 11
OUT1 13
OUT1 14
VM 15
* Place it as close as possible to VM and PGND pins of IC.
No.7230-6/7
LV8011V
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performance, characteristics, and functions of the described products in the independent state, and are
not guarantees of the performance, characteristics, and functions of the described products as mounted
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independent device, the customer should always evaluate and test devices mounted in the customer's
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so that these kinds of accidents or events cannot occur. Such measures include but are not limited to
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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
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This catalog provides information as of September, 2004. Specifications and information herein are subject
to change without notice.
PS No.7230-7/7