STiH207 Advanced dual HD AVC processor with integrated low power standby controller Data brief Features ■ ST40 applications CPU with 256 KB L2 cache ■ 32-bit LMI supporting DDR2/DDR3 ■ Decoding of H264, MPEG2, VC-1 and AVS HD video streams Decoding of 1080p60 AVC, dual HD AVC and MVC SHP video streams ■ 3DTV decoding and display compatible with HDMI 1.4a ■ Extensive connectivity (2 × USB 2.0 ports; Ethernet MII/RMII/TMII port; SD/MMC card port; eSATA port; PCIe) ■ Secure booting from SLC NAND Flash or Serial NOR Flash; eMMC booting option ■ Low-power process and architecture ■ Integrated low power standby controller CPU/FPU High-quality video resizing and de-interlacing ■ Integrated Ethernet PHY Description ■ JTAG ■ The STiH207 uses the latest process technology to provide a cost-effective, feature rich, highly integrated SoC for Set-Top Boxes (STBs). It is targeted at the advanced decoding STB market across all networks (Cable/Satellite/DTT/x-DSL/IP) worldwide and is suitable both for operator markets (with advanced security) and retail markets. The STiH207 provides a solution for operators and manufacturers to specify a range of costeffective, high performance STBs including basic zappers, interactive STBs, IP clients, and DVR STBs with content delivery possible using broadcast or broadband networks or both (Hybrid STBs). Resets Clocks Modes Analog out PCM I/O S/PDIF out STB peripherals I/O external interrupts Clock Gen System serv Audio I/O Peripherals Dual FDMA PCM Players PCM Reader DACs L2 cache Audio decoder ST231 CPU System interfaces SSC UART RTC PWM GPIOs IR/UHF Smartcard Key scan EMI SPI SLC NAND Flash Serial Flash CI-Plus cards DDR3 LMI DDR2/DDR3 STBus Transport Security Video decoder Display Video I/O Dual USB eSATA/PCI-E Low power standby controller Connectivity Ethernet SD-MMC/SDIO Transport streams Parallel/serial in/out October 2011 Analog video HDMI Doc ID 022309 Rev 1 For further information contact your local STMicroelectronics sales office. 1/4 www.st.com 4 Introduction 1 STiH207 Introduction The STiH207 offers current users of ST’s growing family of advanced decoding ICs enhancements in performance and features, enabling operators to offer consumers new multimedia-rich services and viewing experiences, including new 3DTV features. Faster DDR3 memory is also supported, and the applications CPU benefits from an L2 cache. The STiH207 keeps pace with the latest advanced security requirements of the main CA vendors, and an integrated standby controller enables the STiH207 to target stringent low power regulations. Features Benefits ST40 applications CPU, with 32KI and 32KD L1 caches and 256K L2 cache. High performance processing up to 1020 DMIPS(1) for applications and middleware. Integrated low power standby controller within its own power island. Secure hibernation to, and fast resume from, very low power passive standby mode, targeting STB standby power < 0.5 W. Latest generation of ST's Delta video decoder with an ST231-based multi-codec capable controller, coupled with a High Quality Video Display Pipeline (HQVDP). Decoding of advanced high definition standards (MPEG2, H264, VC-1, AVS) plus the performance and flexibility for web-based content decoding such as Flash®, DivX™, MJPEG and Real®, without impacting applications CPU performance. Dual USB 2.0 hosts, eSATA, Ethernet MAC with MII/RMII/TMII interfaces, PCI-e, SD-MMC/SDIO interface. Extensive high speed connectivity for the widest range of STB peripherals, such as Flash drives, external HDDs, Ethernet, home network controllers (such as MoCA®, Wi-Fi), DOCSIS® modem and memory cards. Decoding of 1080p60 AVC, dual HD AVC and MVC SHP video streams. Enables advanced high-definition viewing experiences including full resolution per eye 3DTV, full-HD 2D services and HD picture-in-picture support (HD-PIP). NOCS1.0/1.1/1.2/3.0, NSK2.0 and DVB-CSA3 ready. Fully compliant with the latest advanced security requirements of CA vendors. 1. Frequency for extended mode to be confirmed after silicon characterization. 2/4 Doc ID 022309 Rev 1 STiH207 2 Revision history Revision history Table 1. Document revision history Date Revision 24-Oct-2011 1 Changes Initial release. Doc ID 022309 Rev 1 3/4 STiH207 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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