PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 10-A, 4.5-V to 14-V INPUT, NON-ISOLATED, ADJUSTABLE WIDE-OUTPUT, SWITCHING REGULATOR FEATURES APPLICATIONS • • • • • • • 1 • • • • • • • Up to 10-A Output Current Wide Input Voltage Range (4.5 V to 14 V) Wide-Output Voltage Adjust (0.6 V to 5.5 V) Efficiencies Up To 96% ON/OFF Inhibit Undervoltage Lockout (UVLO) Output Overcurrent Protection (Nonlatching, Auto-Reset) Overtemperature Protection Ambient Temp. Range: –40°C to 85°C Space Saving Vertical SIP Package Instrumentation Consumer Electronics Servers General-Purpose Circuits DESCRIPTION The PTR08100W is a highly integrated, low-cost switching regulator module that delivers up to 10 A of output current. Occupying approximate PCB area of a standard TO-220 linear regulator IC, the PTR08100W provides output current at a much higher efficiency and with much less power dissipation, thereby eliminating the need for a heat sink. Their small size (0.65 x 0.41 in), high efficiency, and low cost makes these modules attractive for a variety of applications. The input voltage range of the PTR08100W is from 4.5 V to 14 V, allowing operation from either a 5-V or 12-V input bus. Using state-of-the-art switched-mode power-conversion technology, the PTR08100W can step down to voltages as low as 0.6 V. The output voltage can be adjusted to any voltage over the range, 0.6 V to 5.5 V, using a single external resistor. Operating features include an undervoltage lockout (UVLO), on/off inhibit and output overcurrent protection. Target applications include servers, test and measurement applications, and high-end consumer products. VI 2 VI VO 4 VO PTR08100W Inhibit 1 Inhibit CI 100 mF (Required) GND GND VOAdjust 3 5 RSET 1%, 0.05 W CO 100 mF (Required) L O A D GND UDG-07115 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) UNIT TA Operating free-air temperature Over VI range Twave Wave solder temperature Surface temperature of module body or pins (5 seconds maximum) Tstg Storage temperature (1) (2) (3) °C -40 to 85 260 °C (2) °C -55 to 125 (3) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. This product is not compatible with surface-mount reflow solder processes. The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than 65C. RECOMMENDED OPERATING CONDITIONS MIN MAX VI Input voltage 4.5 14 UNIT V TA Operating free-air temperature –40 85 °C PACKAGE SPECIFICATIONS PTR08100W Weight Flammability Mechanical shock Mechanical vibration (1) 2 UNIT 2.74 grams Meets UL 94 V-O Per Mil-STD-883D, Method 2002.3, 1 msec, 1/2 sine, mounted Mil-STD-883D, Method 2007.2, 20-2000 Hz 250 G 5G (1) (1) Qualification limit. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 ELECTRICAL CHARACTERISTICS at 25C free-air temperature, VI = 12 V, VO = 3.3 V, IO = IO(Max), CI = 100 F, CO = 100 F (unless otherwise noted) PARAMETER IO Output current TEST CONDITIONS MIN TA = 50°C, 200LFM airflow TYP MAX 0 0.6 V ≤ VO ≤ 3.6 4.5 3.6 V < VO ≤ 5.5 VO /0.83 (2) 10 14 UNIT A (1) VI Input voltage range Over IO range VO(adj) Output voltage adjust range Over IO range Set-point voltage tolerance TA = 25°C Temperature variation -40°C ≤ TA ≤ +85°C ±0.2 % VO Line regulation Over VI range ±0.3 % VO Load regulation Over IO range ±0.5 Total output voltage variation Includes set-point, line, load, –40°C ≤ TA ≤ +85°C VO 0.6 RSET = 267 Ω, VI = 12 V, VO = 5 V (2) 92 % (2) 95 % ILIM Output voltage ripple 20 MHz bandwith Overcurrent threshold Reset, followed by autorecovery Transient response UVLO TA = 25°C VI = 5 V IO = 5 A Undervoltage lockout Inhibit control (pin 1) 91 % RSET = 1.3 kΩ, VO = 1.5 V 90 % RSET = 1.91 kΩ, VO = 1.2 V 88 % RSET = 2.87 kΩ, VO = 1 V 86 % RSET = 10.7 kΩ, VO = 0.7 V 84 % A 50 µs VO over/undershoot 150 mV 4.25 Input high voltage (VIH) 2.8 Input low voltage (VIL) –0.3 Input low current (IIL) FS Switching frequency Over VI and IO ranges CI External input capacitance 100 (5) 100 (6) Equivalent series resistance (non-ceramic) 5 (8) Per Bellcore TR-332, 50% stress, TA = 40°C, ground benign 13.7 Non-ceramic CO External output capacitance MTBF (1) (2) (3) (4) (5) (6) (7) (8) Calculated reliability mVPP 16 3.8 Pin 1 to GND % VO Recovery time VI = decreasing Input standby current (3) 50 VI = increasing II(stby) V % VO 93 % RSET = 976 Ω, VO = 1.8 V 2.5 A/µs load step from 50 to 100% IOmax (3) V % VO ±3 RSET = 619 Ω, VO = 2.5 V Efficiency 5.5 ±2 RSET = 432 Ω, VO = 3.3 V η 14 Ceramic 4.4 3.95 6 V (4) 0.6 V –125 µA 1 mA 300 kHz µF 3000 22 (6) (7) 100 µF mΩ 106 Hrs For output voltages less than 1.0 V, the output ripple may increase (up to 2×) when operating at input voltages greater than (VO ×15). The minimum input voltage is 4.5 V or (VO/0.83) V, whichever is greater. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with with 100 ppm/°C or better temperature stability. This control pin has an internal pullup to the input voltage VI. If it is left open circuit, the module operates when input power is applied. A small low-leakage (<100 nA) MOSFET is recommended for control. Do not tie the inhibit pin to VI or to another module's inhibit pin. See the application section for further guidance. An external 100-µF bulk capacitor is required across the input (VI and GND) for proper operation. Locate the capacitor close to the module. An external 100-µF non-ceramic capacitor is required across the output (VO and GND) for proper operation. Locate the capacitor close to the module. Adding additional capacitance close to the load improves the response of the regulator to load transients. This is the calculated maximum capacitance. The minimum ESR limitation often results in a lower value. See the capacitor application information for further guidance. This is the typical ESR for all the non-ceramic capacitance. Use 7 mΩ as the minimum when calculating the total equivalent series resistance (ESR) using the max-ESR values specified by the capacitor manufacturer. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W 3 PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 PIN ASSIGNMENT TERMINAL FUNCTIONS TERMINAL NAME DESCRIPTION NO. VI 2 The positive input voltage power node to the module, which is referenced to common GND. GND 3 This is the common ground connection for the VI and VO power connections. It is also the 0 VDC reference for the Inhibit and VO Adjust control inputs. VO 4 The regulated positive power output with respect to the GND node. VOAdjust 5 A 1% resistor must be connected between this pin and GND (pin 3) to set the output voltage of the module higher than 0.6 V. If left open-circuit, the output voltage defaults to this value. The temperature stability of the resistor should be 100 ppm/°C (or better). The set-point range is from 0.6 V to 5.5 V. For information on output voltage adjustment see the related application section. TheVOAdjust pin must never be connected directly to GND. The minimum resistance between VOAdjust and GND is limited to 240 Ω. Inhibit 1 The Inhibit pin is an open-collector/drain-negative logic input that is referenced to GND. Applying a low-level ground signal to this input disables the module's output. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module will produce an output voltage whenever a valid input source is applied. TOP VIEW 5 4 3 2 1 1 4 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 TYPICAL CHARACTERISTICS (12-V INPUT) (1) (2) EFFICIENCY vs OUTPUT CURRENT OUTPUT RIPPLE vs OUTPUT CURRENT 100 110 80 75 VO = 3.3 70 VO = 1.2 65 60 55 VO = 0.7 VO (V) 5.0 3.3 1.2 0.7 2 4 6 IO - Output Current - A 8 4 VO (V) 5.0 3.3 1.2 0.7 70 50 VO = 1.2 VO = 0.7 3 VO = 1.2 2 30 1 10 0 10 0 2 4 6 IO - Output Current - A 8 10 0 TEMPERATURE DERATING vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT TEMPERATURE DERATING vs OUTPUT CURRENT 80 80 TA - Ambient Temperature - °C 80 70 400 LFM 60 200 LFM VO = 5.0 V 100 LFM Airflow 400 LFM 200 LFM Natural Convection 70 400 LFM 60 200 LFM 50 VO = 3.3 V 100 LFM Airflow 400 LFM 40 200 LFM 30 100 LFM 100 LFM Nat conv Natural Convection 400 LFM 60 200 LFM 50 VO = 0.7 V Airflow 400 LFM 40 200 LFM 30 4 6 IO - Output Current - A 8 10 Figure 4. 100 LFM Natural Convection 100 LFM Nat conv 20 2 10 70 Nat conv 20 0 8 Figure 3. 90 40 4 6 IO - Output Current - A Figure 2. 90 50 2 Figure 1. 90 30 (2) VO = 3.3 VO = 5.0 VO = 0.7 VO = 3.3 50 0 90 TA - Ambient Temperature - °C h - Efficiency - % 85 VO (V) 5.0 3.3 1.2 0.7 VO = 5.0 PD - Power Dissipation - W VO – Output Voltage Ripple – VPP(mV) 90 TA - Ambient Temperature - °C 5 VO = 5.0 95 (1) POWER DISSIPATION vs OUTPUT CURRENT 20 0 2 4 6 IO - Output Current - A 8 Figure 5. 10 0 2 4 6 IO - Output Current - A 8 10 Figure 6. The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the converter. Applies to Figure 1, Figure 2, and Figure 3. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm × 100 mm double-sided PCB with 1 oz. copper. Applies to Figure 4. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W 5 PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 TYPICAL CHARACTERISTICS (5-V INPUT) (1) (2) EFFICIENCY vs OUTPUT CURRENT OUTPUT RIPPLE vs OUTPUT CURRENT 100 POWER DISSIPATION vs OUTPUT CURRENT 55 3.0 VO (V) 3.3 1.2 0.7 90 h - Efficiency - % 85 80 75 VO = 1.2 VO = 3.3 70 VO = 0.7 65 60 VO (V) 3.3 1.2 0.7 55 50 2.5 VO = 3.3 45 PD - Power Dissipation - W VO – Output Voltage Ripple – VPP(mV) 95 VO = 1.2 35 VO = 0.7 25 VO (V) 3.3 1.2 0.7 15 2 4 6 IO - Output Current - A 10 8 0 2 4 6 IO - Output Current - A 80 80 TA - Ambient Temperature - °C TA - Ambient Temperature - °C 90 70 400 LFM 8 10 60 200 LFM VO = 3.3 V Airflow 400 LFM 100 LFM Natural Convection 200 LFM 4 6 IO - Output Current - A 8 10 400 LFM 50 VO = 0.7 V Airflow 400 LFM 40 200 LFM 100 LFM Natural Convection 200 LFM 100 LFM Nat conv 20 0 2 4 6 IO - Output Current - A 8 10 0 2 4 6 IO - Output Current - A Figure 10. 6 2 Figure 9. 60 30 100 LFM 20 (2) 0 70 Nat conv (1) VO = 1.2 TEMPERATURE DERATING vs OUTPUT CURRENT 90 30 VO = 0.7 Figure 8. TEMPERATURE DERATING vs OUTPUT CURRENT 40 1.0 0 Figure 7. 50 1.5 0.5 5 0 VO = 3.3 2.0 8 10 Figure 11. The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the converter. Applies to Figure 7, Figure 8, and Figure 9. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm × 100 mm double-sided PCB with 1 oz. copper. Applies to Figure 10. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 APPLICATION INFORMATION ADJUSTING THE OUTPUT VOLTAGE The VOAdjust control (pin 5) sets the output voltage of the PTR08100W product. The adjustment range is from 0.6 V to 5.5 V. The adjustment method requires the addition of a single external resistor, RSET, that must be connected directly between the VOAdjust and GND pin 3. Table 1 gives the standard external resistor for a number of common bus voltages, along with the actual voltage the resistance produces. For other output voltages, the value of the required resistor can either be calculated using the following formula, or simply selected from the range of values given in Table 2. Figure 12 shows the placement of the required resistor. RSET = 1.182 (kW ) VO - 0.591 Table 1. Standard Values of RSET for Common Output Voltages VI VO (V) (Required) RSET (kΩ) (Standard Value) VO(V) (Actual) 5 (1) 0.267 5.018 3.3 0.432 3.327 2.5 0.619 2.501 1.8 0.976 1.802 1.5 1.3 1.500 1.2 1.91 1.210 1 2.87 1.003 0.7 10.7 0.701 (1) The minimum input voltage is 4.5 V or (VO/0.83) V, whichever is greater. 2 VI VO VO 4 PTR08100W 1 Inhibit CI GND VOAdjust 3 5 CO RSET 1%, 0.05 W GND GND UDG-07116 (1) A 0.05-W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C (or better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 5 and 3 using dedicated PCB traces. (2) The VOAdjust pin must never be connected directly to GND. The minimum resistance between VOAdjust and GND is limited to 240 Ω. (3) Never connect capacitors from VOAdjust to either GND or VO. Any capacitance added to the VOAdjust pin will affect the stability of the regulator. Figure 12. VO Adjust Resistor Placement Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W 7 PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 Table 2. Calculated RSET Resistor Values VO Req'd (V) RSET (kΩ) VO Req'd (V) RSET(kΩ) VO Req'd (V) RSET(kΩ) 0.6 131 2.3 0.692 4.0 0.347 0.7 10.8 2.4 0.653 4.1 0.337 0.8 5.66 2.5 0.619 4.2 0.328 0.9 3.83 2.6 0.588 4.3 0.319 1.0 2.89 2.7 0.560 4.4 0.310 1.1 2.32 2.8 0.535 4.5 0.302 1.2 1.94 2.9 0.512 4.6 0.295 1.3 1.67 3.0 0.491 4.7 0.288 1.4 1.46 3.1 0.471 4.8 0.281 1.5 1.30 3.2 0.453 4.9 0.274 1.6 1.17 3.3 0.436 5.0 0.268 1.7 1.07 3.4 0.421 5.1 0.262 1.8 0.978 3.5 0.406 5.2 0.256 1.9 0.903 3.6 0.393 5.3 0.251 2.0 0.839 3.7 0.380 5.4 0.246 2.1 0.783 3.8 0.368 5.5 0.241 2.2 0.735 3.9 0.357 CAPACITOR RECOMMENDATIONS FOR THE PTR08100W POWER MODULE Capacitor Technologies Electrolytic Capacitors When using electrolytic capacitors, high-quality, computer-grade electrolytic capacitors are recommended. Aluminum electrolytic capacitors provide adequate decoupling over the frequency range of 2 kHz to 150 kHz, and are suitable when ambient temperatures are above -20°C. For operation below -20°C, tantalum, ceramic, or OS-CON type capacitors are required. Ceramic Capacitors The performance of aluminum electrolytic capacitors is less effective above 150 kHz. Multilayer ceramic capacitors have a low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. Tantalum, Polymer-Tantalum Capacitors Tantalum type capacitors may only used on the output bus, and are recommended for applications where the ambient operating temperature is less than 0°C. The AVX TPS series and Kemet capacitor series are suggested over many other tantalum types due to their lower ESR, higher rated surge, power dissipation, and ripple current capability. Tantalum capacitors that have no stated ESR or surge current rating are not recommended for power applications. 8 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 Input Capacitor (Required) The PTR08100W requires a minimum input capacitance of 100µF. The ripple current rating of the electrolytic capacitor must be at least 750mArms. An optional 22-µF X5R/X7R ceramic capacitor is recommended to reduce the RMS ripple current. Table 3 includes a preferred list of capacitors by vendor. Input Capacitor Information The size and value of the input capacitor is determined by the converter’s transient performance capability. The minimum value assumes that the converter is supplied with a responsive, low-inductance input source. The source should have ample capacitive decoupling, and be distributed to the converter via PCB power and ground planes. Ceramic capacitors should be located as close as possible to the module's input pins, within 0.5 inch (1.3 cm). Adding ceramic capacitance is necessary to reduce the high-frequency ripple voltage at the module's input. This reduces the magnitude of the ripple current through the electroytic capacitor, as well as the amount of ripple current reflected back to the input source. Additional ceramic capacitors can be added to further reduce the RMS ripple current requirement for the electrolytic capacitor. The main considerations when selecting input capacitors are the RMS ripple current rating, temperature stability, and maintaining less than 100 mΩ of equivalent series resistance (ESR). Regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended minimum voltage rating of 2 × (maximum dc voltage + ac ripple). This is standard practice to ensure reliability. No tantalum capacitors were found to have voltage ratings sufficient to meet this requirement. When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered. Output Capacitor (Required) The PTR08100W requires a minimum 100µF of non-ceramic output capacitance. Additional non-ceramic, low-ESR capacitance is recommended for improved performance. See data sheet for maximum capacitance limits. The required capacitance above the minimum is determined by actual transient deviation requirements. Table 3 includes a preferred list of capacitors by vendor. Output Capacitor Information When selecting output capacitors, the main considerations are capacitor type, temperature stability, and ESR. Ceramic output capacitors added for high-frequency bypassing should be located as close as possible to the load to be effective. Ceramic capacitor values below 10µF should not be included when calculating the total output capacitance value. When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered. Designing for Fast Load Transients The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 2.5 A/µs. The typical voltage deviation for this load transient is given in the Electrical Characteristics table using the minimum required value of output capacitance. As the di/dt of a transient is increased, the response of a converter’s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional low ESR ceramic capacitor decoupling. Generally, with load steps greater than 100 A/µs, adding multiple 10-µF ceramic capacitors plus 10×1µF, and numerous high frequency ceramics (≤0.1µF) is all that is required to soften the transient higher frequency edges. The PCB location of these capacitors in relation to the load is critical. DSP, FPGA and ASIC vendors identify types, location and amount of capacitance required for optimum performance. Low impedance buses, unbroken PCB copper planes, and components located as close as possible to the high frequency devices are essential for optimizing transient performance. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W 9 PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 Table 3. Recommended Input/Output Capacitors (1) Capacitor Characteristics Capacitor Vendor, Type/Series (Style) Working Value Voltage (µF) (V) Quantity Max ESR at 100 kHz (Ω) Max Ripple Current at 85°C (Irms) (mA) Physical Size (mm) Input Bus Output Bus Vendor Number Panasonic, Aluminum 25 330 0.090 775 10 × 12,5 1 1 EEUFC1E331 FC (Radial) 35 180 0.090 775 10 × 12,5 1 1 EEUFC1V181 FK (SMD) 25 470 0.080 850 10 × 10,2 1 1 EEVFK1E471P PXA-Poly-Aluminum (SMD) 16 150 0.026 3430 10 × 7,7 1 ≤4 PXA16VC151MJ80TP PS (Radial) 20 100 0.024 3300 8 × 11,5 1 ≤4 20PS100MH11 LXZ, Aluminum (Radial) 35 220 0.090 760 10 × 12,5 1 1 LXZ35VB221M10X12LL HD (Radial) 25 220 0.072 760 8 × 11,5 1 1 UHD1E221MPR PM (Radial) 35 220 0.090 770 10 × 15 1 1 UPM1V221MHH6 Sanyo SVP, Os-con (SMD) 20 100 0.024 3300 8 × 12 1 ≤4 20SVP100M SEQP, Os-con (Radial) 20 100 0.024 3300 8 × 12 1 ≤4 20SEQP100M TPE, Pos-Cap (SMD) 10 220 0.025 2400 7,3 × 5,7 N/R (2) ≤4 10TPE220ML AVX, Tantalum 10 100 0.100 1090 7,3 × 4,3 × 4,1 N/R (2) ≤5 TPSD107M010R0100 TPS (SMD) 10 220 0.100 1414 7,3 × 4,3 × 4,1 N/R (2) ≤5 TPSV227M010R0100 25 68 0.095 1451 7,3 × 4,3 × 4,1 2 ≤5 TPSV686M025R0080 T520, Poy-Tant (SMD) 10 100 0.080 1200 7,3 × 5,7 × 4 N/R (2) ≤5 T520D107M010AS T495, Tantalum (SMD) 10 100 0.100 1100 7,3 × 5,7 × 4 N/R (2) ≤5 T495X107M010AS Vishay-Sprague 10 150 0.090 1100 7,3 × 6 × 4,1 N/R (2) ≤5 594D157X0010C2T 594D, Tantalum (SMD) 25 68 0.095 1600 7,3 × 6 × 4,1 2 ≤5 594D686X0025R2T 94SP, Organic (Radial) 16 100 0.070 2890 10 × 10,5 1 ≤5 94SP107X0016FBP 94SVP, Organic (SMD) 20 100 0.025 3260 8 × 12 1 ≤4 94SVP107X0020E12 Kemet, Ceramic X5R (SMD) 16 10 0.002 – 1210 case 1 (3) ≤5 C1210C106M4PAC 6.3 47 0.002 3225 mm N/R (2) ≤5 C1210C476K9PAC 6.3 100 0.002 1210 case N/R (2) ≤3 GRM32ER60J107M 6.3 47 3225 mm N/R (2) ≤5 GRM32ER60J476M 16 22 1 (3) ≤5 GRM32ER61C226L 16 10 1 (3) ≤5 GRM32DR61C106K 1210 case N/R (2) ≤3 C3225X5ROJ107MT 3225 mm N/R (2) ≤5 C3225X5ROJ476MT United Chemi-Con Nichicon Aluminum Kemet Murata, Ceramic X5R (SMD) TDK, Ceramic X5R (SMD) (1) (2) (3) 10 0.002 – 6.3 100 6.3 47 – 16 22 1 (3) ≤5 C3225X5R1C226MT 16 10 1 (3) ≤5 C3225X5R1C106MT Capacitor Supplier Verification Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of limited availability or obsolete products. In some instances, the capacitor product life cycle may be in decline and have short-term consideration for obsolescence. RoHS, Lead-free and Material Details Please consult capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements. Component designators or part number deviations can occur when material composition or soldering requirements are updated. N/R – Not recommended. The capacitor voltage rating does not meet the minimum operating limits. Ceramic capacitors are required to complement electrolytic types at the input and to reduce high-frequency ripple current. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 Power-Up Characteristics When configured per the standard application, the PTR08100W power module produces a regulated output voltage following the application of a valid input source voltage. During power up, internal soft-start circuitry slows the rate that the output voltage rises, thereby limiting the amount of in-rush current that can be drawn from the input source. The soft-start circuitry introduces a short time delay (typically 10 ms) into the power-up characteristic. This is from the point that a valid input source is recognized. Figure 13 shows the power-up waveforms for a PTR08100W, operating from a 12-V input and with the output voltage adjusted to 3.3 V. The waveforms were measured with a 6-A constant current load. VI (5 V/div) VO (2 V/div) II (2 A/div) t − Time − 4 ms/div Figure 13. Power-Up Waveforms Overcurrent Protection For protection against load faults, the PTR08100W incorporates output overcurrent protection. Applying a load that exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown, the module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W 11 PTR08100W www.ti.com SLTS284B – AUGUST 2007 – REVISED DECEMBER 2007 Output On/Off Inhibit For applications requiring output voltage on/off control, the PTR08100W power module incorporates an output on/off Inhibit control (pin 1). The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The power module functions normally when the Inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to Vin with respect to GND. Figure 14 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit control has its own internal pullup to VI potential. An open-collector or open-drain device is recommended to control this input. Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then turned off, the module will execute a soft-start power-up sequence. A regulated output voltage is produced within 20 msec. Figure 15 shows the typical rise in the output voltage, following the turn off of Q1. The turn off of Q1 corresponds to the rise in the waveform, VINH. The waveforms were measured with a 6-A constant current load. VI 2 VI PTR08100W 1 CI Inhibit GND 3 1=Inhibit GND UDG-07117 Figure 14. On/Off Inhibit Control Circuit VINH (1 V/div) VO (2 V/div) II (2 A/div) t − Time − 4 ms/div Figure 15. Power Up Response From Inhibit Control 12 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): PTR08100W PACKAGE OPTION ADDENDUM www.ti.com 10-Mar-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing PTR08100WVD ACTIVE SIP MOD ULE EDN Pins Package Eco Plan (2) Qty 5 80 Pb-Free (RoHS) Lead/Ball Finish Call TI MSL Peak Temp (3) N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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