ETC SSD1303

MODULE NO.: LPST128064A00-AB
DOC.REVISION: 0.0
SIGNATURE
PREPARED BY
Fr.li
17-Feb-05
APPROVED BY
(R&D)
Wayne Zhao
18-Feb-05
APPROVED BY
(Marketing)
Nick Poon
18-Feb-05
PRODUCT PREVIEW
Product Part#: LPST128064A00-AB
Product Name: 128x64 Area Color OLED Module
Revision:
0.0
Date:
Feb’2005
This document contains information on a new product. Specifications and information herein are subject to change without notice.
REVISION RECORD
Revision
0.0
Description of Revision
Initial release
LPST128064A00-AB
i
Revision date
Remark
17-Feb-05
--
Rev: 0.0
Feb 2005
TABLE OF CONTENTS
1. Functions & features
1
2. Mechanical specifications
1
3. Block diagram
1
4. Dimensional outline
2
5. Pin description
3
6. Absolute maximum ratings
4
7. Optics & electrical characteristics
5
8. Electrical characteristics
5
9. Control and display command
9
10. Reference application circuit
12
11. Quality specifications
16
LPST128064A00-AB
ii
Rev: 0.0
Feb 2005
1. FUNCTIONS & FEATURES
1.1. Format
1.2. Display mode
1.3. Display color
1.4. Duty
: 128*64 dots
: Passive Matrix
: Area Color (Light Blue, Yellow)
: 1/64
2. MECHANICAL SPECIFICATIONS
2.1. Module size
2.2. Panel size
2.3. Viewing area
2.4. Active area
2.5. Dot pitch
2.6. Dot size
2.7. Thickness(with polarizer)
2.8. Weight
: 30.00mm(W)*34.66mm(H)
: 30.00mm(W)*20.16mm(H)
: 25.02mm(W)*13.86mm(H)
: 23.02mm(W)*11.86mm(H)
: 0.18mm(W)*0.18mm(H)
: 0.16mm(W)*0.16mm(H)
: 1.80mm
: 2.0g
3. BLOCK DIAGRAM
CS#
RES#
D/C
R/W(WR#)
E(RD#)
D7~D0
VCC
VCOMH
IREF
BS2
BS1
VDD
VBREF
RESE
FB
VDDB
GDR
VSS
SEG0~127
SSD1303
COM0~63
OLED Panel
128 X 64 Dots
Figure 1: Block diagram
LPST128064A00-AB
Page 1
Rev: 0.0
Feb 2005
Page 2
1
N.C.
N.C.
N.C.
VDD
BS1
BS2
N.C.
CS#
RES#
D/C#
R/W#
E/RD#
D0
D1
D2
D3
D4
D5
D6
D7
IREF
VCOMH
VCC
1). OLED COLOR: Area color(Light Blue, Yellow)
2). 1/64 Duty
3). Operating temp.: -20~70°C
Storage temp.: -30~80° C
4). Using IC: SSD1303T6 TCP chip
5). Polarizer tape: transmissive(42%)
Specification:
N.C.
Active Area 1.02"
128X64 Pixels
RESE
VBREF
LPST128064A00-AB
31
N.C.
1
FIT
1
mm
LPST128064A00-AB
Blue
128X48
Yellow
128X16
First ISSUE
Detail A
Scale (10:1)
±0.20mm
A
A00
FGE-OT128064A0-00
Feb-18-2005
4. DIMENSIONAL OUTLINE
Figure 2: Dimensional outline
Rev: 0.0
Feb 2005
VSS
GDR
VDDB
FB
5. PIN DESCRIPTION
Pin no.
Symbol
21
VDD
30
VSS
2
VCC
3
VCOMH
4
IREF
28
VDDB
29
GDR
27
FB
26
RESE
25
VBREF
20, 19
BS1, BS2
17
CS#
16
RES#
15
D/C
14
R/W(WR#)
LPST128064A00-AB
Function
This is the supply voltage pin to logic circuit. It must be connected to the
external power source.
This is the ground pin and is a reference for the logic pins. It must be
connected to the external ground.
Supply voltage for OLED
This is the supply voltage for OLED system and it is the most positive voltage
supply pin of the chip. It can be supplied externally or generated internally by
using internal DC/DC voltage converter.
This is an input pin and a capacitor should be connected between VCOMH
and VSS.
This is a segment current reference pin. A resistor should be connected
between IREF and VSS
This is a supply voltage pin for internal buffer DC/DC voltage converter. It
must be connected to VDD when the converter is used. When use external
VCC, the pin should be left open.
This is an output pin to drive the gate of the external NMOS of the booster
circuit. When use external VCC, the pin should be left open.
This is a feedback resistor input pin for the booster circuit. It is used to
adjust the booster output voltage VCC. When use external VCC, the pin
should be left open.
This is a source current pin of the external NMOS of the booster circuit. When
use external VCC, the pin should be left open.
This is an internal voltage reference pin for booster circuit. A stabilization
capacitor should be connected to VSS. When use external VCC, the pin should
be left open.
These pins are for MCU selection.
•
BS1=0 and BS2=1 for 6800 parallel interface
•
BS1=1 and BS2=1 for 8080 parallel interface
•
BS1=0 and BS2=0 for SPI
This pin is the chip select input. Pull “Low” to enable the chip for MCU
communication.
This pin is reset signal input.
•
Pull “Low” for the initialization of the chip.
This pin is used for Data/Command selection.
•
Pull “Low” to set the D7~D0 inputs as command to control the chip.
•
Pull “High” to set the D7~D0 inputs as display data.
This pin is MCU interface input.
- For 6800-series parallel interface,
•
This pin is used as Read/Write (R/W) selection input.
•
Pull “High” to set Read mode provided that CS# is “Low”.
•
Pull “Low” to set Write mode provided that CS# is “Low”.
- For 8080-series parallel interface,
•
This pin is used for receiving the Write (WR#) signal.
•
Pull “Low” to initiate data write operation provided that CS# is “Low”;
•
Pull “High” to stop Write operation.
- For Serial peripheral interface,
•
This pin must be connected to VSS.
Page 3
Rev: 0.0
Feb 2005
Pin no.
Symbol
13
E(RD#)
5 ~ 12
D7 ~ D0
1, 18, 22,
23, 24 31
N.C.
Function
This pin is MCU interface input.
- For 6800-series parallel interface,
•
This pin is used as the Enable (E) signal.
•
Pull “High” to enable the chip to initiate Read/Write operation provided that
CS# is “Low”.
•
Pull “Low” to disable the Read/Write operation.
- For 8080-series parallel interface,
•
This pin is used for receiving the Read (RD#) signal.
•
Pull “Low” to initiate data read operation provided that CS# is “Low”.
•
Pull “High” to stop Read operation.
- For Serial peripheral interface,
•
This pin must be connected to VSS.
These pins are 8-bit bi-directional data bus.
They should be connected to the microprocessor’s data bus. When serial
interface mode is selected, D1 will be the serial data input and D0 will be the
serial clock input.
Reserved pins and should not be connected together.
Table1: Pin Description
6. ABSOLUTE MAXIMUM RATINGS
6.1 Absolute Maximum Ratings
Parameter
Symbol
Min
Max
Unit
Notes
Supply Voltage
VDD
-0.3
4.0
V
1,2
Driver Supply Voltage
VCC
0
15.0
V
1,2
Operating Temperature
TOP
-20
70
o
C
--
Storage Temperature
TSTG
-30
80
o
C
--
Table2: Absolute Maximum Ratings
Note 1: All above voltages are on the basis of “VSS = 0.0V”.
Note 2: When this module is used beyond above absolute maximum ratings, permanent breakage of the
module may occur. For normal operations, it is desirable to use this module under the conditions
according to Section “Electrical Characteristics”. If this module is used beyond these conditions,
malfunctioning of the module will occur and the reliability of the module may deteriorate.
6.2 Regarding the Gradation
Although this module possesses the gradation function, respective gradation levels will vary
depending on the production conditions etc. The temperature range where the gradation
function can be guaranteed is -10 oC ~ 60 oC.
LPST128064A00-AB
Page 4
Rev: 0.0
Feb 2005
7. OPTICS & ELECTRICAL CHARACTERISTICS
Characteristics
Symbol
Conditions
Min
Typ
Max
Unit
Brightness
Lbr
X
Y
X
Y
CR
A
With polarizer
35
0.12
0.24
0.43
0.46
->160
60
0.16
0.28
0.47
0.50
>100
--
-0.20
0.32
0.51
0.54
---
Cd/m2
-----degree
CIE (Blue)
CIE (Yellow)
Dark Room Contrast
View Angle
Without polarizer
Without polarizer
---
Table 3: Optics & electrical characteristics
Note: Optical measurement is taken at 1/64 duty,100Hz Frame Rate, 0xFF Contrast setting.
8. ELECTRICAL CHARACTERISTICS
8.1 DC Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDD
Supply Voltage for logic
--
2.6
2.8
3.5
V
VCC
Operating Voltage for OLED
--
8
9
10
V
VIH
High Level Input
--
0.8*VDD
--
VDD
V
VIL
Low Level Input
--
0.0
--
0.2*VDD
V
VOH
High Level Output
--
0.9*VDD
--
VDD
V
VOL
Low Level Output
--
0.0
--
0.1*VDD
V
--
TBD
TBD
mA
--
TBD
TBD
mA
--
TBD
TBD
mA
--
TBD
TBD
mA
IDD
ICC
Operating Current at VDD
Operating Current at VCC
VDD = 2.8V, VCC = 9.0V,
Frame rate = 100Hz,
Contrast setting = 0xFF,
50% display area turn-on.
VDD = 2.8V, VCC = 9.0V,
Frame rate = 100Hz,
Contrast setting = 0xFF,
100% display area turn-on.
VDD = 2.8V, VCC = 9.0V,
Frame rate = 100Hz,
Contrast setting = 0xFF,
50% display area turn-on.
VDD = 2.8V, VCC = 9.0V,
Frame rate = 100Hz,
Contrast setting = 0xFF,
100% display area turn-on.
Table 4: DC characteristics
LPST128064A00-AB
Page 5
Rev: 0.0
Feb 2005
8.2 AC Characteristics
8.2.1
6800-Series MPU Parallel Interface Timing Characteristics
Symbol
tcycle
tAS
tAH
tDSW
tDHW
tDHR
tOH
tACC
PWCSL
PWCSH
tR
tF
Parameter
Clock cycle time
Address Setup Time
Address Hold Time
Write Data Setup Time
Write Data Hold Time
Read Data Hold Time
Output Disable Time
Access Time
Chip Select Low Pulse Width (read)
Chip Select Low Pulse Width (write)
Chip Select High Pulse Width (read)
Chip Select High Pulse Width (write)
Rise time
Fall time
Min
300
0
0
40
15
20
--120
60
60
60
---
Max
------70
140
----15
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
D/C
tAS
tAH
R/W
E
tcycle
PWCSL
PWCSH
tR
CS#
tF
tDSW
tDHW
Valid Data
D0~D7(WRITE)
tACC
tDHR
Valid Data
D0~D7(READ)
tOH
Figure 3: Timing diagram for 6800-series MPU parallel interface
LPST128064A00-AB
Page 6
Rev: 0.0
Feb 2005
8.2.2
8080-Series MPU Parallel Interface Timing Characteristics
Symbol
tcycle
tAS
tAH
tDSW
tDHW
tDHR
tOH
tACC
PWCSL
PWCSH
tR
tF
Parameter
Clock cycle time
Address Setup Time
Address Hold Time
Write Data Setup Time
Write Data Hold Time
Read Data Hold Time
Output Disable Time
Access Time
Chip Select Low Pulse Width (read)
Chip Select Low Pulse Width (write)
Chip Select High Pulse Width (read)
Chip Select High Pulse Width (write)
Rise time
Fall time
Min
300
0
0
40
15
20
--120
60
60
60
---
Max
------70
140
----15
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
D/C
tAS
tAH
WR#
RD#
tcycle
PWCSL
PWCSH
tR
CS#
tF
tDSW
tDHW
Valid Data
D0~D7(WRITE)
tACC
tDHR
Valid Data
D0~D7(READ)
tOH
Figure 4: Timing diagram for 8080-series MPU parallel interface
LPST128064A00-AB
Page 7
Rev: 0.0
Feb 2005
8.2.3
Serial Interface Timing Characteristics
Symbol
tcycle
tAS
tAH
tCSS
tCSH
tDSW
tDHW
tCLKL
tCLKH
tR
tF
Parameter
Clock cycle time
Address Setup Time
Address Hold Time
Chip Select Setup Time
Chip Select Hold Time
Write Data Setup Time
Write Data Hold Time
Clock Low Time
Clock High Time
Rise time
Fall time
Min
200
150
150
120
60
100
100
100
100
---
Max
---------15
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
D/C
tAS
tAH
tCSH
tCSS
CS#
tCLKL
SCLK(D0)
tcycle
tCLKH
tR
tF
tDHW
tDSW
Valid Data
SDIN(D1)
CS#
SCLK(D0)
SDIN(D1)
D7
D6
D5
D4
D3
D2
D1
D0
Figure 5: Timing diagram for serial interface
LPST128064A00-AB
Page 8
Rev: 0.0
Feb 2005
9. CONTROL AND DISPLAY COMMAND
9.1 Command table
(D/C = 0, R/W (WR#) = 0, E(RD#) = 1)
LPST128064A00-AB
Page 9
Rev: 0.0
Feb 2005
LPST128064A00-AB
Page 10
Rev: 0.0
Feb 2005
Note: Remark “*” stands for “Don’t Care”
Table 5: Command Table
LPST128064A00-AB
Page 11
Rev: 0.0
Feb 2005
9.2 Read command table
(D/C = 0, R/W(WR#) = 1, E(RD#) = 1 for 6800 or E(RD#) = 0 for 8080)
Note: Patterns other than that given in Command Table are prohibited to enter to the chip as a command; otherwise, unexpected result
will occur.
Table 6: Read Command Table
10. REFERENCE APPLICATION CIRCUIT
1
C1
D1
2
C4
VDD
SHDN
LX
AIC1896CE
C5
VCC
R1
C2
SS U1 FB
GND
R2
C3
3
VCOMH
C7
Ref
D7
D6
D5
D4
D3
D2
D1
D0
RD
WR
RS
RESET
CS
VDD or VSS
VDD or VSS
VDD_LOGIC
C6
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
IREF
D7
D6
D5
D4
D3
D2
D1
D0
E(RD#)
R/W(WR#)
D/C
RES#
CS#
N.C.
BS2
BS1
VDD
N.C.
N.C.
N.C.
VBREF
RESE
FB
VDDB
GDR
VSS
N.C.
128x64 OLED Panel
L1
VDD_ANALOG
NC
SSD1303
Figure 6: Reference Application Circuit (using external DC/DC voltage converter)
LPST128064A00-AB
Page 12
Rev: 0.0
Feb 2005
Notes:
• MPU interface: 8-bit 6800-series/8080-series parallel interface or Serial interface.
pin selectable by BS1 and BS2.
6800-series
8080-series
Serial
parallel interface parallel interface
interface
0
1
0
BS1
1
1
0
BS2
• U1: AIC1896 DC/DC Converter
• AIC1896CE can be connected to MCU or VDD for alternative solution.
• VCC = 1.23 x (R1 + R2)/R2
It is
Below table is the component list for the application circuit.
Item
SSD1303
Description
OLED Driver IC (Solomon)
U1
DC/DC Converter – AIC1896 Step-up(AIC)
L1
Inductor – 15µH, 2A
D1
Schottky Diode – 20V, 1A
R1
Resistor – 820kΩ , 1%, 1/4W
R2
Resistor – 130kΩ , 1%, 1/4W
Ref
Resistor – 910kΩ , 1% (see remark)
C1
Capacitor – 10µF, 6.3V, Low ESR
C2
Capacitor – 10µF, 16V, Low ESR
C3
Capacitor – 1µF, 16V, Low ESR
C4
Capacitor – 15nF, 16V, Low ESR
C5
Capacitor – 0.033µF, 6.3V, Low ESR
C6
Capacitor – 4.7µF, 6.3V, Low ESR
C7
Tantalum Capacitor – 1.0µF~2.2µF, 16V
Table 7: Component list for the external DC-DC voltage converter application circuit
LPST128064A00-AB
Page 13
Rev: 0.0
Feb 2005
2
VCC
3
4
C2
VCOMH
IREF
Ref
5~12
D7~D0
13
E(RD#)
14
R/W(WR#)
D/C
RES#
CS#
R/W(WR#)
D/C
16
RES#
17
CS#
20
VDD or VSS
E(RD#)
15
19
VDD or VSS
D7~D0
BS2
BS1
VDD
21
VCC
D1
C9
C8
C7
25
L1
26
R3
27
R4
C6
28
Q1
29
30
C5
C4
C3
VDD
VBREF
RESE
128x64 OLED Panel
C1
VCC
FB
VDDB
GDR
VSS
R2
SSD1303
Figure 7: Reference Application Circuit (using internal DC/DC voltage converter)
Notes:
• MPU interface: 8-bit 6800-series/8080-series parallel interface or Serial interface.
pin selectable by BS1 and BS2.
6800-series
8080-series
Serial
parallel interface parallel interface
interface
0
1
0
BS1
1
1
0
BS2
• L1, D1, Q1 and C4 should be grouped closed together on PCB layout
• R2, R3, C5 and C6 should be grouped closed together on PCB layout
• The VCC output voltage level is adjusted by R2 and R3, the formula is:
VCC = 1.2 x (R2+R3)/R3
The value of (R2+R3) should be between 500k to 1M ohm.
LPST128064A00-AB
Page 14
Rev: 0.0
Feb 2005
It is
Below table is the component list for the application circuit.
Item
SSD1303
Q1
Description
OLED Driver IC (Solomon)
MOSFET – N-FET with low RDS(on) and low Vth voltage, eg,
MGSF1N02Lt1 (On Semi)
L1
Inductor – 10µH, 1A
D1
Schottky diode – 1A, 25V, eg, 1N5822, BAT54 (Philips Semi)
Ref
Resistor – 1%, 1/2W (see remark)
R1
Resistor – 1.2Ω , 1%, 1/2W
R2, R3
Resistor – 1%, 1/10W
C1
Capacitor – 4.7µF, 16V
C2
Tantalum Capacitor – 1.0µF~2.2µF, 16V
C3
Capacitor – 0.1 ~ 1µF, 16V
C4
Capacitor – 1 ~ 10µF, 16V
C5
Capacitor – 1µF, 16V
C6
Capacitor – 10nF, 16V
C7
Capacitor – 15nF, 16V
C8
Capacitor – 6.8µF, 25V, Low ESR
C9
Capacitor – 1µF, 16V
Table 8: Component list for the internal DC-DC voltage converter application circuit
Remark:
Ref = (Voltage at IREF pin – VSS)/IREF;
Voltage at IREF pin = VCC - VDD
For example, VDD = 3.0V, VCC = 12V, IREF = 10µA
Ref = (12-3)/10-6 = about 910kΩ
LPST128064A00-AB
Page 15
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Feb 2005
11. QUALITY SPECIFICATIONS
11.1 Inspection Method:
11.1.1 Applicable Standard
MIL-STD-105E, Level II, Normal Inspection, single sampling
11.1.2 AQL
Partition
AQL
Major
0.65
Minor
1.0
Definition
Defects may lead to the failure of display function or the
failure of passing the reliability criteria.
Defects do not affect all of the display functions, and have no
impact to the reliability.
11.1.3 Inspection Condition
Test and measurement were conducted under the following conditions:
Temperature: 23±5℃
Humidity: 55±15%RH
Distance between the panel and eyes of the inspector: ≥30cm
11.2 Inspection Criterion
Check Item
Non operation/display
Classification
Criteria
major
Not Allowable
Flicker
Miss line or pixel
Wrong display
Cross talk *
Scratches, fiber **
minor
Dirt, Black spot, white spot,
Greasy dirt, Foreign material,
Dent, Bubbles **
Fingerprint, Flow mark
minor
W ≤ 0.05
Ignore
W ≤ 0.1, L ≤ 2
n≤3
2<L
n=0
Ф ≤ 0.1
Ignore
0.1 < Ф≤0.2
n≤3
0.2 < Ф≤0.25
n≤1
0.25 < Ф
n≤0
Not allowable
* In displays which manifests itself has the other shadowing, ghosting or streaking.
** Distance between any 2 defects should over 10mm
*** Definition of W & L & Ф (unit: mm):
Ф=(a+b)/2
L
W
b: Minor Axis
LPST128064A00-AB
a: Major Axis
Page 16
Rev: 0.0
Feb 2005
Visual check in non-active area
Check Item
Classification
Criteria
X≤1/6 Panel Length
Y≤1
Z≤T
X
Z
T
Panel
General Chipping
Major
Y
X
Z
Y
Any crack is not allowable
Panel Crack
Terminal cable: twist, Scar,
Split, Scratch
LPST128064A00-AB
minor
Minor
Page 17
Not Allowable
Rev: 0.0
Feb 2005
11.3 Reliability
11.3.1 Contents of Reliability Tests
Item
Condition
Criteria
High Temperature Operation
70°C, 240 hrs
Low Temperature Operation
-20°C, 240 hrs
High Temperature Storage
80°C, 240 hrs
No such changes as
Low Temperature Storage
-30°C, 240 hrs
to obstruct image
High Temperature /Humidity Storage 60°C, 90%RH, 240 hrs
Thermal Shock
-30°C
& function
80°C, 10 cycles
30 mins dwell
* The samples used for above tests do not include polarizer.
* No moisture condensation is observed during tests.
11.3.2 Lifetime
End of lifetime is specified as 50% of initial brightness.
An average operating lifetime of more than 10,000 hrs at room temperature is approached by
240 hrs @ 70°C operating.
11.3.3 Failure Check Standard
After the completion of the described reliability test, the samples were left room temperature for
2 hrs prior to conducting the failure teat at 23±5℃; 55±15% RH.
LPST128064A00-AB
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Feb 2005
Lite Array reserves the right to make changes without further notice to any products described herein. Unless specifically agreed to by Lite Array in
writing in a particular instance, Lite Array makes no warranty, representation or guarantee, express or implied, regarding the suitability of its
products for any particular purpose, nor does Lite Array assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in
different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical
experts. Unless specifically agreed to by Lite Array in writing in a particular instance, Lite Array does not convey any license under its patent rights
nor the rights of others. Lite Array products are not designed, intended, or authorized for use as components in systems intended for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Lite Array
product could create a situation where personal injury or death may occur. Should Buyer purchase or use Lite Array products for any such
unintended or unauthorized application, Buyer shall indemnify and hold Lite Array and its offices, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal
injury or death associated with such unintended or unauthorized use, even if such claim alleges that Lite Array was negligent regarding the design
or manufacture of the part. The purchase of a Lite Array product by a buyer shall, for such product, be deemed an acceptance by the buyer of the
terms set forth above.
LPST128064A00-AB
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