CT1496-2
MIL-STD-1397 Type E 10MHz
Low Level Serial Manchester 32 Bit Encoder
Features
Implements Type E protocol
Operates with a single +5V supply
Single clock input (40MHz)
Selectable 4, 34, 35 bit operation
Selectable Parity
Includes parallel to serial converter
Self-test outputs for BITE applications
External encoder inhibit
Bipolar Construction
Use with CT1469-2 (transceiver) & CT1508-2 (4 bit decoder)
to provide a complete low level serial interface
CIRCUIT TECHNOLOGY
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AE R O
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RTIFIED
General Description
CT1496-2 is a hybrid microcircuit which incorporates a low level serial Manchester encoder in a single
package. The encoder accepts 32 bit parallel data and outputs a 35 bit Manchester encoded TTL NRZ serial
stream (34 bit transmission if parity option is not selected). Preceding the 32 data bits are a synchronization
and word identifier bit and a parity bit trails the data (parity is optional and may be disabled). A self-test feature
is implementd allowing the user to verify transmit patterns. Aeroflex Circuit Technology is a 80,000 square
foot MIL-PRF-38534 certified facility in Plainview, N.Y.
Sync
Bit
External
Encoder
Inhibit
WI
Bit
LSB
32-Bit
Word
Register
32-Bit
Parallel
Word Input
2-Bit
Register
Mux
Manchester
Encoder
DeMux
TX Data
TX Data
Data ST
Data ST
MSB
Sys Clr / Load
SIS/SOS
Input
+5V
Parity
Select
Encoder
Enable
Transmit /
Self-Test
4-Bit SIS/SOS
Select
34-Bit
Select
35-Bit
Select
Sync
Data
C/I
Bit4
Timing
Section
4-Bit
Register
Vcc
Controller
Parity
Generator
TX Inhibit
40MHz
Clock TTL
GND
Block Diagram
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Aeroflex Circuit Technology
40MHz
Parallel
Input Data (DBN)
OUTPUT LOGIC STATE TRUTH TABLE
CONDITIONS
OUTPUT STATES
Bit 1
TX INH (29) TX/ST (37) DATA (39) DATA (38) DATAst (33) DATAst (32)
Bit 2
Bit 3
Bit 3
System
Clear / Load
Encoder Enable
T1
LOW
LOW
HIGH
HIGH
LOW
LOW
LOW
HIGH
HIGH
HIGH
LOW
LOW
HIGH
LOW
HIGH
HIGH
(DBn)
(DBn)
HIGH
HIGH
(DBn)
(DBn)
LOW
LOW
T2
PW1
T3
PW2
2
T4
TX Inhibit
Transmit /
Self Test
DATA
T5
T7
T6
T10
PW4
SCDCT1496 REV A 3/22/00 Plainview NY (516) 694-6700
PW3
DATA
DATAst
T11
T8
T10
T9
T10
PW6
PW5
DATAst
Output
Data Bit 1
Example
=1
Output
Data Bit 2
Example
=1
T10
Output
Data Bit 3
Example
=0
Figure 1 – Encoder Timing Waveforms
Output
Data Bit N
Example
=1
Absolute Maximum Ratings
Parameter
Rating
Units
Supply Voltage 1/
+7.0
V
Logic Input Voltage
-1.2 to +5.5
V
Logic Input Current
-10 (low logic)
mA
3.25
W
Storage Temperature Range
-65 to +125
°C
Operating Case Temperature Range
-55 to +100
°C
Power Dissipation 2/
1/ Power sequencing shall not be required.
2/ For Logic output short circuits, line to ground logic outputs shall withstand currents not exceeding 100mA for
one second for one output at a time.
DC Electrical Characteristics
(VDD = 5V ±10%, TC = -55 °C to +100°C, unless otherwise specified)
SYMBOL
PARAMETER
LIMIT
DATA 1/, DATA 1/, DATAst 2/ & DATAst 2/
VOH
Logic High Output Voltage 3/, 4/
2.5V min @ I OH = -50µA
VOL
Logic Low Output Voltage
0.5V max @ IOL = 2mA
4/
TX INHIBIT
VOH
Logic High Output Voltage 3/, 4/
2.5V min @ I OH = -150µA
VOL
Logic Low Output Voltage
0.5V max @ IOL = 5mA
4/
40MHz, Encoder Enable & External Encoder Inhibit
IIH
Logic High Input Current
100µA max @ VIH = 2.5V
IIL
Logic Low Input Current 3/
-4mA max @ VIL = 0.5V
Parity Select, 34 Bit Select, 35 Bit Select & Sys Clear / Load
IIH
Logic High Input Current
50µA max @ VIH = 2.5V
IIL
Logic Low Input Current 3/
-2mA max @ VIL = 0.5V
Transmit / Self Test & 4 Bit SIS / SOS Select
IIH
Logic High Input Current
150µA max @ VIH = 2.5V
IIL
Logic Low Input Current 3/
-6mA max @ VIL = 0.5V
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SCDCT1496 REV A 3/22/00 Plainview NY (516) 694-6700
DC Electrical Characteristics (con’t)
(VDD = 5V ±10%, T C = -55 °C to +100°C, unless otherwise specified)
SYMBOL
PARAMETER
LIMIT
Sync Bit, WI Bit, 4 Bit SIS / SOS Input & 32 Bit Parallel Word Input
IIH
Logic High Input Current
20µA max @ VIH = 2.5V
IIL
Logic Low Input Current 3/
-400µA max @ V IL = 0.5V
DC Supply Currents
ICC
VCC = +5.5V (pin 31), all other pins at GND
590mA max
Notes:
1/ and 2/ The total loads on these outputpairs (1 & 2) must be matched to within 15pF in order to
maintain signal skews between the lines of < 5nSec maximum.
3/ Current out of a terminal is given as a negative value.
4/ Maximum total capacitance loads allowable on these pins are:
DATA, DATA
TX INHIBIT
DATAst & DATAst
40 pF max
45 pF max
50 pF max
AC Electrical Characteristics
(VCC = 5V ±10%, T C = -55 °C to +100°C, See Figure 1, unless otherwise specified)
Symbol
T1
T2
PW1
T3
PW2
T4
T5
T6
T7
PW3
PW4
T8
T9
PW5
PW6
T10
T11
Parameter / Condition
Min
Max
Unit
Stable input data setup time prior to Sys Clr / Load rising edge
Stable input data hold time after Sys Clr / Load rising edge
Sys Clr / Load pulsewidth
Sys Clr / Load disable to Encoder Enable pulse
Encoder Enable pulsewidth
Encoder Enable rising edge to TX Inhibit disable (thruput delay)
Transmit / Self Test selection to TX Inhibit disable set-up time
TX Inhibit disable to output data delay
(Transmit / Self Test = high)
DATA Output to DATA output delay
{ZLOAD (DATA) = ZLOAD (DATA), CLOAD < 40pF}
DATA and DATA output half-bit pulsewidth
DATA and DATA output bit pulsewidth
TX Inhibit disable to output DATAST delay
DATAST output DATAST output delay
{ZLOAD (DATAST) = ZLOAD (DATAST), CLOAD < 50pF}
DATAST and DATAST output half-bit pulsewidth
DATAST and DATAST output bit pulsewidth
End of output DATA, DATA, DATAst or DATAst to TX Inhibit enable
TX Inhibit enable to next Transmit / Self Test selection
40
20
50
40
100
30
50
-
400
140
10
ns
ns
ns
ns
ns
ns
ns
ns
-
5
ns
47
97
-
53
103
10
5
ns
ns
ns
ns
47
97
50
53
103
10
-
ns
ns
ns
ns
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SCDCT1496 REV A 3/22/00 Plainview NY (516) 694-6700
Input Capacitance Table
Pin #
Pin Name
Maximum Input Capacitance
41
40 MHz
30 pF
40
Encoder Enable
30 pF
34
External Encoder Inhibit
30 pF
20
Parity Select
15 pF
22
34 Bit Select
15 pF
21
35 Bit Select
15 pF
42
Sys Clr / Load
15 pF
37
Transmit / Self Test
45 pF
36
4 Bit SIS / SOS Select
45 pF
15
WI Bit
15 pF
16
Sync Bit
15 pF
24 - 27
4 Bit SIS / SOS Input
15 pF
43 - 60, 1 - 14
32 Bit Parallel Word Input
15 pF
Word Selection Truth Table
4 Bit Select
34 Bit Select
35 Bit Select
Word Length
High
X
X
4 Bit
Low
High
X
34 Bit
Low
Low
High
35 Bit
Low
Low
Low
Illegal
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SCDCT1496 REV A 3/22/00 Plainview NY (516) 694-6700
Functional Description and Pinout
Pin #
Pin Name
31
VCC
39
DATA 1/
Manchester Encoder Serial DATA Output (Max Load 40 pF).
38
DATA 1/
Manchester Encoded Serial DATA Output (Max Load
40 pF).
29
TX Inhibit
Transmit Inhibit Output (Max load 45 pF).
33
DATAST 1/
Manchester Encoded Serial DATA Output for purpose of
self-testing. Connected to decoder self-test input.
Controlled by Transmit / Self-Test function (max load 50
pF).
32
DATAST 1/
Manchester Encoded Serial DATA Output for Purpose Of
Self-Testing. Connected to Decoder Self-test Input.
Controlled By Transmit / Self-Test Function. (Max Load
50 pF).
41
40 MHz
20
Parity Select
40
Encoder Enable
37
Transmit / Self-Test
36
4 Bit SIS / SOS Select
22
34 Bit Select
High level selects 34 Bit transmission (32 Data Bits, W1 Bit
and Sync Bit).
21
35 Bit Select
High level selects 35 Bit transmission (32 data Bits, W1 Bit,
Sync Bit and Parity Bit).
42
Sys Clr / Load
A low level allows data at input pins to be loaded, clears the
parity generator and initializes the internal controller. A
positive going edge latches input data present at that time
into the data registers.
Aeroflex Circuit Technology
Function
+5V ± 10%
40 MHz ± 0.1% TTL input to encoder. Symmetry 35% min.
Rise and fall times 5nSec max.
Low Level Input for even parity, high level input for odd
parity. Parity determined on 34 Bit word (Sync, W1, 32
Data Bits).
Asynchronous enable input pulse. Enables transmission
when a high level signal is input.
High level input enables transmission of data thru data and
data outputs: Disables DATAst and DATAst outputs; Which
both go to low logic state. Low level input enables
transmission of DATA thru DATAst and DATAst outputs;
Disables DATA and DATA outputs, which both go to high
logic state.
High level selects 4 Bit SIS/SOS transmission. This will
enable 4 Bit inputs to be loaded into the 4 Bit SIS / SOS
register
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SCDCT1496 REV A 3/22/00 Plainview NY (516) 694-6700
Functional Description and Pinout (con’t)
Pin #
Pin Name
Function
43-60
1-14
32 Bit Parallel
Word Input
(Pin 43 MSB)
(Pin 14 LBS)
32 Bit Parallel Input for Data Word. This data is latched into
the 32 Bit register on a Sys Clr / Load positive going edge.
16
Sync Bit
Input for Sync Bit which is latched into the 2 Bit Register on
a Sys Clr/Load positive going edge (Sync Bit always logic
high).
15
WI Bit
Input for Word Identifier Bit Which is latched into the 2 Bit
register on a Sys Clr / Load positive going edge.
24
25
26
27
4 Bit SIS / SOS Input:
Bit 4 (MSB)
C/I
Data
Sync (LSB)
4 Bit Parallel Input for SIS / SOS which is latched into the 4
Bit SIS/SOS Register on a Sys Clr / Load positive going
edge.
External Encoder
Inhibit
Asynchronous inhibit. A low forces DATA and DATA to a
common high state and DATAST and DATAst to a common
low state.
34
17
18
19
23
28
30
35
1/
Grounds. All ground pins are common and connected to
hybrid case.
Equal loads must be applied to these output pairs.
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SCDCT1496 REV A 3/22/00 Plainview NY (516) 694-6700
Pin #’s
Functions
Pin #’s
Functions
1
(BIT 14)
31
Vcc (+5V)
2
(BIT 13)
32
DATA ST
3
(BIT 12)
33
DATA ST
4
(BIT 11)
34
EXTERNAL ENCODER INHIBIT
5
(BIT 10)
35
GND
6
(BIT 9)
36
4 BIT SIS/SOS SELECT
7
(BIT 8)
37
TX/SELF TEST
8
(BIT 7)
38
SERIAL DATA
9
(BIT 6)
39
SERIAL DATA
10
(BIT 5)
40
ENCODER ENABLE
11
(BIT 4)
41
40MHz IN
12
(BIT 3)
42
SYS CLR/LOAD
13
(BIT 2)
43
(BIT 32) MSB
14
(BIT 1) LSB
44
(BIT 31)
15
W.I. BIT
45
(BIT 30)
16
SYNC BIT
46
(BIT 29)
17
GND
47
(BIT 28)
18
GND
48
(BIT 27)
19
GND
49
(BIT 26)
20
PARITY SELECT
50
(BIT 25)
21
35 BIT SELECT
51
(BIT 24)
22
34 BIT SELECT
52
(BIT 23)
23
GND
53
(BIT 22)
24
BIT 4 (MSB)
54
(BIT 21)
25
CLEAR/LOAD
55
(BIT 20)
26
DATA
56
(BIT 19)
27
SYNC (LSB)
57
(BIT 18)
28
GND
58
(BIT 17)
29
TX INHIBIT
59
(BIT 16)
30
GND
60
(BIT 15)
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SCDCT1496 REV A 3/22/00 Plainview NY (516) 694-6700
CIRCUIT TECHNOLOGY
Ordering Information
Model Number
Package
CT1496-2
Flat Package
Flat Package Outline
1.590 MAX
1.450
(30 Leads/Side on .050 centers)
.175 MAX
1.015
MAX
Lead 1 & ESD
Designator
.450
MIN
.015 ±.003
.010 ±.002
.050 TYP
Specifications subject to change without notice.
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11803
Aeroflex Circuit Technology
Telephone: (516) 694-6700
FAX:
(516) 694-6715
Toll Free Inquiries: 1-(800)THE-1553
9
SCDCT1496 REV A 3/22/00 Plainview NY (516) 694-6700