AGERE 1430G5(NETLIGHT)

Data Sheet, Rev 1.
August 2001
NetLight ® 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
■
Wide dynamic range receiver with InGaAs PIN
photodetector
■
LVTTL signal-detect output
■
Low power dissipation
■
Raised ECL (LVPECL) logic data interfaces
■
■
Available in a small form factor, plastic package, the
1430G5 are high-performance, cost-effective transceivers for
SONET/SDH long-reach applications at 155 Mbits/s.
Features
■
SONET LR-1/SDH L1.1 Compliant (ITU-T G.957
Specifications)
■
Small form factor, RJ-45 size, multisourced 20-pin
package
■
Requires single 3.3 V power supply
■
Clock recovery
■
Fiber pigtail
■
Uncooled 1300 nm laser transmitter with automatic
output power control
■
Transmitter disable input
■
Analog alarm outputs
Operating case temperature range: –40 °C to
+85 °C
Agere Systems Inc. Reliability and Qualification
Program for built-in quality and reliability
Description
The 1430G5-Type transceiver is a high-speed, costeffective optical transceiver that is compliant with the
International Telecommunication Union Telecommunication (ITU-T) G.957 specifications for use in
SONET and SDH long-reach applications. The
1430G5 operates at the OC-3/STM-1 rate of
155 Mbits/s. The transceiver features Agere Systems’ optics and is packaged in a narrow-width plastic housing with two 1 meter fiber pigtails terminated
with LC connectors. The 20-pin package and pinout
conform to a multisource transceiver agreement.
The transmitter features differential LVPECL logic
level data inputs, a LVTTL logic level disable input.
The receiver features differential LVPECL logic level
data and clock outputs, and a LVTTL logic level
signal-detect output.
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Data Sheet, Rev 1.
August 2001
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.
Parameter
Supply Voltage
Operating Case Temperature Range
Storage Case Temperature Range
Lead Soldering Temperature/Time
Operating Wavelength Range
Symbol
Min
Max
Unit
VCC
TC
Tstg
—
λ
0
–40
–40
—
1.1
3.6
85
85
250/10
1.6
V
°C
°C
°C/s
nm
Pin Information
TX
20 19 18 17 16 15 14 13 12 11
20-PIN MODULE - TOP VIEW
RX
1 2 3 4 5 6 7 8 9 10
1-967(F).b
Figure 1. 1430G5 and 1430H5-Type Transceivers, 20-Pin Configuration, Top View
Table 1. Transceiver Pin Descriptions
Pin
Number
Symbol
MS
MS
1
2
3
4
5
6
7
8
9
10
2
Logic
Family
Name/Description
Receiver
Mounting Studs. The mounting studs are provided for transceiver mechanical attachment to the circuit board. They may also provide an optional connection of the transceiver to the equipment chassis ground.
Photodetector Bias. This lead supplies bias for the PIN photodetector diode.
Photodetector Bias
Receiver Signal Ground.
VEER
Receiver Signal Ground.
VEER
Received Recovered Clock Out. The rising edge occurs at the rising edge of
CLK–
the received data output. The falling edge occurs in the middle of the received
data bit period.
Received Recovered Clock Out. The falling edge occurs at the rising edge
CLK+
of the received data output. The rising edge occurs in the middle of the
received data bit period.
Receiver Signal Ground.
VEER
Receiver Power Supply.
VCCR
Signal Detect.
SD
Normal operation: logic one output.
Fault condition: logic zero output.
Received DATA Out. No Internal terminations will be provided.
RD–
Received DATA Out. No internal terminations will be provided.
RD+
NA
NA
NA
NA
LVPECL
LVPECL
NA
NA
LVTTL
LVPECL
LVPECL
Agere Systems Inc.
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Data Sheet, Rev 1.
August 2001
Pin Information (continued)
Table 1. Transceiver Pin Descriptions (continued)
Pin
Number
Symbol
11
12
13
14
15
16
17
VCCT
VEET
TDIS
TD+
TD–
VEET
Bmon–
18
19
BMON+
PMON–
20
PMON+
Name/Description
Logic
Family
Transmitter
Transmitter Power Supply.
NA
Transmitter Signal Ground.
NA
Transmitter Disable.
LVTTL
Transmitter DATA In.
LVPECL
Transmitter DATA In Bar.
LVPECL
Transmitter Signal Ground.
NA
Laser Diode Bias Current Monitor—Negative End. The laser bias current
NA
is accessible as a dc-voltage by measuring the voltage developed across pins
17 and 18.
Laser Diode Bias Current Monitor—Positive End. See pin 17 description.
NA
Laser Diode Optical Power Monitor—Negative End. The back-facet diode
NA
monitor current is accessible as a dc-voltage by measuring the voltage developed across pins 19 and 20.
Laser Diode Optical Power Monitor—Positive End. See pin 19 description.
NA
Electrostatic Discharge
Printed-Wiring Board Layout Considerations
Caution: This device is susceptible to damage as
a result of electrostatic discharge (ESD).
Take proper precautions during both
handling and testing. Follow EIA ® Standard EIA-625.
A fiber-optic receiver employs a very high gain, wide
bandwidth transimpedance amplifier. This amplifier
detects and amplifies signals that are only tens of nA in
amplitude when the receiver is operating near its sensitivity limit. Any unwanted signal currents that couple
into the receiver circuitry cause a decrease in the
receiver's sensitivity and can also degrade the performance of the receiver's signal detect (SD) circuit. To
minimize the coupling of unwanted noise into the
receiver, careful attention must be given to the printedwiring board.
Although protection circuitry is designed into the
device, take proper precautions to avoid exposure to
ESD.
Agere Systems employs a human-body model (HBM)
for ESD-susceptibility testing and protection-design
evaluation. ESD voltage thresholds are dependent on
the critical parameters used to define the model. A
standard HBM (resistance = 1.5 kΩ, capacitance =
100 pF) is widely used and, therefore, can be used for
comparison purposes. The HBM ESD threshold established for the 1430G5 transceiver is ±1000 V.
Application Information
The 1430 receiver section is a highly sensitive fiberoptic receiver. Although the data outputs are digital
logic levels (LVPECL), the device should be thought of
as an analog component. When laying out system
application boards, the 1430 transceiver should receive
the same type of consideration one would give to a
sensitive analog component.
Agere Systems Inc.
At a minimum, a double-sided printed-wiring board
(PWB) with a large component-side ground plane
beneath the transceiver must be used. In applications
that include many other high-speed devices, a multilayer PWB is highly recommended. This permits the
placement of power and ground on separate layers,
which allows them to be isolated from the signal lines.
Multilayer construction also permits the routing of sensitive signal traces away from high-level, high-speed
signal lines. To minimize the possibility of coupling
noise into the receiver section, high-level, high-speed
signals such as transmitter inputs and clock lines
should be routed as far away as possible from the
receiver pins.
3
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Application Information (continued)
Noise that couples into the receiver through the power
supply pins can also degrade performance. It is
recommended that the pi filter, shown in Figure 3, be
used for both the transmitter and receiver power
supplies.
Data, Clock, and Signal Detect Outputs
The data, clock, and signal detect outputs of the 1430
transceiver are driven by open-emitter NPN transistors,
which have an output impedance of approximately 7 Ω.
Each output can provide approximately 50 mA maximum current to a 50 Ω load terminated to VCC – 2.0 V.
Due to the high switching speeds of ECL outputs,
transmission line design must be used to interconnect
components. To ensure optimum signal fidelity, both
data outputs (RD+/RD–) and clock outputs
(CLK+/CLK–) should be terminated identically. The signal lines connecting the data clock outputs to the next
device should be equal in length and have matched
impedances. Controlled impedance stripline or microstrip construction must be used to preserve the quality
of the signal into the next component and to minimize
reflections back into the receiver, which could degrade
Data Sheet, Rev 1.
August 2001
its performance. Excessive ringing due to reflections
caused by improperly terminated signal lines makes it
difficult for the component receiving these signals to
decipher the proper logic levels and can cause transitions to occur where none were intended. Also, by minimizing high-frequency ringing, possible EMI problems
can be avoided.
The signal-detect output is LVTTL logic. A logic low at
this output indicates that the optical signal into the
receiver has been interrupted or that the light level has
fallen below the minimum signal detect threshold. This
output should not be used as an error rate indicator,
since its switching threshold is determined only by the
magnitude of the incoming optical signal.
Transceiver Processing
The transceiver and plug can withstand normal wave
soldering and aqueous spray cleaning processes.
However, the transceiver is not hermetic, and should
not be subjected to immersion in cleaning solvents.
The transceiver case should not be exposed to temperatures in excess of 125 °C. The fiber pigtail cannot
exceed 85 °C. The transceiver pins can be wave soldered at 250 °C for up to 10 seconds.
Transceiver Optical and Electrical Characteristics
Table 2. Transmitter Optical and Electrical Characteristics (TC = –40 °C to +85 °C; VCC = 3.135 V—3.465 V)
Parameter
Symbol
Min
Max
Unit
Average Optical Output Power L-1.1
PO
–5.0
0
dBm
Optical Wavelength L-1.1
λC
1280
1335
nm
∆λ20
—
1
nm
Spectral Width
Side-mode Suppression Ratio
SMSR
30
—
dB
Dynamic Extinction Ratio
EXT
10
—
dB
Power Supply Current
ICCT
—
200
mA
Input Data Voltage:
Low
High
VIL
VIH
VCC – 1.810 VCC – 1.475
VCC – 1.165 VCC – 0.880
Transmit Disable Voltage
VD
VCC – 1.165
VCC
V
Transmit Enable Voltage
VEN
VEE
VEE + 0.8
V
Laser Bias Voltage
VBIAS
0
0.70
V
VBF
0.01
0.20
V
Laser Back-facet Monitor Voltage
4
V
V
Agere Systems Inc.
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Data Sheet, Rev 1.
August 2001
Application Information (continued)
Table 3. Receiver Optical and Electrical Characteristics (TC = –40 °C to +85 °C; VCC = 3.135 V—3.465 V)
Parameter
Symbol
Average Sensitivity:*
L-1.1
Min
Max
Unit
PI
—
–34
dBm
Maximum Input Power L-1.1*
PMAX
–10
—
dBm
Link Status Switching Threshold:
Decreasing Light L-1.1
Increasing Light L-1.1
LSTD
LSTI
–45
—
–35
–34.5
dBm
dBm
Link Status Hysteresis
HYS
0.5
6.0
dB
Power Supply Current
ICCR
—
200
mA
Output Data Voltage/Clock Voltage:
Low
High
VOL
VOH
VCC – 1.86
VCC – 1.025
VCC – 1.50
VCC – 0.88
V
V
Signal Detect Output Voltage:
Low
High
VOL
VOH
0.0
2.4
0.8
VCC
V
V
Clock Duty Cycle
DC
45
55
%
Output Clock Random Jitter
JC
—
0.01
UI
Output Clock Random Jitter Peaking
JP
—
0.1
dB
TCDA
–0.8
0.8
ns
Clock/Data Alignment L-1.1 (See Figure 2.)
Telcordia Technologies™ GR-253-CORE and
ITU-TG.958 Compliant
Jitter Tolerance/Jitter Transfer
* For 1 x 10–10 BER with an optical input using 223 – 1 PRBS.
DATAOUT
CLOCKOUT
50%
50%
TCDA
1-725(F).b
Figure 2. Clock/Data Alignment
Agere Systems Inc.
5
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Data Sheet, Rev 1.
August 2001
Qualification and Reliability
To help ensure high product reliability and customer satisfaction, Agere Systems is committed to an intensive quality program that starts in the design phase and proceeds through the manufacturing process. Optoelectronic modules are qualified to Agere Systems’ internal standards using MIL-STD-883 test methods and procedures and
using sampling techniques consistent with Telcordia Technologies requirements. The 1430 transceiver is required
to pass an extensive and rigorous set of qualification tests.
This qualification program fully meets the intent of Telcordia Technologies reliability practices GR-468-CORE
requirements. In addition, the design, development, and manufacturing facilities of Agere Systems’ Optoelectronics
unit have been certified to be in full compliance with the latest ISO ®-9001 quality system standards.
Electrical Schematic
BMON–
BMON+
PMON–
PMON+
17 18 19 20
15 kΩ
15 kΩ
10 Ω
400 Ω
VEET
15 kΩ
12, 16
15 kΩ
TRANSMITTER
DRIVER
TD–
15
TD+
14
TDIS
13
VCCT
11
SFF TRANSCEIVER
RD+
10
RD–
9
CLK+
5
CLK–
4
SD
8
VEER
C5
7
1
VPD
PREAMP
VCC
C4
VCCR
RECEIVER
POSTAMPLIFIER/
CDR
L2
C2
C3
L1
C1
2, 3, 6
1-968(F).d
Notes:
L1 = L2 = 1 µH—4.7 µH*
C1 = C2 = 10 nF†
C3 = 4.7 µF—10 µF
C4 = C5 = 4.7 µF—10 µF
* Ferrite beads can be used as an option.
† For all capacitors, MLC caps are recommended.
Figure 3. Power Supply Filtering for the Small Form Factor Transceiver
6
Agere Systems Inc.
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Data Sheet, Rev 1.
August 2001
Application Schematics
VCC (+3.3 V)
VCC (+3.3 V)
Z = 50 Ω
TD+
TD–
100 Ω
Z = 50 Ω
130 Ω
LVPECL
130 Ω
A. Transmitter Interface (LVPECL to LVPECL)
VCC (+3.3 V)
VCC (+3.3 V)
RD+/CLK+
Z = 50 Ω
RD–/CLK–
Z = 50 Ω
130 Ω
100 Ω
LVPECL
130 Ω
B. Receiver Interface (LVPECL to LVPECL)
1-970(F)
Figure 4. 3.3 V Transceiver Interface with 3.3 V ICs
Agere Systems Inc.
7
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Data Sheet, Rev 1.
August 2001
Outline Diagrams
Package Outline
Agere
Dimensions are in inches and (millimeters).
1430
TRANSCEIVER
0.433
(11.00)
1.474
(37.44)
0.512
(13.00)
1.907
(48.44)
0.385
(9.78)
0.500*
(12.70)
0.251
(6.38)
0.125 (3.17)
0.014 (0.36)
0.018 (0.46)
0.350 (8.89)
0.246
(6.25)
0.299 (7.59)
0.400
(10.16)
0.070 (1.78)
0.535 MAX
(13.59)
0.115
(2.92)
0.040 (1.02)
1-1086
* Dimension does not comply with multisource agreement.
8
Agere Systems Inc.
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Data Sheet, Rev 1.
August 2001
Outline Diagrams (continued)
Printed-Wiring Board Layout *, †
Dimensions are in inches and (millimeters).
3.00
(0.118)
7.59
(0.299)
13.34
(0.525)
A
(2x) ∅ 2.29 MAX
(0.090)
AREA FOR EYELETS
(2x) ∅ 1.4 ± 0.1 NOTE 1
(0.055 ± 0.004)
∅ 0.00 M A
3.00
(0.118)
4.57
(0.180)
8.89
(0.350)
7.11
(0.280)
6.00
(0.236)
(9x) 1.78
(0.070)
(2x) ∅ 0.81 ± 0.1
(0.032 ± 0.004)
3.08
(0.121)
16.00 REF
(0.630)
∅ 0.00 M A
3.56
(0.140)
2.00 (0.79)
(2x) ∅ 2.29 MAX
(0.090)
2.01
(0.79)
9.59
(0.378)
10.16
(0.400)
(4x) ∅ 1.4 ± 0.1 NOTE 2
(0.055 ± 0.004)
∅ 0.00 M A
NOTES:
1. HOLES FOR MOUNTING STUDS MUST BE TIED TO CHASSIS GROUND.
2. HOLES FOR HOUSING LEADS MUST BE TIED TO SIGNAL GROUND.
1-1271F
* The hatched areas are keep-out areas reserved for housing standoffs. No metal traces of ground connection in keep-out area.
† Twenty-pin module shown; 10-pin module requires only 16 PWB holes.
Agere Systems Inc.
9
NetLight 1430G5 Type SONET/SDH
Long-Reach Transceivers with Clock Recovery
Data Sheet, Rev 1.
August 2001
Laser Safety Information
Class I Laser Product
FDA/CDRH Class I laser product. All versions of the transceiver are Class I laser products per CDRH, 21 CFR
1040 Laser Safety requirements. All versions are Class I laser products per IEC ® 60825-1:1993. The transceiver
has been classified with the FDA under accession number 8720009.
CAUTION: Use of controls, adjustments, and procedures other than those specified herein may result in
hazardous laser radiation exposure.
This product complies with 21 CFR 1040.10 and 1040.11.
8.8 µm/125 µm single-mode fiber pigtails and connector
Wavelength = 1.3 µm
Maximum power = 1.6 mW
Because of size constraints, laser safety labeling is not affixed to the module but is attached to the outside of the
shipping carton.
Product is not shipped with power supply.
NOTICE
Unterminated optical connectors may emit laser radiation.
Do not view with optical instruments.
Ordering Information
Description
2x10 Single-mode Transceiver for OC-3 /STM-1 Long-reach
(155 Mbits/s) with Fiber Pigtails and LC Connector
Device Code
Comcode
1430G5LL
108455049
EIA is a registered trademark of The Electronic Industries Association.
Telcordia Technologies is a trademark of Telcordia Technologies, Inc.
ISO is a registered trademark of The International Organization for Standardization.
IEC is a registered trademark of the International Electrotechnical Commission.
For additional information, contact your Agere Systems Account Manager or the following:
http://www.agere.com
INTERNET:
[email protected]
E-MAIL:
N. AMERICA: Agere Systems Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18109-3286
1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106)
ASIA:
Agere Systems Hong Kong Ltd., Suites 3201 & 3210-12, 32/F, Tower 2, The Gateway, Harbour City, Kowloon
Tel. (852) 3129-2000, FAX (852) 3129-2020
CHINA: (86) 21-5047-1212 (Shanghai), (86) 10-6522-5566 (Beijing), (86) 755-695-7224 (Shenzhen)
JAPAN: (81) 3-5421-1600 (Tokyo), KOREA: (82) 2-767-1850 (Seoul), SINGAPORE: (65) 778-8833, TAIWAN: (886) 2-2725-5858 (Taipei)
Tel. (44) 7000 624624, FAX (44) 1344 488 045
EUROPE:
Agere Systems Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. NetLight
is a registered trademark of Agere Systems Inc.
Copyright © 2001 Agere Systems Inc.
All Rights Reserved
Printed in U.S.A.
August 2001
DS00-101OPTO-1 (Replaces DS00-101OPTO)