TI TPS2047AD

TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
D
D
D
D
D
D
D
D
D
D
D
80-mΩ High-Side MOSFET Switch
250 mA Continuous Current Per Channel
Independent Thermal and Short-Circuit
Protection With Overcurrent Logic Output
Operating Range . . . 2.7 V to 5.5 V
CMOS- and TTL-Compatible Enable Inputs
2.5-ms Typical Rise Time
Undervoltage Lockout
10 µA Maximum Standby Supply Current
for Single and Dual (20 µA for Triple and
Quad)
Bidirectional Switch
Ambient Temperature Range, 0°C to 85°C
ESD Protection
TPS2045A, TPS2055A
D PACKAGE
(TOP VIEW)
GND
IN
IN
EN†
1
8
2
7
3
6
4
5
OUT
OUT
OUT
OC
TPS2047A, TPS2057A
D PACKAGE
(TOP VIEW)
GNDA
IN1
EN1†
EN2†
GNDB
IN2
EN3†
NC
1
16
2
15
3
14
4
13
5
12
6
11
7
10
OC1
OUT1
OUT2
OC2
OC3
OUT3
NC
NC
TPS2046A, TPS2056A
D PACKAGE
(TOP VIEW)
GND
IN
EN1†
EN2†
1
8
2
7
3
6
4
5
OC1
OUT1
OUT2
OC2
TPS2048A, TPS2058A
D PACKAGE
(TOP VIEW)
GNDA
IN1
EN1†
EN2†
GNDB
IN2
EN3†
EN4†
1
16
2
15
3
14
4
13
5
12
6
11
7
10
OC1
OUT1
OUT2
OC2
OC3
OUT3
OUT4
OC4
8
9
8
9
The TPS2045A through TPS2048A and
TPS2055A through TPS2058A power-distribution
† All enable inputs are active high for the TPS205xA series.
switches are intended for applications where
NC – No connect
heavy capacitive loads and short circuits are likely
to be encountered. These devices incorporate 80-mΩ N-channel MOSFET high-side power switches for
power-distribution systems that require multiple power switches in a single package. Each switch is controlled
by an independent logic enable input. Gate drive is provided by an internal charge pump designed to control
the power-switch rise times and fall times to minimize current surges during switching. The charge pump
requires no external components and allows operation from supplies as low as 2.7 V.
When the output load exceeds the current-limit threshold or a short is present, these devices limit the output
current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low.
When continuous heavy overloads and short circuits increase the power dissipation in the switch, causing the
junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from
a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch
remains off until valid input voltage is present. These power-distribution switches are designed to current limit
at 0.5 A.
GENERAL SWITCH CATALOG
33 mΩ, single TPS201xA 0.2 A – 2 A
TPS202x
TPS203x
80 mΩ, single TPS2014
TPS2015
TPS2041
TPS2051
TPS2045
TPS2055
80 mΩ, dual
0.2 A – 2 A
0.2 A – 2 A
600 mA
1A
500 mA
500 mA
250 mA
250 mA
260 mΩ
IN1
OUT
IN2
1.3 Ω
TPS2042
TPS2052
TPS2046
TPS2056
500 mA
500 mA
250 mA
250 mA
TPS2100/1
IN1 500 mA
IN2 10 mA
TPS2102/3/4/5
IN1
500 mA
IN2
100 mA
80 mΩ, dual
TPS2080
TPS2081
TPS2082
TPS2090
TPS2091
TPS2092
500 mA
500 mA
500 mA
250 mA
250 mA
250 mA
80 mΩ, triple
TPS2043
TPS2053
TPS2047
TPS2057
500 mA
500 mA
250 mA
250 mA
80 mΩ, quad
TPS2044
TPS2054
TPS2048
TPS2058
500 mA
500 mA
250 mA
250 mA
80 mΩ, quad
TPS2085
TPS2086
TPS2087
TPS2095
TPS2096
TPS2097
500 mA
500 mA
500 mA
250 mA
250 mA
250 mA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
AVAILABLE OPTIONS
TA
ENABLE
RECOMMENDED
MAXIMUM CONTINUOUS
LOAD CURRENT
(A)
TYPICAL SHORT-CIRCUIT
CURRENT LIMIT AT 25°C
(A)
PACKAGED DEVICES
NUMBER OF
SWITCHES
Active low
Single
Active high
Active low
0°C to 85°C
Active high
Active low
Dual
0 25
0.25
05
0.5
Triple
Active high
Active low
Active high
† The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2045ADR)
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
Quad
SOIC
(D)†
TPS2045AD
TPS2055AD
TPS2046AD
TPS2056AD
TPS2047AD
TPS2057AD
TPS2048AD
TPS2058AD
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
functional block diagrams
TPS2045A
Power Switch
†
CS
IN
OUT
Charge
Pump
EN‡
Current
Limit
Driver
OC
UVLO
Thermal
Sense
GND
† Current sense
‡ Active high for TPS205xA series
TPS2046A
OC1
Thermal
Sense
GND
EN1‡
Current
Limit
Driver
Charge
Pump
†
CS
OUT1
UVLO
Power Switch
†
CS
IN
OUT2
Charge
Pump
Driver
Current
Limit
OC2
EN2‡
Thermal
Sense
† Current sense
‡ Active high for TPS205xA series
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
functional block diagrams
TPS2047A
OC1
Thermal
Sense
GNDA
EN1‡
Current
Limit
Driver
Charge
Pump
†
CS
OUT1
UVLO
Power Switch
†
CS
IN1
OUT2
Charge
Pump
Current
Limit
Driver
OC2
EN2‡
Thermal
Sense
Power Switch
†
CS
IN2
OUT3
Charge
Pump
EN3‡
Driver
Current
Limit
OC3
UVLO
Thermal
Sense
GNDB
† Current sense
‡ Active high for TPS205xA series
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
functional block diagrams
OC1
TPS2048A
Thermal
Sense
GNDA
EN1‡
Driver
Current
Limit
Charge
Pump
†
CS
OUT
1
UVLO
Power Switch
†
OUT
2
CS
IN1
Charge
Pump
Driver
Current
Limit
OC2
EN2‡
Thermal
Sense
OC3
Thermal
Sense
GNDB
EN3‡
Driver
Current
Limit
Charge
Pump
†
CS
OUT3
UVLO
Power Switch
†
IN2
CS
OUT4
Charge
Pump
Driver
Current
Limit
OC4
EN4‡
Thermal
Sense
† Current sense
‡ Active high for TPS205xA series
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
Terminal Functions
TPS2045A and TPS2055A
TERMINAL
NAME
NO.
I/O
DESCRIPTION
TPS2045A
TPS2055A
EN
4
–
I
Enable input. Logic low turns on power switch.
EN
–
4
I
Enable input. Logic high turns on power switch.
GND
1
1
I
Ground
2, 3
2, 3
I
Input voltage
5
5
O
Overcurrent. Open drain output active low
6, 7, 8
6, 7, 8
O
Power-switch output
IN
OC
OUT
TPS2046A and TPS2056A
TERMINAL
NAME
NO.
I/O
DESCRIPTION
TPS2046A
TPS2056A
EN1
3
–
I
Enable input. Logic low turns on power switch, IN-OUT1.
EN2
4
–
I
Enable input. Logic low turns on power switch, IN-OUT2.
EN1
–
3
I
Enable input. Logic high turns on power switch, IN-OUT1.
EN2
–
4
I
Enable input. Logic high turns on power switch, IN-OUT2.
GND
1
1
I
Ground
IN
2
2
I
Input voltage
OC1
8
8
O
Overcurrent. Open drain output active low, for power switch, IN-OUT1
OC2
5
5
O
Overcurrent. Open drain output active low, for power switch, IN-OUT2
OUT1
7
7
O
Power-switch output
OUT2
6
6
O
Power-switch output
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
Terminal Functions (Continued)
TPS2047A and TPS2057A
TERMINAL
NAME
NO.
I/O
DESCRIPTION
TPS2047A
TPS2057A
EN1
3
–
I
Enable input, logic low turns on power switch, IN1-OUT1.
EN2
4
–
I
Enable input, logic low turns on power switch, IN1-OUT2.
EN3
7
–
I
Enable input, logic low turns on power switch, IN2-OUT3.
EN1
–
3
I
Enable input, logic high turns on power switch, IN1-OUT1.
EN2
–
4
I
Enable input, logic high turns on power switch, IN1-OUT2.
EN3
–
7
I
Enable input, logic high turns on power switch, IN2-OUT3.
GNDA
1
1
GNDB
5
5
IN1
2
2
I
Input voltage
I
Input voltage
Ground for IN1 switch and circuitry.
Ground for IN2 switch and circuitry.
IN2
6
6
NC
8, 9, 10
8, 9, 10
OC1
16
16
O
Overcurrent, open drain output active low, IN1-OUT1
OC2
13
13
O
Overcurrent, open drain output active low, IN1-OUT2
OC3
12
12
O
Overcurrent, open drain output active low, IN2-OUT3
OUT1
15
15
O
Power-switch output, IN1-OUT1
OUT2
14
14
O
Power-switch output, IN1-OUT2
OUT3
11
11
O
Power-switch output, IN2-OUT3
No connection
TPS2048A and TPS2058A
TERMINAL
NAME
I/O
NO.
DESCRIPTION
TPS2048A
TPS2058A
EN1
3
–
I
Enable input. logic low turns on power switch, IN1-OUT1.
EN2
4
–
I
Enable input. Logic low turns on power switch, IN1-OUT2.
EN3
7
–
I
Enable input. Logic low turns on power switch, IN2-OUT3.
EN4
8
–
I
Enable input. Logic low turns on power switch, IN2-OUT4.
EN1
–
3
I
Enable input. Logic high turns on power switch, IN1-OUT1.
EN2
–
4
I
Enable input. Logic high turns on power switch, IN1-OUT2.
EN3
–
7
I
Enable input. Logic high turns on power switch, IN2-OUT3.
EN4
–
8
I
Enable input. Logic high turns on power switch, IN2-OUT4.
GNDA
1
1
Ground for IN1 switch and circuitry.
GNDB
5
5
Ground for IN2 switch and circuitry.
IN1
2
2
I
Input voltage
IN2
6
6
I
Input voltage
OC1
16
16
O
Overcurrent. Open drain output active low, IN1-OUT1
OC2
13
13
O
Overcurrent. Open drain output active low, IN1-OUT2
OC3
12
12
O
Overcurrent. Open drain output active low, IN2-OUT3
OC4
9
9
O
Overcurrent. Open drain output active low, IN2-OUT4
OUT1
15
15
O
Power-switch output, IN1-OUT1
OUT2
14
14
O
Power-switch output, IN1-OUT2
OUT3
11
11
O
Power-switch output, IN2-OUT3
OUT4
10
10
O
Power-switch output, IN2-OUT4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
detailed description
power switch
The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (VI(IN) = 5 V).
Configured as a high-side switch, the power switch prevents current flow from OUT to IN and IN to OUT when
disabled. The power switch supplies a minimum of 250 mA per switch.
charge pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
very little supply current.
driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and
fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range.
enable (ENx, ENx)
The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce
the supply current. The supply current is reduced to less than 10 µA on the single and dual devices (20 µA on
the triple and quad devices) when a logic high is present on ENx (TPS204xA†) or a logic low is present on ENx
(TPS205xA†). A logic zero input on ENx or a logic high on ENx restores bias to the drive and control circuits
and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.
overcurrent (OCx)
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
current sense
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into
its saturation region, which switches the output into a constant-current mode and holds the current constant
while varying the voltage on the load.
thermal sense
The TPS204xA and TPS205xA implement a dual-threshold thermal trip to allow fully independent operation of
the power distribution switches. In an overcurrent or short-circuit condition the junction temperature rises. When
the die temperature rises to approximately 140°C, the internal thermal sense circuitry checks to determine which
power switch is in an overcurrent condition and turns off that switch, thus isolating the fault without interrupting
operation of the adjacent power switch. Hysteresis is built into the thermal sense, and after the device has cooled
approximately 20 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is
removed. The (OCx) open-drain output is asserted (active low) when overtemperature or overcurrent occurs.
undervoltage lockout
A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control
signal turns off the power switch.
† Product series designations TPS204x and TPS205x refer to devices presented in this data sheet and not necessarily to other TI devices
numbered in this sequence.
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Input voltage range, VI(IN) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
Output voltage range, VO(OUT) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VI(IN) + 0.3 V
Input voltage range, VI(ENx) or VI(ENx) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
Continuous output current, IO(OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C
Electrostatic discharge (ESD) protection: Human body model MIL-STD-883C . . . . . . . . . . . . . . . . . . . . . 2 kV
Machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.2 kV
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltages are with respect to GND.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
D–8
725 mW
5.9 mW/°C
464 mW
377 mW
D–16
1123 mW
9 mW/°C
719 mW
584 mW
recommended operating conditions
MIN
MAX
2.7
5.5
V
Input voltage, VI(EN) or VI(EN)
0
5.5
V
Continuous output current, IO(OUT) (per switch)
0
250
mA
Operating virtual junction temperature, TJ
0
125
°C
Input voltage, VI(IN)
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
UNIT
9
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V,
IO = rated current, VI(EN) = 0 V, VI(EN) = VI(IN) (unless otherwise noted)
power switch
PARAMETER
Static drain-source on-state
resistance, 5-V operation
rDS(on)
DS( )
Static drain-source on-state
resistance, 3.3-V operation
tr
tf
Rise time,
time output
Fall time,
time output
TEST CONDITIONS†
TPS204xA
MIN
TPS205xA
TYP
MAX
MIN
TYP
MAX
VI(IN) = 5 V,
IO = 0.25 A
TJ = 25°C,
80
100
80
100
VI(IN) = 5 V,
IO = 0.25 A
TJ = 85°C,
90
120
90
120
VI(IN) = 5 V,
IO = 0.25 A
TJ = 125°C,
100
135
100
135
VI(IN) = 3.3 V,
IO = 0.25 A
TJ = 25°C,
90
125
90
125
VI(IN) = 3.3 V,
IO = 0.25 A
TJ = 85°C,
110
145
110
145
VI(IN) = 3.3 V,
IO = 0.25 A
TJ = 125°C,
120
160
120
160
VI(IN) = 5.5 V,
CL = 1 µF,
TJ = 25°C,
RL=20 Ω
2.5
2.5
VI(IN) = 2.7 V,
CL = 1 µF,
TJ = 25°C,
RL=20 Ω
3
3
VI(IN) = 5.5 V,
CL = 1 µF,
VI(IN) = 2.7 V,
CL = 1 µF,
TJ = 25°C,
RL=20 Ω
4.4
4.4
TJ = 25°C,
RL=20 Ω
2.5
2.5
UNIT
mΩ
ms
ms
† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
enable input ENx or ENx
PARAMETER
VIH
High-level input voltage
VIL
Low level input voltage
Low-level
II
Input current
ton
toff
Turnon time
TPS204xA
TPS205xA
Turnoff time
TEST CONDITIONS
2.7 V ≤ VI(IN) ≤ 5.5 V
TPS204xA
MIN
TYP
TPS205xA
MAX
2
MIN
TYP
MAX
2
V
4.5 V ≤ VI(IN) ≤ 5.5 V
0.8
0.8
2.7 V≤ VI(IN) ≤ 4.5 V
0.4
0.4
VI(ENx) = 0 V or VI(ENx) = VI(IN)
VI(ENx) = VI(IN) or VI(ENx) = 0 V
–0.5
0.5
–0.5
CL = 100 µF, RL=20 Ω
CL = 100 µF, RL=20 Ω
UNIT
0.5
20
20
40
40
V
µA
ms
current limit
PARAMETER
IOS
Short-circuit output current
TEST CONDITIONS†
VI(IN) = 5 V, OUT connected to GND,
Device enabled into short circuit
TPS204xA
MIN
0.3
TYP
0.5
TPS205xA
MAX
MIN
0.7
0.3
TYP
0.5
MAX
0.7
UNIT
A
† Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V,
IO = rated current, VI(EN) = 0 V, VI(EN) = VI(IN) (unless otherwise noted) (continued)
supply current (TPS2045A, TPS2055A)
PARAMETER
Supply
y current,, low-level
output
Supplyy current,,
high-level output
Leakage current
Reverse leakage current
TPS2045A
TEST CONDITIONS
MIN
VI(EN) = VI(IN)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN) = VI(IN)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
OUT
connected
to ground
VI(EN) = VI(IN)
–40°C ≤ TJ ≤ 125°C
VI(EN)= 0 V
–40°C ≤ TJ ≤ 125°C
IN = High
g
impedance
VI(EN) = 0 V
VI(EN) = VI(IN)
TJ = 25°C
No Load
on OUT
No Load
on OUT
TYP
0.025
TPS2055A
MAX
MIN
TYP
MAX
0.025
1
UNIT
1
10
µA
10
85
110
100
85
110
µA
100
100
µA
100
0.3
µA
0.3
supply current (TPS2046A, TPS2056A)
PARAMETER
Supplyy current,, low-level
output
Supplyy current,,
high-level output
Leakage current
Reverse leakage current
TPS2046A
TEST CONDITIONS
MIN
VI(ENx) = VI(IN)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(ENx) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = VI(IN)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
OUT
connected
to ground
VI(ENx) = VI(IN)
–40°C ≤ TJ ≤ 125°C
VI(ENx) = 0 V
–40°C ≤ TJ ≤ 125°C
IN = high
g
impedance
VI(EN) = 0 V
VI(EN) = VI(IN)
TJ = 25°C
No Load
on OUT
No Load
on OUT
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TYP
0.025
TPS2056A
MAX
MIN
TYP
MAX
0.025
1
UNIT
1
10
µA
10
85
110
100
85
110
µA
100
100
µA
100
0.3
0.3
µA
11
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
electrical characteristics over recommended operating junction temperature range, VI(IN)= 5.5 V,
IO = rated current, VI(EN) = 0 V, VI(EN) = VI(IN) (unless otherwise noted) (continued)
supply current (TPS2047A, TPS2057A)
PARAMETER
TPS2047A
TEST CONDITIONS
Supply
y current,,
low-level output
VI(ENx) = VI(INx)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(ENx) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(IN )
I(ENx)) = VI(INx)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
No load on OUTx
Supplyy current,,
high-level output
MIN
No load on OUTx
Leakage current
OUTx connected
to ground
VI(ENx) = VI(INx)
VI(ENx) = 0 V
Reverse leakage
g
current
IN = high
g
impedance
VI(ENx) = 0 V
VI(ENx) = VI(IN)
TYP
0.05
TPS2057A
MAX
MIN
TYP
MAX
0.05
2
UNIT
2
20
µA
20
160
200
200
160
200
µA
200
–40°C ≤ TJ ≤ 125°C
200
–40°C ≤ TJ ≤ 125°C
µA
200
0.3
TJ = 25°C
µA
0.3
supply current (TPS2048A, TPS2058A)
PARAMETER
TPS2048A
TEST CONDITIONS
Supplyy current,,
low-level output
No Load
on OUTx
Supplyy current,,
high-level output
No Load
on OUTx
MIN
VI(ENx) = VI(INx)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(ENx)) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(ENx) = 0 V
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
VI(EN
I(IN )
I(ENx)) = VI(INx)
TJ = 25°C
–40°C ≤ TJ ≤ 125°C
Leakage current
OUTx connected
to ground
VI(ENx) = VI(INx)
VI(ENx) = 0 V
Reverse leakage
g
current
IN = high
g
impedance
VI(EN) = 0 V
VI(EN) = VI(IN)
TYP
0.05
TPS2058A
MAX
MIN
TYP
MAX
0.05
2
UNIT
2
20
µA
20
170
220
200
170
220
µA
200
–40°C ≤ TJ ≤ 125°C
200
–40°C ≤ TJ ≤ 125°C
µA
200
0.3
TJ = 25°C
µA
0.3
undervoltage lockout
PARAMETER
TEST CONDITIONS
TPS204xA
MIN
Low-level input voltage
Hysteresis
TYP
2
TJ = 25°C
TPS205xA
MAX
MIN
2.5
2
100
TYP
MAX
2.5
100
UNIT
V
mV
overcurrent OC
PARAMETER
Sink current†
Output low voltage
Off-state current†
TEST CONDITIONS
VO = 5 V
IO = 5 V,
VOL(OC)
VO = 5 V,
VO = 3.3 V
TPS204xA
MIN
† Specified by design, not production tested.
12
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TYP
TPS205xA
MAX
MIN
TYP
MAX
UNIT
10
10
mA
0.5
0.5
V
1
1
µA
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
PARAMETER MEASUREMENT INFORMATION
OUT
RL
tf
tr
CL
VO(OUT)
90%
90%
10%
10%
TEST CIRCUIT
50%
VI(EN)
50%
toff
ton
50%
toff
ton
90%
VO(OUT)
50%
VI(EN)
90%
VO(OUT)
10%
10%
VOLTAGE WAVEFORMS
Figure 1. Test Circuit and Voltage Waveforms
VI(EN)
(5 V/div)
VI(EN)
(5 V/div)
VI(IN) = 5 V
TA = 25°C
CL = 0.1 µF
RL = 20 Ω
VO(OUT)
(2 V/div)
0
1
2
3
4
5
6
7
8
9
VI(IN) = 5 V
TA = 25°C
CL = 0.1 µF
RL = 20 Ω
VO(OUT)
(2 V/div)
10
0
2
4
6
8
10
12
14
16
18
20
t – Time – ms
t – Time – ms
Figure 2. Turnon Delay and Rise Time
With 0.1-µF Load
POST OFFICE BOX 655303
Figure 3. Turnoff Delay and Fall Time
With 0.1-µF Load
• DALLAS, TEXAS 75265
13
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
PARAMETER MEASUREMENT INFORMATION
VI(EN)
(5 V/div)
VI(EN)
(5 V/div)
VI(IN) = 5 V
TA = 25°C
CL = 1 µF
RL = 20 Ω
VO(OUT)
(2 V/div)
0
1
2
3
4
5
6
7
8
VI(IN) = 5 V
TA = 25°C
CL = 1 µF
RL = 20 Ω
VO(OUT)
(2 V/div)
9
0
10
2
4
6
8
10
12
14
16
18
20
t – Time – ms
t – Time – ms
Figure 4. Turnon Delay and Rise Time
With 1-µF Load
Figure 5. Turnoff Delay and Fall Time
With 1-µF Load
VI(IN) = 5 V
TA = 25°C
RAMP: 1A/10ms
VI(ENx)
(5 V/div)
VO(OUT)
(2 V/div)
VI(IN) = 5 V
TA = 25°C
IO(OUTx)
(0.2 A/div)
0
1
2
3
4
5
6
7
8
9
IO(OUT)
(0.2 A/div)
10
0
10
Figure 6. TPS2055A, Short-Circuit Current,
Device Enabled Into Short
14
20
30
40
50
60
70
80
90 100
t – Time – ms
t – Time – ms
POST OFFICE BOX 655303
Figure 7. TPS2055A, Threshold Trip Current
With Ramped Load on Enabled Device
• DALLAS, TEXAS 75265
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
PARAMETER MEASUREMENT INFORMATION
VI(IN) = 5 V
TA = 25°C
RAMP: 1A/100 ms
VI(EN)
(5 V/div)
VO(OC)
(5 V/div)
220 µF
100 µF
47 µF
IO(OUT)
(0.2 A/div)
VI(IN) = 5 V
TA = 25°C
RL = 20 Ω
IO(OUT)
(0.2 A/div)
0
20
40
60
80 100 120 140 160 180 200
0
2
4
t – Time – ms
6
8
10
12
VI(IN) = 5 V
TA = 25°C
VO(OC)
(5 V/div)
IO(OUT)
(0.5 A/div)
IO(OUT)
(1 A/div)
400
600
18 20
VI(IN) = 5 V
TA = 25°C
VO(OC)
(5 V/div)
200
16
Figure 9. Inrush Current With 47-µF, 100-µF
and 220-µF Load Capacitance
Figure 8. OC Response With Ramped Load
on Enabled Device
0
14
t – Time – ms
800
1000
0
200
400
600
800
1000
t – Time – µs
t – Time – µs
Figure 10. 4-Ω Load Connected to
Enabled Device
POST OFFICE BOX 655303
Figure 11. 1-Ω Load Connected to
Enabled Device
• DALLAS, TEXAS 75265
15
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
TYPICAL CHARACTERISTICS
TURNON DELAY TIME
vs
INPUT VOLTAGE
TURNOFF DELAY TIME
vs
INPUT VOLTAGE
3.9
10
CL = 1 µF
RL = 20 Ω
TA = 25°C
Turnon Delay Time – ms
Turnon Delay Time – ms
3.6
CL = 1 µF
RL = 20 Ω
TA = 25°C
3.3
3
8
6
4
2.7
2.4
2.5
3
3.5
4
4.5
5
5.5
2
2.5
6
3
3.5
4
4.5
5
VI – Input Voltage – V
VI – Input Voltage – V
Figure 12
FALL TIME
vs
INPUT VOLTAGE
2.7
1.9
CL = 1 µF
RL = 20 Ω
TA = 25°C
1.8
CL = 1 µF
RL = 20 Ω
TA = 25°C
2.5
f t – Fall Time – ms
r t – Rise Time – ms
6
Figure 13
RISE TIME
vs
INPUT VOLTAGE
2.6
5.5
2.4
2.3
1.7
1.6
1.5
2.2
1.4
2.1
2
2.5
3
3.5
4
4.5
5
5.5
6
1.3
2.5
3
VI – Input Voltage – V
Figure 14
16
3.5
4
4.5
5
VI – Input Voltage – V
Figure 15
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5.5
6
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
TYPICAL CHARACTERISTICS
SUPPLY CURRENT, OUTPUT ENABLED
vs
JUNCTION TEMPERATURE
SUPPLY CURRENT, OUTPUT DISABLED
vs
JUNCTION TEMPERATURE
160
I I(IN) – Supply Current, Output Disabled – nA
I I(IN) – Supply Current, Output Enabled – µ A
100
90
VI(IN) = 5.5 V
VI(IN) = 5 V
80
VI(IN) = 4.5 V
70
VI(IN) = 2.7 V
60
VI(IN) = 3.3 V
50
40
–40
0
25
85
TJ – Junction Temperature – °C
140
VI(IN) = 5.5 V
120
VI(IN) = 5 V
100
VI(IN) = 4.5 V
80
VI(IN) = 3.3 V
60
VI(IN) = 2.7 V
40
20
0
–40
125
0
25
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
JUNCTION TEMPERATURE
160
VI(IN) = 2.7 V
VI(IN) = 3.3 V
120
VI(IN) = 3 V
100
80
VI(IN) = 5 V
60
VI(IN) = 4.5 V
40
20
0
0
25
125
Figure 17
85
INPUT-TO-OUTPUT VOLTAGE
vs
LOAD CURRENT
VI(IN) – VO(OUT) – Input-to-Output Voltage – mV
r DS(on) – Static Drain-Source On-State Resistance – m Ω
Figure 16
140
85
TJ – Junction Temperature – °C
125
70
TA = 25°C
VI(IN) = 2.7 V
60
VI(IN) = 4.5 V
50
VI(IN) = 3.3 V
40
VI(IN) = 5 V
30
20
10
0
100
TJ – Junction Temperature – °C
200
300
400
500
IL – Load Current – A
Figure 18
Figure 19
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
17
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
vs
JUNCTION TEMPERATURE
THRESHOLD TRIP CURRENT
vs
INPUT VOLTAGE
0.67
TA = 25°C
Load Ramp = 1 A/10 ms
490
VI(IN) = 2.7 V
480
0.65
VI(IN) = 3.3 V
Threshold Trip Current – A
I OS – Short-Circuit Output Current – mA
500
470
460
VI(IN) = 5 .5V
450
VI(IN) = 4 .5V
VI(IN) = 5V
440
430
420
0.63
0.61
0.59
410
400
–40
0
25
85
TJ – Junction Temperature – °C
0.57
2.5
125
3
3.5
4
4.5
5
VI – Input Voltage – V
Figure 20
5.5
6
Figure 21
UNDERVOLTAGE LOCKOUT
vs
JUNCTION TEMPERATURE
CURRENT-LIMIT RESPONSE
vs
PEAK CURRENT
2.36
300
Start Threshold
250
2.32
Current-Limit Response –µ s
UVLO – Undervoltage Lockout – V
2.34
2.3
2.28
2.26
2.24
Stop Threshold
2.22
2.2
200
150
100
50
2.18
2.16
–40
0
0
25
85
TJ – Junction Temperature – °C
125
0
Figure 22
18
2
4
6
Peak Current – A
Figure 23
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
8
10
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
APPLICATION INFORMATION
TPS2045A
2,3
Power Supply
2.7 V to 5.5 V
IN
0.1 µF
OUT
6,7,8
Load
0.1 µF
5
4
22 µF
OC
EN
GND
1
Figure 24. Typical Application (Example, TPS2045A)
power-supply considerations
A 0.01-µF to 0.1-µF ceramic bypass capacitor between INx and GND, close to the device, is recommended.
Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.
This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing
the output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit
transients.
overcurrent
A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do
not increase the series resistance of the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs
only if the fault is present long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before VI(IN) has been applied (see Figure 6). The TPS204xA and TPS205xA sense the
short and immediately switch into a constant-current output.
In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload
occurs, very high currents may flow for a short time before the current-limit circuit can react. After the
current-limit circuit has tripped (reached the overcurrent trip threshold) the device switches into constant-current
mode.
In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 7). The TPS204xA and TPS205xA are capable of delivering current up to the current-limit
threshold without damaging the device. Once the threshold has been reached, the device switches into its
constant-current mode.
OC response
The OC open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
Connecting a heavy capacitive load to an enabled device can cause momentary false overcurrent reporting from
the inrush current flowing through the device, charging the downstream capacitor. The TPS204xA and
TPS205xA family of devices are designed to reduce false overcurrent reporting. An internal overcurrent
transient filter eliminates the need for external components to remove unwanted pulses. Using low-ESR
electrolytic capacitors on the output lowers the inrush current flow through the device during hot-plug events
by providing a low-impedance energy source, also reducing erroneous overcurrent reporting.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
19
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
APPLICATION INFORMATION
TPS2045A
GND
OUT
IN
OUT
IN
OUT
EN
V+
Rpullup
OC
Figure 25. Typical Circuit for OC Pin (Example, TPS2045A)
power dissipation and junction temperature
The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass
large currents. The thermal resistances of these packages are high compared to those of power packages; it
is good design practice to check power dissipation and junction temperature. Begin by determining the rDS(on)
of the N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use
the highest operating ambient temperature of interest and read rDS(on) from Figure 18. Using this value, the
power dissipation per switch can be calculated by:
P
D
+ rDS(on)
I2
Depending on which device is being used, multiply this number by the number of switches being used. This step
will render the total power dissipation from the N-channel MOSFETs.
Finally, calculate the junction temperature:
T
J
Where:
+ PD
R
qJA
) TA
TA = Ambient temperature °C
RθJA = Thermal resistance SOIC = 172°C/W (for 8 pin), 111°C/W (for 16 pin)
PD = Total power dissipation based on number of switches being used.
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.
thermal protection
Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for
extended periods of time. The faults force the TPS204xA and TPS205xA into constant-current mode, which
causes the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across
the switch is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high
levels. The protection circuit senses the junction temperature of the switch and shuts it off. Hysteresis is built
into the thermal sense circuit, and after the device has cooled approximately 20 degrees, the switch turns back
on. The switch continues to cycle in this manner until the load fault or input power is removed.
The TPS204xA and TPS205xA implement a dual thermal trip to allow fully independent operation of the power
distribution switches. In an overcurrent or short-circuit condition the junction temperature will rise. Once the die
temperature rises to approximately 140°C, the internal thermal sense circuitry checks which power switch is
in an overcurrent condition and turns that power switch off, thus isolating the fault without interrupting operation
of the adjacent power switch. Should the die temperature exceed the first thermal trip point of 140°C and reach
160°C, both switches turn off. The OC open-drain output is asserted (active low) when overtemperature or
overcurrent occurs.
20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
APPLICATION INFORMATION
undervoltage lockout (UVLO)
An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input voltage
falls below approximately 2 V, the power switch will be quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The
UVLO will also keep the switch from being turned on until the power supply has reached at least 2 V, even if
the switch is enabled. Upon reinsertion, the power switch will be turned on, with a controlled rise time to reduce
EMI and voltage overshoots.
universal serial bus (USB) applications
The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for
low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB
interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply.
The USB specification defines the following five classes of devices, each differentiated by power-consumption
requirements:
D
D
D
D
D
Hosts/self-powered hubs (SPH)
Bus-powered hubs (BPH)
Low-power, bus-powered functions
High-power, bus-powered functions
Self-powered functions
Self-powered and bus-powered hubs distribute data and power to downstream functions. The TPS204xA and
TPS205xA can provide power-distribution solutions for many of these classes of devices.
host/self-powered and bus-powered hubs
Hosts and self-powered hubs have a local power supply that powers the embedded functions and the
downstream ports. This power supply must provide from 5.25 V to 4.75 V to the board side of the downstream
connection under full-load and no-load conditions. Hosts and SPHs are required to have current-limit protection
and must report overcurrent conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers,
and stand-alone hubs.
Bus-powered hubs obtain all power from upstream ports and often contain an embedded function. The hubs
are required to power up with less than one unit load. The BPH usually has one embedded function, and power
is always available to the controller of the hub. If the embedded function and hub require more than 100 mA
on power up, the power to the embedded function may need to be kept off until enumeration is completed. This
can be accomplished by removing power or by shutting off the clock to the embedded function. Power switching
the embedded function is not necessary if the aggregate power draw for the function and controller is less than
one unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the
embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
21
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
APPLICATION INFORMATION
low-power bus-powered functions and high-power bus-powered functions
Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power
functions always draw less than 100 mA (see Figure 26); high-power functions must draw less than 100 mA
at power up and can draw up to 500 mA after enumeration. If the load of the function is more than the parallel
combination of 44 Ω and 10 µF at power up, the device must implement inrush current limiting.
Power Supply
D+
3.3 V
TPS2045A
D–
VBUS
GND
2,3
10 µF
0.1 µF
IN
OUT
6, 7, 8
0.1 µF
5
USB
Control
4
10 µF
Internal
Function
OC
EN
GND
1
Figure 26. Low-Power Bus-Powered Function (Example, TPS2045A)
USB power-distribution requirements
USB can be implemented in several ways, and, regardless of the type of USB device being developed, several
power-distribution features must be implemented.
D
D
D
Hosts/self-powered hubs must:
–
Current-limit downstream ports
–
Report overcurrent conditions on USB VBUS
Bus-powered hubs must:
–
Enable/disable power to downstream ports
–
Power up at <100 mA
–
Limit inrush current (<44 Ω and 10 µF)
Functions must:
–
Limit inrush currents
–
Power up at <100 mA
The feature set of the TPS204xA and TPS205xA allows them to meet each of these requirements. The
integrated current-limiting and overcurrent reporting is required by hosts and self-powered hubs. The logic-level
enable and controlled rise times meet the need of both input and output ports on bus-power hubs, as well as
the input ports for bus-power functions.
22
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
APPLICATION INFORMATION
TUSB2040
Hub Controller
Upstream
Port
SN75240
BUSPWR
A C
B D
GANGED
D+
D–
DP0
DP1
DM0
DM1
Downstream
Ports
D+
A C
B D
GND
Ferrite Beads
GND
SN75240
DP2
DM2
D–
5V
33 µF†
DP3
5V
DM3
A C
B D
TPS76333
0.1 µF
4.7 µF
SN75240
D+
D–
Ferrite Beads
GND
DP4
IN
3.3 V
4.7 µF
VCC
DM4
5V
TPS2045A
GND
GND
PWRON1
EN
OVRCUR1
OC
IN
0.1 µF
33 µF†
OUT
D+
TPS2045A
48-MHz
Crystal
XTAL1
PWRON2
EN
OVRCUR2
OC
D–
IN
Ferrite Beads
0.1 µF
GND
OUT
Tuning
Circuit
XTAL2
OCSOFF
5V
TPS2045A
PWRON3
EN
OVRCUR3
OC
IN
0.1 µF
33 µF†
OUT
D+
GND
TPS2045A
PWRON4
EN
OVRCUR4
OC
Ferrite Beads
IN
0.1 µF
OUT
D–
GND
5V
33 µF†
† USB rev 1.1 requires 120 µF per hub.
Figure 27. Bus-Powered Hub Implementation, TPS2045A
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
23
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
APPLICATION INFORMATION
TUSB2040
Hub Controller
Upstream
Port
SN75240
BUSPWR
A C
B D
GANGED
D+
D–
DP0
DP1
DM0
DM1
Downstream
Ports
D+
A C
B D
GND
Ferrite Beads
GND
SN75240
DP2
DM2
D–
5V
33 µF†
DP3
5V
DM3
A C
B D
TPS76333
0.1 µF
4.7 µF
SN75240
D+
D–
Ferrite Beads
GND
DP4
IN
3.3 V
4.7 µF
VCC
DM4
5V
TPS2046A
GND
GND
48-MHz
Crystal
PWRON1
EN1 OUT1
OVRCUR1
OC1 OUT2
PWRON2
EN2
OVRCUR2
OC2
33 µF†
D+
IN
0.1 µF
XTAL1
D–
Ferrite Beads
GND
TPS2046A
Tuning
Circuit
XTAL2
OCSOFF
PWRON3
EN1 OUT1
OVRCUR3
OC1 OUT2
PWRON4
EN2
OVRCUR4
OC2
5V
33 µF†
IN
D+
0.1 µF
GND
Ferrite Beads
D–
GND
5V
33 µF†
† USB rev 1.1 requires 120 µF per hub.
Figure 28. Bus-Powered Hub Implementation, TPS2046A
24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
APPLICATION INFORMATION
TUSB2040
Hub Controller
Upstream
Port
1/2 SN75240
BUSPWR
A C
B D
GANGED
D+
D–
DP0
DP1
DM0
DM1
Downstream
Ports
D+
A C
B D
GND
Ferrite Beads
GND
SN75240
DP2
DM2
D–
5V
47 µF†
DP3
5V
DM3
A C
B D
TPS76333
0.1 µF
4.7 µF
1/2 SN75240
D+
D–
Ferrite Beads
GND
DP4
IN
3.3 V
4.7 µF
VCC
DM4
5V
TPS2047A
GND
GND
48-MHz
Crystal
XTAL1
Tuning
Circuit
XTAL2
PWRON1
EN1 OUT1
OVRCUR1
OC1 OUT2
PWRON2
EN2
OVRCUR2
OC2
47 µF†
D+
IN1
0.1 µF
D–
Ferrite Beads
GND
PWRON3
OVRCUR3
5V
EN3 OUT3
OC3
47 µF†
OCSOFF
IN2
0.1 µF
GND
GNDA
GNDB
† USB rev 1.1 requires 120 µF per hub.
Figure 29. Bus-Powered Hub Implementation, TPS2047A
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
25
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
APPLICATION INFORMATION
TUSB2040
Hub Controller
Upstream
Port
SN75240
BUSPWR
A C
B D
GANGED
D+
D–
DP0
DP1
DM0
DM1
Downstream
Ports
D+
A C
B D
GND
DM2
D–
GND
SN75240
DP2
TPS2041A
Ferrite Beads
5V
33 µF†
DP3
5V
DM3
A C
B D
TPS76333
0.1 µF
4.7 µF
SN75240
D+
D–
Ferrite Beads
GND
DP4
IN
3.3 V
4.7 µF
VCC
DM4
5V
TPS2048A
GND
GND
48-MHz
Crystal
XTAL1
Tuning
Circuit
XTAL2
PWRON1
EN1 OUT1
OVRCUR1
OC1 OUT2
PWRON2
EN2
OVRCUR2
OC2
33 µF†
D+
IN1
0.1 µF
D–
Ferrite Beads
GND
OCSOFF
PWRON3
EN3 OUT3
OVRCUR3
OC3 OUT4
PWRON4
EN4
OVRCUR4
OC4
5V
33 µF†
IN2
D+
0.1 µF
GND
Ferrite Beads
GNDA
D–
GND
GNDB
5V
33 µF†
† USB rev 1.1 requires 120 µF per hub.
Figure 30. Bus-Powered Hub Implementation, TPS2048A
26
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
APPLICATION INFORMATION
generic hot-plug applications (see Figure 31)
In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.
These are considered hot-plug applications. Such implementations require the control of current surges seen
by the main power supply and the card being inserted. The most effective way to control these surges is to limit
and slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply
normally turns on. Due to the controlled rise times and fall times of the TPS204xA and TPS205xA, these devices
can be used to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature
of the TPS204xA and TPS205xA also ensures the switch will be off after the card has been removed, and the
switch will be off during the next insertion. The UVLO feature insures a soft start with a controlled rise time for
every insertion of the card or module.
PC Board
TPS2045A
Power
Supply
2.7 V to 5.5 V
1000 µF
Optimum
0.1 µF
GND
OUT
IN
OUT
IN
OUT
EN
Block of
Circuitry
OC
Overcurrent Response
Figure 31. Typical Hot-Plug Implementation (Example, TPS2045A)
By placing the TPS204xA and TPS205xA between the VCC input and the rest of the circuitry, the input power
will reach these devices first after insertion. The typical rise time of the switch is approximately 2.5 ms, providing
a slow voltage ramp at the output of the device. This implementation controls system surge currents and
provides a hot-plugging mechanism for any device.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
27
TPS2045A, TPS2046A, TPS2047A, TPS2048A
TPS2055A, TPS2056A, TPS2057A, TPS2058A
CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES
SLVS251A – SEPTEMBER 2000 – REVISED FEBRUARY 2001
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
14
0.010 (0,25) M
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
PINS **
0.004 (0,10)
8
14
16
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MIN
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
DIM
4040047 / D 10/96
NOTES: A.
B.
C.
D.
28
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
Falls within JEDEC MS-012
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS2045AD
ACTIVE
SOIC
D
8
TPS2045ADR
ACTIVE
SOIC
D
TPS2045ADRG4
ACTIVE
SOIC
TPS2046AD
ACTIVE
TPS2046ADR
75
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2046ADRG4
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS2047AD
ACTIVE
SOIC
D
16
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2047ADR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2047ADRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2048AD
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2048ADG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2048ADR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2048ADRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2055AD
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2055ADR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2055ADRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2056AD
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2056ADR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2056ADRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2057AD
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2057ADG4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2057ADR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2057ADRG4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2058AD
ACTIVE
SOIC
D
16
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS2058ADR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
75
40
75
75
40
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
TPS2058ADRG4
ACTIVE
SOIC
D
Pins Package Eco Plan (2)
Qty
16
2500 Green (RoHS &
no Sb/Br)
Lead/Ball Finish
CU NIPDAU
MSL Peak Temp (3)
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
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