3961 Data Sheet 29319.26 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER DUAL FULL-BRIDGE PWM MOTOR DRIVER 24 OUT2B E1 2 23 E2 SENSE 1 3 22 SENSE 2 OUT1A 4 21 OUT2A VBB1 5 20 V BB2 GROUND 6 19 GROUND GROUND 7 18 GROUND VREFOUT 8 17 I FULL/PD VREFIN 9 16 V CC OUT1B 1 Designed for pulse-width modulated (PWM) current control of bipolar stepper motors, the A3961S— is capable of continuous output currents to ±800 mA and operating voltages to 45 V. Internal fixed off-time PWM current-control circuitry can be used to regulate the maximum load current to a desired value. An internal precision voltage reference is provided to improve motor peak current control accuracy. The peak load current limit is set by the user’s selection of an external resistor divider and current-sensing resistors. T C U Y D L O N R O P E D C E N U E N ER I T F N E O R C S OR I D F — RC1 10 15 RC 2 PHASE1 11 14 PHASE 2 ENABLE1 12 13 ENABLE 2 Note the A3961SB (DIP) and the A3961SLB (SOIC) are electrically identical and share a common terminal number assignment. ABSOLUTE MAXIMUM RATINGS Load Supply Voltage, VBB . . . . . . . . . . 45 V Output Current, IOUT . . . . . . . . . . ±800 mA* Logic Supply Voltage, VCC . . . . . . . . . 7.0 V Logic Input Voltage Range, VIN . . . . . . . . . . . -0.3 V to VCC + 0.3 V Sense Voltage, VSENSE . . . . . . . . . . . . 1.0 V Reference Output Current, IREF OUT . . . . . . . . . . . . . . . . . . . 1.0 mA Package Power Dissipation, PD . . . . . . . . . . . . . . . . . . . . See Graph Operating Temperature Range, TA . . . . . . . . . . . . . . . . . -20˚C to +85˚C Junction Temperature, TJ . . . . . . . +150˚C† Storage Temperature Range, TS . . . . . . . . . . . . . . . . -55˚C to +150˚C * Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any set of conditions, do not exceed the specified current rating or a junction temperature of 150˚C. † Fault conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. These conditions can be tolerated but should be avoided. The fixed off-time pulse duration is set by user-selected external RC timing networks. The capacitor in the RC timing network also determines a user-selectable blanking window that prevents false triggering of the PWM current control circuitry during switching transitions. This eliminates the need for two external RC filter networks on the current-sensing comparator inputs. For each bridge the PHASE input controls load current polarity by selecting the appropriate source and sink driver pair. For each bridge the ENABLE input, when held high, disables the output drivers. Special power-up sequencing is not required. Internal circuit protection includes thermal shutdown with hysteresis, transient-suppression diodes, and crossover-current protection. The A3961S— is supplied in a choice of two power packages: 24-pin dual-in-line plastic package with copper heat-sink tabs and 24-lead plastic SOIC with copper heat-sink tabs. In both packages the power tab is at ground potential and needs no electrical isolation. FEATURES ■ ■ ■ ■ ■ ■ ■ ±800 mA Continuous Output Current Rating 45 V Output Voltage Rating Internal PWM Current Control, Saturated Sink Drivers Internally Generated Precision 2.5 V Reference Internal Transient-Suppression Diodes Internal Thermal-Shutdown Circuitry Crossover-Current Protection, UVLO Protection Always order by complete part number: PART NUMBER PACKAGE RθJA RθJT A3961SB 24-Pin DIP 40°C/W 6°C/W A3961SLB 24-Lead SOIC 55°C/W 6°C/W ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER 5 TRUTH TABLE RθJT = 6.0°C/W 4 ENABLE PHASE OUTA OUTB H X Off Off L H H L L L L H 3 SUFFIX 'B', R θJA = 40°C/W 2 X = Irrelevant 1 SUFFIX 'LB', R θJA = 55°C/W 0 25 50 75 100 TEMPERATURE IN °C 125 150 Dwg. GP-049A FUNCTIONAL BLOCK DIAGRAM AND TYPICAL BIPOLAR STEPPER MOTOR APPLICATION MOTOR SUPPLY 2 LOGIC SUPPLY MOTOR SUPPLY 1 C BB V BB1 GND C cc C BB2 V BB2 V cc OUT 1A OUT 2A OUT 1B OUT 2B ENABLE 1 ENABLE 2 CONTROL LOGIC AND LEVEL SHIFT PHASE 1 RC1 BLANKING TIME AND SOURCE DRIVER T OFF CONTROL CT1 UVLO AND TSD + VOLTAGE REFERENCE + _ SENSE 1 RT1 CONTROL LOGIC AND LEVEL SHIFT _ E1 I FULL/PD REF OUT REFIN E2 BLANKING TIME AND SOURCE DRIVER T OFF CONTROL E2 R2 RC 2 SENSE 2 R1 RS1 PHASE 2 RS2 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 Copyright ©1995, 1996, Allegro MicroSystems, Inc. CT2 RT2 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 45 V, VCC = 4.75 V to 5.25 V, VSENSE = 0 V, 30 kΩ & 1000 pF RC to Ground (unless noted otherwise) Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units Output Drivers Load Supply Voltage Range VBB Operating, IOUT = ±800 mA, L = 3 mH 5.0 — 45 V Output Leakage Current ICEX VOUT = VBB — <1.0 50 µA VOUT = 0 V — <-1.0 -50 µA Source Driver, IOUT = -500 mA — 1.0 1.2 V Source Driver, IOUT = -750 mA — 1.1 1.3 V Source Driver, IOUT = -800 mA — — 1.4 V Sink Driver, IOUT = +500 mA — 0.3 0.6 V Sink Driver, IOUT = +750 mA — 0.5 0.9 V Sink Driver, IOUT = +800 mA — — 1.0 V IF = 500 mA — 1.1 1.4 V IF = 750 mA — 1.3 1.6 V IF = 800 mA — — 1.7 V Output Saturation Voltage Clamp Diode Forward Voltage VCE(SAT) VF (Sink or Source) Motor Supply Current IBB(ON) VENABLE = 0.8 V — 5.0 7.0 mA (No Load) IBB(OFF) VENABLE = 2.4 V — 5.0 7.0 mA 4.75 — 5.25 V Control Logic Logic Supply Voltage Range VCC Logic Input Voltage VIN(1) 2.4 — — V VIN(0) — — 0.8 V Logic Input Current Reference Output Voltage Operating IIN(1) VIN = 2.4 V — <1.0 20 µA IIN(0) VIN = 0.8 V — <-2.0 -200 µA IFULL/PD = LOW 2.45 2.50 2.55 V IFULL/PD = HIGH 1.49 1.67 1.84 V VREF OUT VCC = 5.0 V, IREF OUT = 90 to 900 µA: Continued next page… 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 45 V, VCC = 4.75 V to 5.25 V, VSENSE = 0 V, 30 kW & 1000 pF RC to Ground (unless noted otherwise) (cont.) Limits Characteristic Symbol Test Conditions Min. Typ. Max. Units 90 — 900 µA Control Logic (Continued) Reference Output Current I REF OUT 3 kΩ ≤ RD = R1 + R2 ≤ 15 kΩ Ref. Input Offset Current IOS VREF IN = 1 V -2.5 0 1.0 µA Comparator Input Offset Volt. VIO VREF = 0 V -5.0 0 5.0 mV Comparator Input Volt. Range VREF Operating -0.3 — 1.0 V CT = 1000 pF, R T = 30 kΩ 27 30 33 µs Comparator Trip to Source OFF — 1.2 2.0 µs CT = 1000 pF ± 5%, RT ≥ 15 kΩ, V CC = 5 V — 2.5 3.6 µs ENABLE ON to Source ON — 3.2 — µs ENABLE OFF to Source OFF — 1.2 — µs ENABLE ON to Sink ON — 3.2 — µs ENABLE OFF to Sink OFF — 0.7 — µs PHASE Change to Sink ON — 3.2 — µs PHASE Change to Source ON — 3.2 — µs PHASE Change to Sink OFF — 0.7 — µs PHASE Change to Source OFF — 1.2 — µs PWM RC Fixed Off-time PWM Propagation Delay Time tOFF RC tPWM PWM Minimum On Time tON(min) Propagation Delay Times tpd IOUT = ±800 mA, 50% to 90%: Thermal Shutdown Temp. TJ — 165 — ˚C Thermal Shutdown Hysteresis ∆TJ — 15 — ˚C UVLO Disable Threshold 2.5 2.7 2.9 V UVLO Hysterisis 0.7 0.9 1.1 V mA Logic Supply Current Logic Supply Current Temperature Coefficient ICC(ON) VENABLE1 = VENABLE2 = 0.8 V — 65 85 ICC(OFF) VENABLE1 = VENABLE2 = 2.4 V — 11 15 ∆ICC(ON) VENABLE1 = VENABLE2 = 0.8 V — 0.18 — NOTES: 1. Typical Data is for design information only. 2. Negative current is defined as coming out of (sourcing) the specified device terminal. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 mA/˚C 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER FUNCTIONAL DESCRIPTION Internal PWM Current Control. The A3961S— contains a fixed off-time pulse-width modulated (PWM) currentcontrol circuit that can be used to limit the load current to a desired value. The peak value of the current limiting (ITRIP) is set by the selection of an external current-sensing resistor (RS ) and reference input voltage (VREF IN). The internal circuitry compares the voltage across the external sense resistor to the voltage on the reference input terminal (VREF IN), resulting in a transconductance function approximated by: ITRIP ≈ VREF IN RS The reference input voltage is typically set with a resistor divider from VREF OUT. The value of VREF OUT can be switched from a nominal value of 2.5 V to 1.67 V by applying a low or high logic signal respectively to the I FULL/PD terminal. To ensure proper operation of the voltage reference, the resistor divider (RD = R1+R2) should have an impedance of 3 kΩ to 15 kΩ. Within this range, a low impedance will minimize the effect of the REF IN input offset current. The current-control circuitry limits the load current as follows: when the load current reaches ITRIP, the comparator resets a latch that turns off the selected source driver. The load inductance causes the current to recirculate through the sink driver and flyback diode. For each bridge, the user selects an external resistor (RT) and capacitor (CT) to determine the time period (tOFF = RTCT) during which the source driver remains disabled (see “RC Fixed Off-time” below). The range of recommended values for CT and RT are 1000 pF to 1500 pF and 15 kΩ to 100 kΩ respectively. For optimal load current regulation, CT is normally set to 1000 pF (see “Load Current Regulation” below). At the end of the RC interval, the source driver is enabled allowing the load current to increase again. The PWM cycle repeats, maintaining the peak load current at the desired value. internal current-control circuitry (or by the PHASE or ENABLE inputs). The comparator output is blanked to prevent false over-current detections due to reverserecovery currents of the clamp diodes, and/or switching transients related to distributed capacitance in the load. During internal PWM operation, at the end of the tOFF time, the comparator’s output is blanked and CT begins to be charged from approximately 1.1 volts by an internal current source of approximately 1 mA. The comparator output remains blanked until the voltage on CT reaches approximately 3.0 volts. When a transition of the PHASE input occurs, CT is discharged to near ground during the crossover delay time (The crossover delay time is present to prevent simultaneous conduction of the source and sink drivers). After the crossover delay, CT is charged by an internal current source of approximately 1 mA. The comparator output remains blanked until the voltage on C T reaches approximately 3.0 volts. When the device is disabled, via the ENABLE input, CT is discharged to near ground. When the device is re-enabled, CT is charged by an internal current source of approximately 1 mA. The comparator output remains blanked until the voltage on CT reaches approximately 3.0 volts. The minimum recommended value for CT is 1000 pF. This value ensures that the blanking time is sufficient to avoid false trips of the comparator under normal operating conditions. For optimal regulation of the load current, the above value for CT is recommended and the value of RT can be sized to determine tOFF. For more information regarding load current regulation, see below. Load Current Regulation. Because the device operates in a slow decay mode (2-quadrant PWM mode), there is a limit to the lowest level that the PWM current control circuitry can regulate load current. The limitation is due to the minimum PWM duty cycle, which is a function of the userselected value of tOFF and the minimum on-time pulse tON(min)max that occurs each time the PWM latch is reset. RC BLANKING. In addition to determining the fixed offIf the motor is not rotating, as in the case of a stepper motime of the PWM control circuit, the CT component sets the tor in hold/detent mode, a brush dc motor when stalled or comparator blanking time. This function blanks the output at startup, the worst case value of current regulation can of the comparator when the outputs are switched by the be approximated by: [(VBB - V SAT(SOURCE+SINK)) tON(min) max] – (1.05 (VSAT(SINK) + VF) tOFF) I AVG ≈ 1.05 (tON(min) max + tOFF) RLOAD 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER where tOFF = RTCT, RLOAD is the series resistance of the load, VBB is the motor supply voltage and t ON(min)max is specified in the electrical characteristics table. When the motor is rotating, the back EMF generated will influence the above relationship. For brush dc motor applications, the current regulation is improved. For stepper motor applications when the motor is rotating, the effect is dependent on the polarity and magnitude of the motor’s back EMF. The following procedure can be used to evaluate the worst-case internal PWM load current regulation in the system: Set VREF to 0 volts. With the load connected and the PWM current control operating in slow decay mode, use an oscilloscope to measure the time the output is low (sink ON) for the output that is chopping. This is the typical minimum on time (tON(min)typ) for the device. The CT then should be increased until the measured value of tON(min) is equal to tON(min)max as specified in the electrical characteristics table. When the new value of CT has been set, the value of RT should be decreased so the value for tOFF = R TCT (with the artificially increased value of CT) is equal to the nominal design value. The worst-case loadcurrent regulation then can be measured in the system under operating conditions. PWM of the Phase and Enable Inputs. The PHASE and ENABLE inputs can be pulse width modulated to regulate load current. Typical propagation delays from the PHASE and ENABLE inputs to transitions of the power outputs are specified in the electrical characteristics table. If the internal PWM current control is used, the comparator blanking function is active during phase and enable transitions. This eliminates false tripping of the over-current comparator caused by switching transients (see “RC Blanking” above). Enable PWM. Toggling the ENABLE input turns ON and OFF the selected source and sink drivers. The corresponding pair of flyback and ground clamp diodes conduct after the drivers are disabled, resulting in fast current decay. When the device is enabled the internal current-control circuitry will be active and can be used to limit the load current in a slow decay mode. Phase PWM. Toggling the PHASE terminal selects which sink/source pair is enabled, producing a load current that varies with the duty cycle and remains continuous at all times. This can have added benefits in bidirectional brush dc servo motor applications as the transfer function be- tween the duty cycle on the PHASE input and the average voltage applied to the motor is more linear than in the case of ENABLE PWM control (which produces a discontinuous current at low current levels). Miscellaneous Information. An internally generated dead time prevents crossover currents that can occur when switching phase. Thermal protection circuitry turns OFF all drivers should the junction temperature reach 165°C (typical). This is intended only to protect the device from failures due to excessive junction temperatures and should not imply that output short circuits are permitted. The hysteresis of the thermal shutdown circuit is approximately 15°C. APPLICATION NOTES Current Sensing. The actual peak load current (IPEAK) will be above the calculated value of ITRIP due to delays in the turn off of the drivers. The amount of overshoot can be approximated by: IOS ≈ (VBB – [(ITRIP R LOAD) + VBEMF]) tPWM L LOAD where VBB is the motor supply voltage, VBEMF is the back-EMF voltage of the load, RLOAD and LLOAD are the resistance and inductance of the load respectively, and t PWM is specified in the electrical characteristics table. To minimize current sensing inaccuracies caused by ground trace IR drops, each current-sensing resistor should have a separate return to the ground terminal of the device. For low-value sense resistors, the IR drops in the PCB can be significant and should be taken into account. The use of sockets should be avoided as their contact resistance can cause variations in the effective value of RS . Generally, larger values of RS reduce the aforementioned effects but can result in excessive heating and power loss in the sense resistor. The selected value of RS should not cause the absolute maximum voltage rating of 1.0 V, for the SENSE terminal, to be exceeded. The recommended value of RS is in the range of: RS ≈ 0.5 ITRIPmax 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 ± 50% 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER If desired, the reference input voltage can be filtered by placing a capacitor from REFIN to ground. The ground return for this capacitor as well as R2 should be independent from the high-current power-ground trace to avoid changes in REFIN due to IR drops. Thermal Considerations. For reliable operation it is recommended that the maximum junction temperature be kept below 110 to 125°C. The junction temperature can be measured best by attaching a thermocouple to the power tab/batwing of the device and measuring the tab temperature, TTAB . The junction temperature can then be approximated by using the formula: TJ ≈ TTAB + (ILOAD 2 V F RθJT) where VF can be chosen from the electrical specification table for the given level of ILOAD. The value for RθJT is given in the package thermal resistance table for the appropriate package. The power dissipation of the batwing packages can be improved by 20 to 30% by adding a section of printed circuit board copper (typically 6 to 18 square centimeters) connected to the batwing terminals of the device. The thermal performance in applications that run at high load currents and/or high duty cycles can be improved by adding external diodes from each output to ground in parallel with the internal diodes. Fast recovery (≤ 200 ns) diodes should be used to minimize switching losses. The load supply terminal, VBB, should be decoupled with an electrolytic capacitor (≥ 47 µF is recommended) placed as close to the device as is physically practical. To minimize the effect of system ground IR drops on the logic and reference input signals the system ground should have a low-resistance return to the motor supply voltage. See also “Current Sensing” and “Thermal Considerations” above. Fixed Off-Time Selection. With increasing values of tOFF, switching losses will decrease, low-level load current regulation will improve, EMI will be reduced, the PWM frequency will decrease, and ripple current will increase. The value of tOFF can be chosen for optimization of these parameters. For applications where audible noise is a concern, typical values of tOFF are chosen to be in the range of 15 to 35 µs. 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER A3961SB Dimensions in Inches (controlling dimensions) 24 0.014 0.008 13 NOTE 1 0.430 MAX 0.280 0.240 0.300 BSC 1 0.070 0.045 6 7 0.100 1.280 1.230 12 BSC 0.005 MIN 0.210 MAX 0.015 0.150 0.115 MIN 0.022 0.014 Dwg. MA-001-25A in Dimensions in Millimeters (for reference only) 24 0.355 0.204 13 NOTE 1 10.92 MAX 7.11 6.10 7.62 BSC 1 1.77 1.15 6 7 2.54 32.51 31.24 BSC 12 0.13 MIN 5.33 MAX 3.81 2.93 0.39 MIN 0.558 0.356 Dwg. MA-001-25A mm NOTES: 1. Webbed lead frame. Leads 6, 7, 18, and 19 are internally one piece. 2. Lead thickness is measured at seating plane or below. 3. Lead spacing tolerance is non-cumulative. 4. Exact body and lead configuration at vendor’s option within limits shown. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER A3961SLB Dimensions in Inches (for reference only) 24 13 0.0125 0.0091 0.491 0.394 0.2992 0.2914 0.050 0.016 0.020 0.013 1 2 3 0.050 0.6141 0.5985 0° TO 8° BSC NOTE 1 NOTE 3 0.0926 0.1043 0.0040 MIN. Dwg. MA-008-25 in Dimensions in Millimeters (controlling dimensions) 24 13 0.32 0.23 10.65 10.00 7.60 7.40 1.27 0.40 0.51 0.33 1 2 3 15.60 15.20 1.27 BSC 0° TO 8° NOTE 1 NOTE 3 2.65 2.35 0.10 MIN. NOTES: 1. Webbed lead frame. Leads 6, 7, 18, and 19 are internally one piece. 2. Lead spacing tolerance is non-cumulative. 3. Exact body and lead configuration at vendor’s option within limits shown. Dwg. MA-008-25A mm 3961 DUAL FULL-BRIDGE PWM MOTOR DRIVER BRIDGE & HALF-BRIDGE DRIVERS SELECTION GUIDE IN ORDER OF 1) OUTPUT CURRENT AND 2) OUTPUT VOLTAGE Features Output Ratings * Internal Diodes Outputs Internal Protection Dual PWM Full Bridge Dual PWM Full Bridge X X Bipolar Bipolar X X 3966 3968 45 45 45 Dual PWM Full Bridge Dual PWM Full Bridge Dual PWM Full Bridge X X X Bipolar Bipolar Bipolar X X X 2916 2919 6219 ±800 33 Dual PWM Full Bridge X Bipolar X 3964 ±900 14 3-Ø Back-EMF Controller/Driver X DMOS X 8902-A ±1000 7.0 3-Ø Back-EMF Controller/Driver X NMOS X 8984 ±1300 50 PWM Full Bridge X Bipolar X 3953 ±1500 45 45 50 50 Dual PWM Full Bridge Dual PWM Full Bridge PWM Microstepping Full Bridge PWM Microstepping Full Bridge X X X X Bipolar Bipolar Darlington/Satlington™ Darlington/Satlington™ X X X X 2917 2918 3955 3957 ±2000 45 50 50 50 3-Ø Brushless Controller/Driver Dual Full Bridge PWM Full-Bridge PWM Full-Bridge X X X X Darlington Darlington Darlington Darlington X X X X 2936 2998 3951 3952 ±3000 45 PWM Control X Darlington – 2962 ±3400 45 PWM Control X Bipolar X 2961 ±4000 14 3-Ø Brushless Controller/Driver X DMOS X 8925 mA V Description ±650 30 30 ±750 Part Number † * Current is maximum specified test condition, voltage is maximum rating. See specification for sustaining voltage limits or overcurrent protection voltage limits. † Complete part number includes additional characters to indicate operating temperature range and package style. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the design of its products. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use. 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000