PRELIMINARY
DS2435
Battery Identification Chip
with Time/Temperature Histogram
www.dalsemi.com
PR-35 PACKAGE
DALLAS
DS2435
1
2
3
BOTTOM VIEW
VDD
Provides unique ID number to battery packs
Eliminates thermistors by sensing battery
temperature on-chip
Elapsed time counter provides indication of
battery usage/storage time
Time/temperature histogram function
provides essential information for
determining battery self-discharge
256-bit nonvolatile user memory available for
storage of user data such as gas gauge and
manufacturing information.
Operating range of -40°C to +85°C
Applications include portable computers,
portable/cellular phones, consumer
electronics, and handheld instrumentation.
DQ
PACKAGE OUTLINE
GND
FEATURES
1
2
3
DQ
1
16
VDD
NC
2
15
NC
NC
3
14
NC
NC
4
13
NC
NC
5
12
NC
NC
6
11
NC
NC
7
10
NC
GND
8
9
GND
DS2435S 16-Pin SSOP
See Mech. Drawings Section
See Mech. Drawings Section
PIN DESCRIPTION
GND
DQ
VDD
NC
- Ground
- Data In/Out
- Supply Voltage
- No Connect
DESCRIPTION
The DS2435 Battery Identification Chip with Time/Temperature Histogram provides a convenient
method of tagging and identifying battery packs by manufacturer, chemistry, or other identifying
parameters. The DS2435 allows the battery pack to be coded with a unique identification number and also
store information regarding the battery life and charge/discharge characteristics in its nonvolatile
memory.
The DS2435 performs the essential function of monitoring battery temperature without the need for a
thermistor in the battery pack. A time/temperature histogram function stores the amount of time that the
battery has been in one of its eight user definable temperature bands, allowing more accurate selfdischarge calculations to be carried out by the user for determining remaining battery capacity. The onboard elapsed time counter provides a method that can even determine the amount of time that a battery
pack has been in storage, allowing for a more accurate self-discharge determination.
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112299
DS2435
Information is sent to/from the DS2435 over a 1-Wire interface, reducing the number of battery pack
connectors to only three; power, ground, and the 1-Wire interface.
DETAILED PIN DESCRIPTION
PIN
16-PIN SSOP
8, 9
PIN
PR-35
1
SYMBOL
1
2
DQ
Data Input/Output pin - for 1-Wire communication port.
16
3
VDD
Supply pin - input power supply.
2-7, 10-15
-
NC
No Connect
GND
DESCRIPTION
Ground pin.
OVERVIEW
The DS2435 has six major components: 1) Scratchpad Memory, 2) Nonvolatile Memory, 3) On-board
SRAM, 4) Temperature Sensor, 5) ID Register, and 6) Elapsed Time Counter. All data is read and written
least significant bit first.
Access to the DS2435 is over a 1-Wire interface. Charging parameters, battery chemistry, gas gauge
information, and other user data would be stored in the DS2435, allowing this information to remain
permanently in the battery pack. Nonvolatile (E2) RAM holds information even if the battery goes dead;
as long as the battery remains within typical charge/discharge operating range, the SRAM provides
battery-backed storage of information.
DS2435 BLOCK DIAGRAM Figure 1
2 of 24
DS2435
OVERVIEW - TIME/TEMPERATURE HISTOGRAM
Periods of storage are normal for most battery-powered applications. During this storage time, little or no
current is actually drawn from the battery; batteries will, however, lose capacity during this storage time
due to parasitic side reactions in the cell and other electrochemical mechanisms. This loss of capacity is
termed self-discharge.
Since self-discharge is the result of electrochemical reactions, its rate is dependent upon the cell
temperature. Knowing the time spent in certain temperature ranges during the storage time of the battery,
these temperature effects may be factored into a calculation of self-discharge for the battery. This will
allow a more accurate determination of retained battery capacity.
The DS2435 measures, tabulates, and stores this information in the battery pack. It periodically measures
the battery temperature, and updates the appropriate temperature “bin” of the time/temperature histogram
with the time spent in that temperature range. The resulting histogram data could appear graphically as
shown in Figure 2.
The DS2435 allows for eight temperature ranges, or bins, to be specified by fixing the values of the bin
limits, TA through TG. Once specified, the time spent in each of the bins (bin 1 being anything less than
TA, bin 2 being temperature greater than or equal to TA but less than TB, etc., and bin 8 being anything
greater than or equal to TG) is recorded (t1 being the time spent in bin 1, t2 the time spent in bin 2, etc.).
Using this information and data from the battery manufacturer regarding retained capacity, the actual
battery capacity remaining may be closely approximated by the user.
TIME/TEMPERATURE HISTOGRAM Figure 2
3 of 24
DS2435
MEMORY
The DS2435’s memory is divided into five pages, each page filling 32 bytes of address space. Not all of
the available addresses are used, however. Refer to the memory map of Figure 4 to see actual addresses
which are available for use.
The first three pages of memory consist of a scratchpad RAM and then either a nonvolatile RAM (pages 1
and 2) or SRAM (page 3). The scratchpads help insure data integrity when communicating over the 1Wire bus. Data is first written to the scratchpad where it can be read back. After the data has been
verified, a copy scratchpad command will transfer the data to the RAM (NV or SRAM). This process
insures data integrity when modifying the memory.
The fourth page of memory consists of registers which contain the measured temperature value,
time/temperature histogram registers, elapsed time counter, and status registers for the device; these
registers are made from SRAM cells.
The fifth page of memory holds the ID number for the device, the cycle count registers and the histogram
bin limits in E2 RAM, making these registers nonvolatile under all power conditions.
PAGE 1
The first page of memory has 24 bytes. It consists of a scratchpad RAM and a nonvolatile (E2) RAM.
These 24 bytes may be used to store any data the user wishes; such as battery chemistry descriptors,
manufacturing lot codes, gas gauge information, etc.
The nonvolatile portion of this page may be locked to prevent data stored here from being changed
inadvertently. Both the nonvolatile and the scratchpad portions are organized identically, as shown in the
memory map of Figure 4. In this page, these two portions are referred to as NV1 and SP1, respectively.
PAGE 2
The second page of memory has 8 bytes. It consists of a scratchpad RAM and a nonvolatile (E2) RAM.
These 8 bytes may be used to store any data the user wishes, such as battery chemistry descriptors,
manufacturing lot codes, gas gauge information, etc.
PAGE 3
The third page of memory has a full 32 bytes. It consists of a scratchpad RAM and an SRAM. This
address space may be used to store any data the user wishes, such as gas gauge and self-discharge
information. Should the battery go dead and power to the DS2435 is lost, this data may also be lost. Data
which must remain even if power to the DS2435 is lost should be placed in either Page 1 or Page 2.
PAGE 4
The fourth page of memory is used by the DS2435 to store the converted value of battery temperature, the
time/temperature histogram data, and the elapsed time counter. A 2-byte status register is also provided.
TEMPERATURE REGISTERS (60h-61h)
The DS2435 can measure temperature without external components. The resulting temperature
measurement is placed into two temperature registers. These registers are SRAM, and therefore will hold
the values placed in them until the battery voltage falls below the minimum VDD specified. The first
register, at address 60h, provides ½°C resolution for temperatures between 0°C and 127 ½°C, formatted
as follows:
4 of 24
DS2435
The second register, at address 61h, provides 1°C resolution over the -40°C to +85°C range, formatted as
follows in the binary two’s complement coding as shown in Table 1:
TEMPERATURE/DATA RELATIONSHIPS Table 1
TEMPERATURE
DIGITAL OUTPUT (Binary)
DIGITAL OUTPUT (Hex)
+85°C
01010101
55h
+25°C
00011001
19h
1°C
00000001
01h
0°C
00000000
00h
-1°C
11111111
FFh
-25°C
11100111
E7h
-40°C
11011000
D8h
STATUS/CONTROL REGISTER (62h-63h)
The status register is a 2-byte register at addresses 62h and 63h (consisting of SRAM). Address 62h is the
least significant byte of the status register, and is currently the only address with defined status bits; the
other byte at address 63h is reserved for future use. The status register is formatted as follows:
where
X=
Don’t Care
TB =
Temperature Busy flag. 1 = temperature conversion in progress; 0 = temperature
conversion complete, valid data in temperature register.
NVB =
Nonvolatile memory busy flag. 1 = Copy from scratchpad to NVRAM in progress, 0 =
nonvolatile memory is not busy. A copy to NVRAM may take from 2 ms to 10 ms (taking
longer at lower supply voltages).
LOCK =
1 indicates that NV1 is locked; 0 indicates that NV1 is unlocked.
5 of 24
DS2435
t1-t8 REGISTERS (64h-73h)
These registers hold the accumulated time values for the time/temperature histogram. t1 corresponds to
the time spent in histogram bin 1, t2 the time spent in bin 2, etc., where the bins are defined by the limits
set in TA-TG as shown in Figure 2. The format for the time value stored in these two-byte registers
depends upon the SAMPLE RATE, and is defined in the paragraph describing the SAMPLE RATE
parameter.
t REGISTER (74h-76h)
This 3-byte register is the elapsed time counter, formatted as follows:
The elapsed time counter has an LSB value of 1 minute; the total time which the counter can
accommodate is 224 minutes, or 31.92 years.
Issuing any protocol to the DS2435 prevents the incrementing of the elapsed time counter and histogram
registers until the protocol is cleared by issuing a reset. Therefore, it is imperative that any protocol
issued to the DS2435 be followed by a reset (either after the protocol, if it requires no data, or
immediately following the required data). This is necessary to avoid contention between the counter and
histogram writing process and external processes.
PAGE 5
The fifth page of memory holds the battery manufacturer ID number, a 2-byte counter for counting the
number of battery charge/discharge cycles, histogram bin limits, and sample rate.
ID REGISTER (80h and 81h)
The ID Register is a 16-bit ROM register that can contain a unique identification code, if purchased from
Dallas Semiconductor. This ID number is programmed by Dallas Semiconductor, is unchangeable, and is
unique to each customer. This ID number may be used to ensure that batteries containing a DS2435 have
the same manufacturer ID number as a charger configured to operate with that battery pack. This feature
may be used to prevent charging of batteries for which the charging circuit has not been designed.
CYCLE COUNTER (82h and 83h)
The cycle counter register gives an indication of the number of charge/discharge cycles the battery pack
has been through. This nonvolatile (E2) register is incremented by the user through the use of a protocol
to the DS2435, and is reset by another protocol. The counter is a straight binary counter, formatted as
follows:
6 of 24
DS2435
TA-TG REGISTERS (84h-8Ah)
These registers define the boundaries for the temperature bins in the time/temperature histogram, as
shown in Figure 2. These temperature values are expressed in the same temperature format as shown in
Table 1. These limits therefore may be positive or negative values, expressed with 1°C resolution. The
bin limits must be specified in increasing order (i.e., TA<TB, TB<TC, etc.).
SAMPLE RATE (8Bh)
This register defines the periodic interval at which the DS2435 will take a temperature measurement for
updating the histogram data. Note that this does not affect the actual time needed to perform a
temperature conversion using the Convert T protocol; this sample rate refers only to the periodic interval
at which histogram data is updated.
The sample rate is expressed as follows:
S2
S1
S0
SAMPLE RATE
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1/2 minute
1 minute
2 minutes
4 minutes
1/8 hour
1/4 hour
1/2 hour
1 hour
The interval specified in this register determines the LSB value for the time/temperature histogram
registers, as shown below. Examples of time expressions for a given sample rate are shown in Table 2.
HISTOGRAM REGISTER DATA GIVEN FOR SAMPLE RATE
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DS2435
DS2435 MEMORY PARTITIONING Figure 3
8 of 24
DS2435
DS2435 ADDRESSABLE RAM MEMORY MAP Figure 4
9 of 24
DS2435
DS2435 ADDRESSABLE RAM MEMORY RAM (Cont'd) Figure 4
10 of 24
DS2435
EXAMPLE CODES FOR 771 HOURS, 22.5 MINUTES
WITH DIFFERENT SAMPLE RATES Table 2
SAMPLE RATE
1/8
tX BYTE 1
00011000
tX BYTE 2
00011011
1/4
00001100
00001101
1/2
00000110
00000110
1
00000011
00000011
MEMORY FUNCTION COMMANDS
The protocols necessary for accessing the DS2435 are described in this section. These are summarized in
Table 3, and examples of memory functions are provided in Tables 4 and 5.
PAGE 1 THROUGH PAGE 3 COMMANDS
Read Scratchpad [11h]
This command reads the contents of the scratchpad RAM on the DS2435. This command is followed by a
start byte address. After issuing this command and providing the start address, the user may begin reading
the data. The user may read data through the end of the scratchpad space (address 5Fh), with any reserved
data bits reading all logic 1s. Once the end of the scratchpad is reached the data in address 5Fh will be
read repeatedly until termination of the read scratchpad command.
Write Scratchpad [17h]
This command writes to the scratchpad RAM on the DS2435. This command is followed by a start byte
address. After issuing this command and providing the start address, the user may begin writing data to
the DS2435 scratchpad at the starting byte address.
Copy SP1 to NV1 [22h]
This command copies the entire contents (24 bytes) of Scratchpad 1 (SP1) to its corresponding
nonvolatile memory (NV1). The nonvolatile RAM memory of the DS2435 cannot be written to directly
by the bus master; however, the scratchpad RAM may be copied to the nonvolatile RAM. This prevents
accidental overwriting of the nonvolatile RAM and allows for the data to be written first to the
scratchpad, where it can be read back and verified before copying to the nonvolatile RAM. This
command does not use a start address; the entire contents of the scratchpad will be copied to the
nonvolatile RAM. The NVB bit will be set when the copy is in progress. NV1 is made with E2 type
memory cells that will accept at least 50000 changes.
Copy SP2 to NV2 [25h]
This command copies the entire contents (8 bytes) of SP2 (user bytes) to its corresponding nonvolatile
memory (NV2). This command does not use a start address; the entire contents of SP2 will be copied to
NV2. The NVB bit will be set when the copy is in progress. NV2 is made with E2 type memory cells that
will accept at least 50000 changes.
Copy SP3 to SRAM [28h]
This command copies the entire contents (32 bytes) of SP3 to its corresponding SRAM. This command
does not use a start address; the entire contents of SP3 will be copied to the SRAM.
11 of 24
DS2435
Copy NV1 to SP1 [71h]
This command copies the entire contents (24 bytes) of NV1 to its corresponding scratchpad RAM (SP1).
This command does not use a start address; the entire contents of NV1 will be copied to SP1. The
nonvolatile RAM memory of the DS2435 cannot be read directly by the bus master; however, the
nonvolatile RAM may be copied to the scratchpad RAM.
Copy NV2 to SP2 [77h]
This command copies the entire contents (8 bytes) of NV2 (user bytes) to its corresponding scratchpad
RAM (SP2). This command does not use a start address; the entire contents of NV2 will be copied to
SP2. The non-volatile RAM memory of the DS2435 cannot be read directly by the bus master; however,
the nonvolatile RAM may be copied to the scratchpad RAM.
Copy SRAM to SP3 [7Ah]
This command copies the entire contents (32 bytes) of SRAM to its corresponding scratchpad RAM
(SP3). This command does not use a start address; the entire contents of SRAM will be copied to
SP3.The SRAM memory of the DS2435 cannot be read directly by the bus master; however, the SRAM
may be copied to the scratchpad RAM.
Lock NV1 [43h]
This command prevents copying SP1 to NV1 and sets the LOCK bit. This is done as an added measure of
data security, preventing data from being changed inadvertently. NV1 may be copied up into SP1 while
the part is locked. This allows NV1 to be read at any time. However, NV1 cannot be written to through a
Copy SP1 to NV1 command without first unlocking the DS2435.
Unlock NV1 [44h]
This command unlocks NV1 to allow copying SP1 into NV1. This is done as an added measure of data
security, preventing data from being changed inadvertently.
PAGE 4 AND 5 COMMANDS
Convert T [D2h]
This command instructs the DS2435 to initiate a temperature conversion cycle. This sets the TB flag.
When the temperature conversion is done, the TB flag is reset and the current temperature value is placed
in the temperature register. While a temperature conversion is taking place, all other memory functions
are still available for use.
Reset Histogram [E1h]
This command resets the accumulated time in all of the histogram temperature registers to zero. In
addition, this command also resets the elapsed time counter to 0. This command does not use a start
address; no further data is required.
Set Clock [E6h]
This command sets the elapsed time counter to a preset value. This command is followed by three bytes
of data, which will be stored at addresses 74h-76h. The transfer of this 3-byte value will occur after
reception of the 24th bit following the protocol, at which time the elapsed time counter will begin
incrementing the counter registers in 1-minute increments.
12 of 24
DS2435
Write Registers [EFh]
This command allows writing directly to the TA-TG registers and the sample rate register. This command
is followed by a start byte address. After issuing this command and providing the start address, the user
may begin writing the data.
Read Registers [B2h]
This command reads the contents of the registers in Page 4 and 5. This command is followed by a start
byte address. After issuing this command and providing the start address, the user may begin reading the
data. The user may read data through the end of the register space (through address 76h in Page 4, address
8Bh in Page 5), after which the data read will be all logic 1s.
Increment Cycle [B5h]
This command increments the value in the cycle counter register. This command does not use a start
address; no further data is required.
Reset Cycle Counter [B8h]
This command is used to reset the cycle counter register to zero, if desired.
13 of 24
DS2435
DS2435 COMMAND SET Table 3
INSTRUCTION
1-Wire BUS
MASTER STATUS
AFTER ISSUING
DESCRIPTION PROTOCOL
PROTOCOL
1-Wire BUS DATA
AFTER ISSUING
PROTOCOL
PAGE 1 THROUGH PAGE 3 MEMORY COMMANDS
Read Scratchpad
Reads bytes
from DS2435
Scratchpad.
11h <addr
(00h-5Fh)>
RX
<read data>
Write Scratchpad
Writes bytes to
DS2435
Scratchpad.
17h <addr
(00h-5Fh)>
TX
<write data>
Copy SP1 to NV1
Copies entire
contents of SP1
to NV1.
22h
Idle
{NVB bit in Status
Register=1 until copy
complete (2-5 ms,
typ)}
Copy SP2 to NV2
Copies entire
contents of SP2
to NV2.
25h
Idle
{NVB bit in Status
Register=1 until copy
complete (2-5 ms,
typ)}
Copy SP3 to
SRAM
Copies entire
contents of SP3
to SRAM.
28h
Idle
Idle
Copy NV1 to SP1
Copies entire
contents of NV1
to SP1.
71h
Idle
Idle
Copy NV2 to SP2
Copies entire
contents of NV2
to SP2.
77h
Idle
Idle
Copy SRAM to
SP3
Copies entire
contents of
SRAM to SP3.
7Ah
Idle
Idle
Lock NV1
Locks 24 bytes
of SP1 and NV1
from reading and
writing.
43h
Idle
{NVB bit in Status
Register=1 until copy
complete (2-5 ms,
typ)}
Unlock NV1
Unlocks 24 bytes
of SP1 and NV1
for reading and
writing.
44h
Idle
{NVB bit in Status
Register=1 until copy
complete (2-5 ms,
typ)}
14 of 24
DS2435
PAGE 4 AND PAGE 5 REGISTER COMMANDS
Read Registers
Reads bytes
from
Temperature,
Status and ID
Registers.
B2h <addr
(60h-76h,
80h-8Bh)>
RX
<read data>
Write Register
Write to TA-TG
and Sample Rate
Registers
EFh <addr
84h-8Bh>
Reset Cycle
Counter
Resets cycle
counter registers
to 0.
B8h
Idle
{NVB bit in Status
Register=1 until copy
complete (2-5 ms,
typ)}
Increment Cycle
Counter
Increments the
value in the
cycle counter
register.
B5h
Idle
{NVB bit in Status
Register=1 until copy
complete (2-5 ms,
typ)}
Reset Histogram
Resets all
histogram
registers to 0
E1h
Idle
Idle
Set Clock
Presets a value
for elapsed time
counter and
begins timing.
E6h
TX
<3 bytes>
Convert T
Initiates
temperature
conversion.
D2h
Idle
{TB bit in Status
Register=1 until
conversion complete}
15 of 24
DS2435
MEMORY FUNCTION EXAMPLE Table 4
Example: Bus Master writes 24 bytes of data to DS2435 scratchpad, then copies to it to NV1.
MASTER MODE DATA (LSB FIRST)
COMMENTS
TX
Reset
Reset pulse (480-960 µs)
RX
Presence
Presence pulse
TX
17h
Issue “write scratchpad” command
TX
00h
Start address
TX
<24 bytes>
TX
Reset
RX
Presence
TX
11h
Issue “read scratchpad” command
TX
00h
Start address
RX
<24 data bytes>
TX
Reset
RX
Presence
TX
22h
RX
<busy indicator>
TX
Reset
RX
Presence
Write 24 bytes of data to scratchpad
Reset pulse
Presence pulse
Read scratchpad data and verify
Reset pulse
Presence pulse
Issue “copy SP1 to NV1” command
Wait until NVB in status register=1 (2-5 ms typical)
Reset pulse
Presence pulse, done
MEMORY FUNCTION EXAMPLE Table 5
Example: Bus Master initiates temperature conversion, then reads temperature.
MASTER MODE DATA (LSB FIRST)
COMMENTS
Reset pulse (480-960 µs)
TX
Reset
RX
Presence
TX
D2h
Issue “convert T” command
TX
Reset
Reset pulse
RX
Presence
TX
B2h
Issue “read registers” command; begin loop
TX
62h
Status register address
RX
<1 data byte>
TX
Reset
RX
Presence
TX
B2h
Issue “read registers” command
TX
61h
Temperature register address
RX
<1 data byte>
TX
Reset
RX
Presence
Presence pulse
Presence pulse
Read status register and loop until TB=0
Reset pulse
Presence pulse
Read temperature register
Reset pulse
Presence pulse, done
16 of 24
DS2435
1-Wire BUS SYSTEM
The DS2435 1-Wire bus is a system which has a single bus master and one slave. The DS2435 behaves
as a slave. The DS2435 is not able to be multidropped, unlike other 1-Wire devices from Dallas
Semiconductor.
The discussion of this bus system is broken down into three topics: hardware configuration, transaction
sequence, and 1-Wire signaling (signal types and timing).
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open
drain or 3-state outputs. The 1-Wire port of the DS2435 is open drain with an internal circuit equivalent
to that shown in Figure 6. The 1-Wire bus requires a pullup resistor of approximately 5 kΩ.
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low
for more than 480 µs, all components on the bus will be reset.
TRANSACTION SEQUENCE
The protocol for accessing the DS2435 via the 1-Wire port is as follows:
•
Initialization
•
Memory Function Command
•
Transaction/Data
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence
consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the
slave(s).
The presence pulse lets the bus master know that the DS2435 is on the bus and is ready to operate. For
more details, see the “I/O Signaling” section.
HARDWARE CONFIGURATION Figure 5
I/O SIGNALING
The DS2435 requires strict protocols to insure data integrity. The protocol consists of several types of
signaling on one line: reset pulse, presence pulse, write 0, write 1, read 0, and read 1. All of these signals,
with the exception of the presence pulse, are initiated by the bus master.
17 of 24
DS2435
The initialization sequence required to begin any communication with the DS2435 is shown in Figure 7.
A reset pulse followed by a presence pulse indicates the DS2435 is ready to send or receive data given the
correct memory function command.
The bus master transmits (TX) a reset pulse (a low signal for a minimum of 480 µs). The bus master then
releases the line and goes into a receive mode (RX). The 1-Wire bus is pulled to a high state via the 5k
pullup resistor. After detecting the rising edge on the I/O pin, the DS2435 waits 15-60 µs and then
transmits the presence pulse (a low signal for 60-240 µs).
READ/WRITE TIME SLOTS
DS2435 data is read and written through the use of time slots to manipulate bits and a command word to
specify the transaction.
Write Time Slots
A write time slot is initiated when the host pulls the data line from a high logic level to a low logic level.
There are two types of write time slots: Write 1 time slots and Write 0 time slots. All write time slots
must be a minimum of 60 µs in duration with a minimum of a 1 µs recovery time between individual
write cycles.
The DS2435 samples the I/O line in a window of 15 µs to 60 µs after the I/O line falls. If the line is high,
a Write 1 occurs. If the line is low, a Write 0 occurs (see Figure 6).
For the host to generate a Write 1 time slot, the data line must be pulled to a logic low level and then
released, allowing the data line to pull up to a high level within 15 µs after the start of the write time slot.
For the host to generate a Write 0 time slot, the data line must be pulled to a logic low level and remain
low for the duration of the write time slot.
Read Time Slots
The host generates read time slots when data is to be read from the DS2435. A read time slot is initiated
when the host pulls the data line from a logic high level to logic low level. The data line must remain at a
low logic level for a minimum of 1 µs; output data from the DS2435 is then valid for the next 14 µs
maximum. The host therefore must stop driving the I/O pin low in order to read its state 15 µs from the
start of the read slot (see Figure 8). By the end of the read time slot, the I/O pin will pull back high via
the external pullup resistor. All read time slots must be a minimum of 60 µs in duration with a minimum
of a 1 µs recovery time between individual read slots.
Figure 9 shows that the sum of TINIT, TRC, and TSAMPLE must be less than 15 µs. Figure 10 shows that
system timing margin is maximized by keeping TINIT and TRC as small as possible and by locating the
master sample time towards the end of the 15 µs period.
18 of 24
DS2435
INITIALIZATION PROCEDURE "RESET AND PRESENCE PULSES" Figure 6
READ/WRITE TIMING DIAGRAM Figure 7
19 of 24
DS2435
DETAILED MASTER READ 1 TIMING Figure 8
RECOMMENDED MASTER READ 1 TIMING Figure 9
20 of 24
DS2435
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground
Operating Temperature
Storage Temperature
Soldering Temperature
*
-0.3V to +7.0V
-40°C to +85°C
-55°C to +125°C
260°C for 10 seconds
This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER
Supply Voltage
Data Pin
SYMBOL
VDD
CONDITION
I/O Functions
MIN
2.5
NV Copy Functions
2.7
6.4
±½ºC Accurate
Temp. Conversions
3.6
6.4
-0.3
VDD+0.3
VI/O
DC ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
Temperature
Accuracy
(=TACTUAL TMEASURED)
(-40°C to +85°C)
CONDITION
TA=0ºC to 70ºC
TYP
MAX
6.4
UNITS
NOTES
V
1
V
(-40°C to +85°C; VDD=3.6V to 6.4V)
MIN
TYP
TA-40ºC to 0ºC and
+70ºC to +85ºC
MAX
±½
UNITS
ºC
NOTES
3
See
typical
curve
Input Logic High
VIH
VDD=4.8V
2.2
VDD+0.3
V
Input Logic Low
VIL
VDD=4.8V
-0.3
+0.8
V
Sink Current
IL
VI/O=0.4V
-4.0
Standby Current
IQ
Clock Running
Active Current
IDD
Temp Conversions
Input Resistance
RI
mA
10
25
µA
4
1.5
mA
4
kΩ
2
500
NOTES:
1. Temperature conversion will work with ±2°C accuracy down to VDD=2.7V.
2. I/O line in “hi-Z” state and II/O=0. Resistance specified from I/O to ground.
3. See typical curve for specification limits outside 0°C to 70°C range. Thermometer error reflects
sensor accuracy as tested during calibration.
4. Specified with DQ=VDD.
5. The bus should not remain idle for more than 20 ms between bits or between a bit and a reset.
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DS2435
AC ELECTRICAL CHARACTERISTICS
1-Wire INTERFACE
PARAMETER
Temperature Conversion Time
(-40°C to +85°C; VDD=3.6V to 6.4V)
SYMBOL
tCONV
MIN
Time Slot
tSLOT
Recovery Time
MAX
500
UNITS
ms
60
120
µs
tREC
1
20000
µs
Write 0 Low Time
tLOW0
60
120
µs
Write 1 Low Time
tLOW1
1
15
µs
Read Data Valid
tRDV
15
µs
Reset Time High
tRSTH
480
µs
Reset Time Low
tRSTL
480
µs
Presence Detect High
tPDHIGH
15
60
µs
Presence Detect Low
tPDLOW
60
240
µs
Capacitance
CIN/OUT
25
pF
±10
%
Timer Accuracy
1-WIRE
WRITE 1 TIME SLOT
1-WIRE WRITE 0 TIME SLOT
22 of 24
TYP
250
NOTES
5
DS2435
1-WIRE READ 0 TIME SLOT
1-WIRE RESET PULSE
1-WIRE PRESENCE DETECT
23 of 24
DS2435
TYPICAL PERFORMANCE CURVE
24 of 24